Patents by Inventor Hung-Ming Lin
Hung-Ming Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240145653Abstract: A manufacturing method of a display device includes forming light emitting components on a first substrate, the light emitting components include a first side and a second side, and the second side is away from the first substrate; forming a circuit layer on the first substrate and on the second side of the light emitting components; forming a first protective layer on the circuit layer and forming an insulating layer on the first protective layer; removing the first substrate after forming a second substrate on the insulating layer; forming a black matrix layer on the first side of the light emitting components, and the black matrix layer includes openings; forming light conversion layers in the openings of the black matrix layer; forming a second protective layer on the black matrix layer and the light conversion layers; and forming a third substrate on the second protective layer.Type: ApplicationFiled: May 12, 2023Publication date: May 2, 2024Applicant: HANNSTAR DISPLAY CORPORATIONInventors: Chun-I Chu, Yu-Chi Chiao, Yung-Li Huang, Hung-Ming Chang, Cheng-Yu Lin, Huan-Hsun Hsieh, CHeng-Pei Huang
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Publication number: 20240144467Abstract: A hot spot defect detecting method and a hot spot defect detecting system are provided. In the method, hot spots are extracted from a design of a semiconductor product to define a hot spot map comprising hot spot groups, wherein local patterns in a same context of the design yielding a same image content are defined as a same hot spot group. During runtime, defect images obtained by an inspection tool performing hot scans on a wafer manufactured with the design are acquired and the hot spot map is aligned to each defect image to locate the hot spot groups. The hot spot defects in each defect image are detected by dynamically mapping the hot spot groups located in each defect image to a plurality of threshold regions and respectively performing automatic thresholding on pixel values of the hot spots of each hot spot group in the corresponding threshold region.Type: ApplicationFiled: January 8, 2024Publication date: May 2, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chien-Huei Chen, Pei-Chao Su, Xiaomeng Chen, Chan-Ming Chang, Shih-Yung Chen, Hung-Yi Chung, Kuang-Shing Chen, Li-Jou Lee, Yung-Cheng Lin, Wei-Chen Wu, Shih-Chang Wang, Chien-An Lin
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Publication number: 20240134243Abstract: A waveguide structure includes a substrate and a waveguide core coupled to the substrate and including a first material characterized by a first index of refraction and a first electro-optic coefficient. The waveguide structure also includes a first cladding layer at least partially surrounding the waveguide core and including a second material characterized by a second index of refraction less than the first index of refraction and a second electro-optic coefficient greater than the first electro-optic coefficient. The second cladding layer is coupled to the first cladding layer.Type: ApplicationFiled: October 26, 2023Publication date: April 25, 2024Applicant: Psiquantum, Corp.Inventors: Chia-Ming Chang, Hung-Hsi Lin, Gary Gibson
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Publication number: 20240136546Abstract: A vacuum battery structural assembly and a vacuum multi-cell battery module composed thereof are provided and include a first repeating unit including a first frame plate and a second frame plate with respect to the first frame plate; and an electrolyte channel defined within the first frame plate and the second frame plate to accommodate a liquid electrolyte, wherein both a surface of the first frame plate and a surface of the second frame plate include a vacuum suction area, the vacuum suction area includes a vacuum aperture and a vacuum channel, wherein the vacuum aperture is formed on at least one surface of the first frame plate and the second frame plate, the vacuum channel is positioned inside the first frame plate and the second frame plate, and is configured to generate a longitudinal pressing suction force and seal the first frame plate and the second frame plate.Type: ApplicationFiled: November 23, 2022Publication date: April 25, 2024Inventors: Hung-Hsien Ku, Shang-Qing Zhuang, Ning-Yih Hsu, Chien-Hong Lin, Han-Jou Lin, Yi-Hsin Hu, Po-Yen Chiu, Yao-Ming Wang
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Publication number: 20240136440Abstract: A thin film transistor and method of making the same, the thin film transistor including: a substrate; a word line disposed on the substrate; a semiconductor layer disposed on the substrate, the semiconductor layer having a source region, a drain region, and a channel region disposed between the source and drain regions and overlapping with the word line in a vertical direction perpendicular to a plane of the substrate; a hydrogen diffusion barrier layer overlapping with the channel region in the vertical direction; a gate dielectric layer disposed between the channel region and the word line; and source and drain electrodes respectively electrically coupled to the source and drain regions.Type: ApplicationFiled: December 30, 2023Publication date: April 25, 2024Inventors: Hung-Wei Li, Yu-Ming Lin, Mauricio Manfrini, Sai-Hooi Yeong
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Publication number: 20240128676Abstract: A connector assembly includes a base, a wire unit, and a wire fixing unit. The base includes a body and two side wings. The two side wings are respectively rotatably connected to two opposite sides of the body, and each of the side wings includes a first fixing portion. The wire unit is located between the two side wings. The wire unit includes a connection seat disposed in the body, and various wires disposed in the connection seat and protruding from one side of the connection seat. The wire fixing unit includes two second fixing portions and various through holes, in which the through holes are located between the two second fixing portions, the two first fixing portions respectively clamp the two second fixing portions, and the wires correspondingly pass through the through holes.Type: ApplicationFiled: December 22, 2022Publication date: April 18, 2024Inventors: Lei-Ming LEE, Hung-Chuan LIN
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Patent number: 11953740Abstract: A package structure including a photonic, an electronic die, an encapsulant and a waveguide is provided. The photonic die includes an optical coupler. The electronic die is electrically coupled to the photonic die. The encapsulant laterally encapsulates the photonic die and the electronic die. The waveguide is disposed over the encapsulant and includes an upper surface facing away from the encapsulant. The waveguide includes a first end portion and a second end portion, the first end portion is optically coupled to the optical coupler, and the second end portion has a groove on the upper surface.Type: GrantFiled: May 14, 2021Date of Patent: April 9, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chung-Ming Weng, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Hua-Kuei Lin, Che-Hsiang Hsu
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Patent number: 11947173Abstract: A package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler; an interconnect structure over the photonic layer; an electronic die and a first dielectric layer over the interconnect structure, where the electronic die is connected to the interconnect structure; a first substrate bonded to the electronic die and the first dielectric layer; a socket attached to a top surface of the first substrate; and a fiber holder coupled to the first substrate through the socket, where the fiber holder includes a prism that re-orients an optical path of an optical signal.Type: GrantFiled: May 5, 2023Date of Patent: April 2, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chung-Ming Weng, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Hua-Kuei Lin, Che-Hsiang Hsu
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Publication number: 20240101527Abstract: A compound of Formula (I) below, or a pharmaceutically acceptable salt, stereoisomer, solvate, or prodrug thereof: in which R1, R2, R3, R5, R6, and R7 are defined as in the SUMMARY section. Further disclosed are a method of using the above-described compound, salt, stereoisomer, solvate, or prodrug for treating microbial infections and a pharmaceutical composition containing the same.Type: ApplicationFiled: October 23, 2020Publication date: March 28, 2024Applicant: TAIGEN BIOTECHNOLOGY CO., LTD.Inventors: Chu-Chung Lin, Hung-Chuan Chen, Chiayn Chiang, Chih-Ming Chen
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Patent number: 11942543Abstract: A high-voltage semiconductor device structure is provided. The high-voltage semiconductor device structure includes a semiconductor substrate, a source ring in the semiconductor substrate, and a drain region in the semiconductor substrate. The high-voltage semiconductor device structure also includes a doped ring surrounding sides and a bottom of the source ring and a well region surrounding sides and bottoms of the drain region and the doped ring. The well region has a conductivity type opposite to that of the doped ring. The high-voltage semiconductor device structure further includes a conductor electrically connected to the drain region and extending over and across a periphery of the well region. In addition, the high-voltage semiconductor device structure includes a shielding element ring between the conductor and the semiconductor substrate. The shielding element ring extends over and across the periphery of the well region.Type: GrantFiled: June 29, 2022Date of Patent: March 26, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hung-Chou Lin, Yi-Cheng Chiu, Karthick Murukesan, Yi-Min Chen, Shiuan-Jeng Lin, Wen-Chih Chiang, Chen-Chien Chang, Chih-Yuan Chan, Kuo-Ming Wu, Chun-Lin Tsai
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Patent number: 11932534Abstract: A microelectromechanical system (MEMS) structure and method of forming the MEMS device, including forming a first metallization structure over a complementary metal-oxide-semiconductor (CMOS) wafer, where the first metallization structure includes a first sacrificial oxide layer and a first metal contact pad. A second metallization structure is formed over a MEMS wafer, where the second metallization structure includes a second sacrificial oxide layer and a second metal contact pad. The first metallization structure and second metallization structure are then bonded together. After the first metallization structure and second metallization structure are bonded together, patterning and etching the MEMS wafer to form a MEMS element over the second sacrificial oxide layer. After the MEMS element is formed, removing the first sacrificial oxide layer and second sacrificial oxide layer to allow the MEMS element to move freely about an axis.Type: GrantFiled: March 16, 2022Date of Patent: March 19, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hung-Hua Lin, Chang-Ming Wu, Chung-Yi Yu, Ping-Yin Liu, Jung-Huei Peng
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Patent number: 11923459Abstract: A thin film transistor and method of making the same, the thin film transistor including: a substrate; a word line disposed on the substrate; a semiconductor layer disposed on the substrate, the semiconductor layer having a source region, a drain region, and a channel region disposed between the source and drain regions and overlapping with the word line in a vertical direction perpendicular to a plane of the substrate; a hydrogen diffusion barrier layer overlapping with the channel region in the vertical direction; a gate dielectric layer disposed between the channel region and the word line; and source and drain electrodes respectively electrically coupled to the source and drain regions.Type: GrantFiled: April 12, 2021Date of Patent: March 5, 2024Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Hung Wei Li, Mauricio Manfrini, Sai-Hooi Yeong, Yu-Ming Lin
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Publication number: 20230377676Abstract: The disclosure provides an integrated circuit and an operation method and an inspection method thereof. The integrated circuit includes a one-time programmable (OTP) memory, an identifier generation circuit, and a memory controller. The identifier generation circuit generates a random number, and performs an error-detection-code encoding operation on the random number to generate an identifier with an error-detection code. The memory controller writes the identifier generated by the identifier generation circuit into the OTP memory. The identifier generation circuit reads the identifier from the OTP memory through the memory controller, and performs an error-detection-code decoding operation on the identifier provided by the memory controller to determine whether an error of the identifier from the OTP memory is correctable. When it is determined that the error of the identifier from the OTP memory is not correctable, the writing of the identifier is deemed failed.Type: ApplicationFiled: August 9, 2022Publication date: November 23, 2023Applicant: ASPEED Technology Inc.Inventors: Hung-Ming Lin, Hung-Ju Huang
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Patent number: 11733746Abstract: An example apparatus to retain a computer power brick in a power brick holder includes a plate and a positioning mechanism removably attached at any of a plurality of positions on the plate. The positioning mechanism is attached at a preset position on the plate based on a size of the power brick.Type: GrantFiled: July 24, 2019Date of Patent: August 22, 2023Assignee: Hewlett-Packard Development Company, L.P.Inventors: Chin-Chang Ho, Hung-Ming Lin, Hong-Tao Hsieh, Che-An Yao
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Patent number: 11615048Abstract: An adaptive serial general-purpose input output (ASGPIO) interface and a signal receiver thereof suitable for a secure control module (SCM) are provided. The ASGPIO interface includes a signal transmitter. The signal transmitter includes a first data buffer, a comparator, and an encoder. The first data buffer receives transmitted data and provides previously transmitted data. The comparator receives currently transmitted data and receives the previously transmitted data. In a first mode, the comparator compares the previously transmitted data with the currently transmitted data to generate a data variation information. The encoder, in the first mode, generates at least one index value and a corresponding instruction signal according to the data variation information. The signal transmitter sends the at least one index value as a serial signal and the instruction signal to a signal receiver.Type: GrantFiled: December 6, 2021Date of Patent: March 28, 2023Assignee: ASPEED Technology Inc.Inventors: Hung-Ming Lin, Chih-Chiang Mao
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Publication number: 20230067444Abstract: A solar cell includes a silicon substrate, a passivation layer, a first protection layer, a second protection layer, and a third protection layer. The material of the passivation layer is aluminum oxide, and the passivation layer is on the lower surface of the silicon substrate. The material of the first protection layer is silicon oxynitride, and the first protection layer is on a surface of the passivation layer opposite to the silicon substrate. The material of the second protection layer is silicon nitride, and the second protection layer is on a surface of the first protection layer opposite to the passivation layer. The material of the third protection layer is silicon oxynitride or silicon oxide, and the third protection layer is on a surface of the second protection layer opposite to the first protection layer.Type: ApplicationFiled: November 2, 2021Publication date: March 2, 2023Applicant: United Renewable Energy Co., Ltd.Inventors: Hung-Ming LIN, Hsiu-Hung LIU, Chen-Po YU, Chun-Liang CHIANG
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Publication number: 20220397946Abstract: An example ventilation system for a computing device includes: a cover slidably engageable with a housing of the computing device to a closed position defining an internal space of the computing device, the cover having first ventilation holes; a system mesh slidably engaged with the cover, the system mesh having second ventilation holes; and a stopper disposed in the internal space of the computing device, the stopper to stop the system mesh at a predefined position when the cover is engaged with the housing in the closed position, wherein the first ventilation holes and the second ventilation holes overlap to define system ventilation holes for the computing device.Type: ApplicationFiled: October 31, 2019Publication date: December 15, 2022Applicant: Hewlett-Packard Development Company, L.P.Inventors: Chin-Chang Ho, Hung-Ming Lin, Lan-Chin Chiou, Wei-Chih Tsao, Che-An Yao
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Patent number: 11502712Abstract: A signal transceiving system and a signal receiver thereof are provided. The signal transceiving system includes a signal transmitter. The signal transmitter includes a first data buffer, a comparator, and an encoder. The first data buffer receives transmitted data and provides previously transmitted data. The comparator receives currently transmitted data and receives the previously transmitted data. The comparator compares, in a first mode, the previously transmitted data with the currently transmitted data to generate a data variation information. The encoder generates, in the first mode, at least one index value and a corresponding instruction signal according to the data variation information. The signal transmitter sends the at least one index value which is a serial signal and the instruction signal to a signal receiver.Type: GrantFiled: April 13, 2021Date of Patent: November 15, 2022Assignee: ASPEED Technology Inc.Inventors: Hung-Ming Lin, Chih-Chiang Mao
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Publication number: 20220286155Abstract: A signal transceiving system and a signal receiver thereof are provided. The signal transceiving system includes a signal transmitter. The signal transmitter includes a first data buffer, a comparator, and an encoder. The first data buffer receives transmitted data and provides previously transmitted data. The comparator receives currently transmitted data and receives the previously transmitted data. The comparator compares, in a first mode, the previously transmitted data with the currently transmitted data to generate a data variation information. The encoder generates, in the first mode, at least one index value and a corresponding instruction signal according to the data variation information. The signal transmitter sends the at least one index value which is a serial signal and the instruction signal to a signal receiver.Type: ApplicationFiled: April 13, 2021Publication date: September 8, 2022Applicant: ASPEED Technology Inc.Inventors: Hung-Ming Lin, Chih-Chiang Mao
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Publication number: 20220283979Abstract: An adaptive serial general-purpose input output (ASGPIO) interface and a signal receiver thereof suitable for a secure control module (SCM) are provided. The ASGPIO interface includes a signal transmitter. The signal transmitter includes a first data buffer, a comparator, and an encoder. The first data buffer receives transmitted data and provides previously transmitted data. The comparator receives currently transmitted data and receives the previously transmitted data. In a first mode, the comparator compares the previously transmitted data with the currently transmitted data to generate a data variation information. The encoder, in the first mode, generates at least one index value and a corresponding instruction signal according to the data variation information. The signal transmitter sends the at least one index value as a serial signal and the instruction signal to a signal receiver.Type: ApplicationFiled: December 6, 2021Publication date: September 8, 2022Applicant: ASPEED Technology Inc.Inventors: Hung-Ming Lin, Chih-Chiang Mao