Abstract: A method of operating a storage device includes receiving, from a host, a first packet containing a buffer address indicating a location of a data buffer selected from among a plurality of data buffers in the host, parsing the buffer address from the first packet, and transmitting a second packet containing the buffer address to the host in response to the first packet.

Abstract: A method of operating a storage device includes receiving, from a host, a first packet containing a buffer address indicating a location of a data buffer selected from among a plurality of data buffers in the host, parsing the buffer address from the first packet, and transmitting a second packet containing the buffer address to the host in response to the first packet.

Abstract: A method of operating a storage device includes receiving, from a host, a first packet containing a buffer address indicating a location of a data buffer selected from among a plurality of data buffers in the host, parsing the buffer address from the first packet, and transmitting a second packet containing the buffer address to the host in response to the first packet.

Abstract: A method of operating a storage device includes receiving, from a host, a first packet containing a buffer address indicating a location of a data buffer selected from among a plurality of data buffers in the host, parsing the buffer address from the first packet, and transmitting a second packet containing the buffer address to the host in response to the first packet.

Abstract: A method of operating a storage device includes receiving, from a host, a first packet containing a buffer address indicating a location of a data buffer selected from among a plurality of data buffers in the host, parsing the buffer address from the first packet, and transmitting a second packet containing the buffer address to the host in response to the first packet.

Abstract: Provided are a storage device, a storage system, and a method of operating the same. A storage device communicably connected to a host may include a non-volatile memory configured to store at least one piece of boot data necessary for booting the storage device; and a device controller configured to receive an interface initialize command (IFIC) from the host, predict requested boot data requested by the host from among the at least one piece of boot data based on the IFIC, and control the non-volatile memory to read the requested boot data.

Abstract: A method of operating a storage device includes receiving, from a host, a first packet containing a buffer address indicating a location of a data buffer selected from among a plurality of data buffers in the host, parsing the buffer address from the first packet, and transmitting a second packet containing the buffer address to the host in response to the first packet.

Abstract: A semiconductor circuit including a clocked comparator and an offset application circuit. The clocked comparator is configured to receive a first input signal and a second input signal from a host and compare the first input signal and the second input signal. The offset application circuit is configured to apply an offset to the first input signal. The clocked comparator is configured to be driven based on a reference clock provided from the host.

Abstract: An operating method of a semiconductor device and a memory system, each including a multi-connection port, includes: receiving connection information of a first device while connecting to the first device; updating information of a management table by using the connection information; and generating and transmitting a first packet including the connection information of the first device to a second device pre-connected to the memory system.

Abstract: A method of operating a storage device includes receiving, from a host, a first packet containing a buffer address indicating a location of a data buffer selected from among a plurality of data buffers in the host, parsing the buffer address from the first packet, and transmitting a second packet containing the buffer address to the host in response to the first packet.

Abstract: A semiconductor circuit including a clocked comparator and an offset application circuit. The clocked comparator is configured to receive a first input signal and a second input signal from a host and compare the first input signal and the second input signal. The offset application circuit is configured to apply an offset to the first input signal. The clocked comparator is configured to be driven based on a reference clock provided from the host.

Abstract: A method of operating a storage device includes receiving, from a host, a first packet containing a buffer address indicating a location of a data buffer selected from among a plurality of data buffers in the host, parsing the buffer address from the first packet, and transmitting a second packet containing the buffer address to the host in response to the first packet.

Abstract: Provided are a storage device, a storage system, and a method of operating the same. A storage device communicably connected to a host may include a non-volatile memory configured to store at least one piece of boot data necessary for booting the storage device; and a device controller configured to receive an interface initialize command (IFIC) from the host, predict requested boot data requested by the host from among the at least one piece of boot data based on the IFIC, and control the non-volatile memory to read the requested boot data.

Abstract: A non-volatile memory system includes a memory controller, where the memory controller includes a first region including a first memory that stores compressed code, and a second region including a second memory that stores decompressed code. Power supplied to the first region and the second region is controlled according to an operation mode of the non-volatile memory system.

Abstract: A method for operating a memory controller is provided. The method includes generating a pseudo random number by using a seed included in a stored seed group corresponding to a page to be currently programmed, wherein the stored seed group is stored among a plurality of seed groups. Data to be programmed into the current page is randomizing by using the pseudo random number and the memory controller outputs the randomized data. A solid state drive (SSD) or other memory storage device such as a memory card includes the memory controller and includes a read only memory (ROM) storing the plurality of seed groups. The memory controller includes a micro-processor and a read only memory (ROM) storing executable code for causing the micro-processor to access the plurality of stored seed groups and to select a seed therefrom corresponding to a page to be currently programmed.

Abstract: A memory swapping method and a data processing system using the same, the memory swapping method including receiving queue information for a memory swapping task from a host device; performing part of the memory swapping task in a storage device based on the queue information; receiving a command corresponding to the queue information from the host device after performing of the part of the memory swapping task is completed; and performing a remaining part of the memory swapping task according to the command by using a result of the part of the memory swapping task that had been previously performed.

Abstract: A storage device includes a nonvolatile memory and a connector configured to connect the storage device to a host. The connector includes a detection terminal that provides a detection voltage to the host, a sensing resistor electrically connected to the detection terminal and having a resistance value that determines the level of the detection voltage, and a power supply terminal that receives a power supply voltage from the host, wherein the power supply voltage is selected by the host in response to the detection voltage.

Abstract: A storage device includes a nonvolatile memory and a connector configured to connect the storage device to a host. The connector includes a detection terminal that provides a detection voltage to the host, a sensing resistor electrically connected to the detection terminal and having a resistance value that determines the level of the detection voltage, and a power supply terminal that receives a power supply voltage from the host, wherein the power supply voltage is selected by the host in response to the detection voltage.

Abstract: An operating method of a semiconductor device and a memory system, each including a multi-connection port, includes: receiving connection information of a first device while connecting to the first device; updating information of a management table by using the connection information; and generating and transmitting a first packet including the connection information of the first device to a second device pre-connected to the memory system.

Abstract: An embedded multimedia card (eMMC) and a method of operating the same are provided. The eMMC includes a flash memory and a device controller configured to control the flash memory. The device controller includes a command storage unit configured to receive a command transmitted from a host regardless of a state of a data bus and to store task information by task ID; and a status storage unit configured to store status information based on task status by task ID.