Patents by Inventor Hyoun Lee

Hyoun Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230078862
    Abstract: In one example, a semiconductor device includes a first substrate with a first substrate top side, a first substrate bottom side opposite to the first substrate top side, a first substrate lateral side interposed between the first substrate top side and the first substrate bottom side, and a first substrate conductive structure. An electronic component is coupled to the first substrate top side and coupled to the first substrate conductive structure. A support includes a support wall having a first ledge coupled to the first substrate top side, a first riser coupled to the first substrate lateral side, and a second ledge extending from the first riser away from the first substrate lateral side. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: September 13, 2021
    Publication date: March 16, 2023
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Sang Yun MA, Dong Hee KANG, Sang Hyoun LEE
  • Publication number: 20230024376
    Abstract: An electrical connector assembly includes a housing defining an interior space and a slot and a spring pin terminal disposed within the slot of the housing. The spring pin terminal includes a first contact portion, a second contact portion, and an intermediate portion that extends between the first contact portion and the second contact portion. The first contact portion includes a contact point that engages a first electrically conductive structure and a retention force support that engages a portion of the intermediate portion of the spring pin terminal. The second contact portion includes a contact point that engages a second electrically conductive structure and a retention force and alignment support that engages the intermediate portion of the spring pin terminal.
    Type: Application
    Filed: July 20, 2021
    Publication date: January 26, 2023
    Applicant: Lear Corporation
    Inventor: Hyoun Lee
  • Patent number: 11562964
    Abstract: In one example, a semiconductor device comprises a first substrate comprising a first conductive structure, a first body over the first conductive structure and comprising an inner sidewall defining a cavity in the first body, a first interface dielectric over the first body, and a first internal interconnect in the first body and the first interface dielectric, and coupled with the first conductive structure. The semiconductor device further comprises a second substrate over the first substrate and comprising a second interface dielectric, a second body over the second interface dielectric, and a second conductive structure over the second body and comprising a second internal interconnect in the second body and the second interface dielectric. An electronic component is in the cavity, and the second internal interconnect is coupled with the first internal interconnect. Other examples and related methods are also disclosed herein.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: January 24, 2023
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Jin Young Khim, Won Chul Do, Sang Hyoun Lee, Ji Hun Yi, Ji Yeon Ryu
  • Patent number: 11469539
    Abstract: A sealed electrical connector assembly includes a connector housing having a first end, a second end, and an opening that extends from the first end to the second end. The opening defines an inner surface of the connector housing. A seal is disposed within the opening of the connector housing and includes a first end, a second end, an outer surface, and a slot that extends from the first end of the seal to the second end of the seal. The outer surface of the seal is in sealing engagement with the inner surface of the connector housing, and the slot defines an inner surface of the seal. A flat flexible conductor disposed within the slot of the seal and includes a plurality of electrically conductive traces and an outer surface. The outer surface of the flat flexible conductor is in sealing engagement with the inner surface of the seal.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: October 11, 2022
    Assignee: Lear Corporation
    Inventors: Hyoun Lee, Lewis Galligan
  • Publication number: 20220214247
    Abstract: The present disclosure relates to a sensor boss, a sensor assembly and an exhaust system, wherein the sensor boss comprises a base and a fluid channel, the base comprises a base body and a mounting hole penetrating the base body, the mounting hole is used to install a sensor through it, the base body is used to fix the sensor boss on a fluid pipeline, and the fluid channel extends from an inlet end to an outlet end in a first direction to accommodate a probe of the sensor.
    Type: Application
    Filed: January 4, 2022
    Publication date: July 7, 2022
    Inventors: Gerard BERTRAN, Chi-Hyoun LEE, Vinothkumar SINGARAVEL
  • Publication number: 20220209456
    Abstract: A sealed electrical connector assembly includes a connector housing having a first end, a second end, and an opening that extends from the first end to the second end. The opening defines an inner surface of the connector housing. A seal is disposed within the opening of the connector housing and includes a first end, a second end, an outer surface, and a slot that extends from the first end of the seal to the second end of the seal. The outer surface of the seal is in sealing engagement with the inner surface of the connector housing, and the slot defines an inner surface of the seal. A flat flexible conductor disposed within the slot of the seal and includes a plurality of electrically conductive traces and an outer surface. The outer surface of the flat flexible conductor is in sealing engagement with the inner surface of the seal.
    Type: Application
    Filed: December 29, 2020
    Publication date: June 30, 2022
    Applicant: Lear Corporation
    Inventors: Hyoun Lee, Lewis Galligan
  • Publication number: 20220109255
    Abstract: An electrical connector assembly includes an electrically conductive structure having a flat flexible conductor that supports a plurality of electrically conductive traces. A wire contact wedge includes a base having an opening extending therethrough and first and second wedge arms that extend from the base. The electrically conductive structure extends through the opening of the base and between the first and second wedge arms. A connector housing supports the wire contact wedge and the electrically conductive structure. The connector housing includes a body having an abutment surface that engages a corresponding abutment surface of the base of the wire contact wedge. A front cover is supported on the connector housing and includes a retaining arm that cooperates with a corresponding protrusion provided on the wire contact wedge.
    Type: Application
    Filed: October 7, 2020
    Publication date: April 7, 2022
    Applicant: Lear Corporation
    Inventors: Hyoun Lee, Lewis Galligan
  • Patent number: 11296438
    Abstract: An electrical connector assembly includes an electrically conductive structure having a flat flexible conductor that supports a plurality of electrically conductive traces. A wire contact wedge includes a base having an opening extending therethrough and first and second wedge arms that extend from the base. The electrically conductive structure extends through the opening of the base and between the first and second wedge arms. A connector housing supports the wire contact wedge and the electrically conductive structure. The connector housing includes a body having an abutment surface that engages a corresponding abutment surface of the base of the wire contact wedge. A front cover is supported on the connector housing and includes a retaining arm that cooperates with a corresponding protrusion provided on the wire contact wedge.
    Type: Grant
    Filed: October 7, 2020
    Date of Patent: April 5, 2022
    Assignee: Lear Corporation
    Inventors: Hyoun Lee, Lewis Galligan
  • Publication number: 20210296248
    Abstract: In one example, a semiconductor device, comprises a first redistribution layer (RDL) substrate comprising a first dielectric structure and a first conductive structure through the first dielectric structure and comprising one or more first conductive redistribution layers, an electronic component over the first RDL substrate, wherein the electronic component is coupled with the first conductive structure, a body over a top side of the first RDL substrate, wherein the electronic component is in the body, a second RDL substrate comprising a second dielectric structure over the body, and a second conductive structure through the second dielectric structure and comprising one or more second conductive redistribution layers, and an internal interconnect coupled between the first conductive structure and the second conductive structure. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: March 17, 2020
    Publication date: September 23, 2021
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Jin Young Khim, Won Chul Do, Sang Hyoun Lee, Ji Hun Yi, Ji Yeon Ryu
  • Publication number: 20210296249
    Abstract: In one example, a semiconductor device comprises a first substrate comprising a first conductive structure, a first body over the first conductive structure and comprising an inner sidewall defining a cavity in the first body, a first interface dielectric over the first body, and a first internal interconnect in the first body and the first interface dielectric, and coupled with the first conductive structure. The semiconductor device further comprises a second substrate over the first substrate and comprising a second interface dielectric, a second body over the second interface dielectric, and a second conductive structure over the second body and comprising a second internal interconnect in the second body and the second interface dielectric. An electronic component is in the cavity, and the second internal interconnect is coupled with the first internal interconnect. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: June 30, 2020
    Publication date: September 23, 2021
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Jin Young Khim, Won Chul Do, Sang Hyoun Lee, Ji Hun Yi, Ji Yeon Ryu
  • Publication number: 20210020605
    Abstract: A semiconductor package structure and a method for making a semiconductor package. As non-limiting examples, various aspects of this disclosure provide various semiconductor package structures, and methods for making thereof, that comprise a connect die that routes electrical signals between a plurality of other semiconductor die.
    Type: Application
    Filed: September 22, 2020
    Publication date: January 21, 2021
    Inventors: David Hiner, Michael Kelly, Ronald Huemoeller, In Su Mok, Sang Hyoun Lee, Won Chul Do, Jin Young Khim
  • Publication number: 20150263210
    Abstract: Provided are a CIS/CGS/CIGS thin-film manufacturing method and a solar cell manufactured by using the same. The CIS/CGS/CIGS thin-film manufacturing method enables CIS, CGS, and CIGS thin-films through depositing an electrode layer on a substrate and depositing a light absorber layer by sputtering a single target of each of CIS including copper (Cu), indium (In), and selenium (Se) and CGS copper (Cu), gallium (Ga) and selenium (Se). In addition, a solar cell having excellent structural, optical and electrical properties is prepared by using the same. Thus, a thin-film can be prepared by depositing a CIG, CGS, or CIGS light absorber layer with a single sputtering process by using a single target of each of CIS (CuInSe2) and CGS (CuGaSe2), to thereby enable to manufacture thin-films of various characteristics according to a control of a composition ratio of In and Ga as well as simplification of the process, and to thus provide a very favorable effect on the economics and efficiency.
    Type: Application
    Filed: December 26, 2012
    Publication date: September 17, 2015
    Inventors: Tae Won Kim, Jae Cheol Park, Ho Sung Kim, Ik Hyun Oh, Jeon Ryang Lee, Bo Ra Koo, Seung Hyoun Lee