Abstract: A semiconductor memory device includes a memory cell array, an error correction circuit, an error log register and a control logic circuit. The memory cell array includes a plurality of memory bank arrays and each of the memory bank arrays includes a plurality of pages. The control logic circuit is configured to control the error correction circuit to perform an ECC decoding sequentially on some of the pages designated at least one access address for detecting at least one bit error, in response to a first command received from a memory controller. The control logic circuit performs an error logging operation to write page error information into the error log register and the page error information includes a number of error occurrence on each of the some pages determined from the detecting.

Abstract: A support plate for a protection module, and a battery module including the same. A support plate for a protection module of a battery module includes: a plate-shaped plate portion; and a support unit protruded or recessed from the plate portion and coupled to a protection member configured to control charging and discharging of a rechargeable battery, and the plate portion and the support unit are integrally formed.

Abstract: Provided is a SoC, a memory device, an electronic device and a method for storing data in an electronic device. The electronic device comprises a host configured to output data, and a memory device including a memory storage configured to receive the data and to store the data. The host is configured to generate data bus inversion (DBI) information on the data to be provided to the memory device in accordance with a data parallelizing system, the data parallelizing system being inside the memory device, and to provide the DBI information to the memory device. The memory device is configured to provide the data to the memory storage, the data output from the host, the data encoded in accordance with the DBI information, the providing the data being in accordance with the data parallelizing system.

Abstract: A memory device includes: a memory cell array including a security region configured to store security data; and a security management circuit configured to store a guard key and, responsive to receiving a data operation command for the security region, limit a data operation for the security region by comparing the guard key with an input password that is received by the memory device.

Abstract: A semiconductor memory device includes a memory cell array, an error correction circuit, an error log register and a control logic circuit. The memory cell array includes a plurality of memory bank arrays and each of the memory bank arrays includes a plurality of pages. The control logic circuit is configured to control the error correction circuit to perform an ECC decoding sequentially on some of the pages designated at least one access address for detecting at least one bit error, in response to a first command received from a memory controller. The control logic circuit performs an error logging operation to write page error information into the error log register and the page error information includes a number of error occurrence on each of the some pages determined from the detecting.

Abstract: A smart home service which is capable of providing an environment in which calling a control command for a device is available via a user terminal protocol to control between the device and a user terminal based on different type of protocol and a control method for the same. The smart home service server connecting at least one device operated based on a first protocol to at least one user terminal operated based on a second protocol, includes an application programming interface (API) controller configured to allow a control command for the at least one device to be called via the second protocol of the at least one user terminal; a filter configured to convert the called control command according to the first protocol; and a control command transmitter configured to transmit the control command converted according to the first protocol, to the at least one device.

Abstract: A process for treating a petroleum fraction and for efficiently absorbing an organic halogen compound from a fluid mixture of the organic halogen compound and an inorganic halogen compound derived from crude oil. Also disclosed is an improvement in absorption performance of a halogen-compound-absorbing material, thereby reducing the frequency with which the absorbing material is exchanged. The absorbing agent includes attapulgite (palygorskite) having high absorption performance with respect to organic halogen compounds. Also disclosed is an absorption column in which the aforementioned absorbing agent and a halogen-compound-absorbing agent, that includes zinc oxide, are disposed in series, thereby making it possible to raise the treatment performance with respect to a fluid that contains, in high concentrations, the organic halogen compound in addition to the inorganic halogen compound.

Abstract: A method of operating a semiconductor memory device can include receiving data, from a memory controller, at an Error Correction Code (ECC) engine included in the semiconductor memory device, the data including at least one predetermined error. Predetermined parity can be received at the ECC engine, where the predetermined parity is configured to correspond to the data without the at least one predetermined error. A determination can be made whether a number of errors in the data is correctable by the ECC engine using the data including the at least one predetermined error and the predetermined parity.

Abstract: A semiconductor memory device includes a memory cell array, an error correction circuit, an error log register and a control logic circuit. The memory cell array includes a plurality of memory bank arrays and each of the memory bank arrays includes a plurality of pages. The control logic circuit is configured to control the error correction circuit to perform an ECC decoding sequentially on some of the pages designated at least one access address for detecting at least one bit error, in response to a first command received from a memory controller. The control logic circuit performs an error logging operation to write page error information into the error log register and the page error information includes a number of error occurrence on each of the some pages determined from the detecting.

Abstract: Provided is an adhesive composition for labels, including a salt of lysine and citric acid, and chitosan, a method of preparing the adhesive composition, an adhesive sheet including the adhesive composition, and an article including the adhesive sheet.

Abstract: The present invention relates to a polyvinyl-based compound, which maximizes self-healing ability by introducing various functional molecules into a brush of a polyvinyl-based resin, a preparation method thereof, and a polymer coating film produced therefrom.

Abstract: A method of correcting a memory error of a dynamic random-access memory module (DRAM) using a double data rate (DDR) interface, the method includes conducting a memory transaction including multiple bursts with a memory controller to send data from data chips of the DRAM to the memory controller, detecting one or more errors using an ECC chip of the DRAM, determining a number of the bursts having the errors using the ECC chip of the DRAM, determining whether the number of the bursts having the errors is greater than a threshold number, determining a type of the errors, and directing the memory controller based on the determined type of the errors, wherein the DRAM includes a single ECC chip per memory channel.

Abstract: A task mapping method of a NoC semiconductor device includes assigning a first task of a plurality of tasks for node control of the NoC semiconductor device to a first node of a first chip; computing tag values of second tasks of the plurality of tasks which are not assigned to the first node; and assigning the second tasks to a second node according to the tag values.

Abstract: The present invention relates to a compound for release agent and method for preparing the same, and more specifically, to a compound for a release agent that can be coated in an ultra-thin form without thermal deformation even when heat is continuously or discontinuously applied in a continuous evaporator, and a method for preparing the same.

Abstract: Provided is a SoC, a memory device, an electronic device and a method for storing data in an electronic device. The electronic device comprises a host configured to output data, and a memory device including a memory storage configured to receive the data and to store the data. The host is configured to generate data bus inversion (DBI) information on the data to be provided to the memory device in accordance with a data parallelizing system, the data parallelizing system being inside the memory device, and to provide the DBI information to the memory device. The memory device is configured to provide the data to the memory storage, the data output from the host, the data encoded in accordance with the DBI information, the providing the data being in accordance with the data parallelizing system.

Abstract: An agent for removing a halogen gas, such as chlorine, in a waste gas by means of reduction; a method for producing this agent; a method for removing a halogen gas by use of this agent; and a system for removing a halogen gas. The agent for removing the halogen gas contains at least pseudo-boehmite, that serves as a host material, and a sulfur-containing reducing agent, that serves as a guest material. 1-8% by weight of the reducing agent, in terms of elemental sulfur, based on the total amount of the pseudo-boehmite and sulfur-containing reducing agent is present in the agent. At least one inorganic compound selected from among oxides, carbonates salts and hydrocarbon salts of alkaline earth metal elements, transition metal elements and zinc group elements is additionally contained in the agent as a third component.

Abstract: A semiconductor memory device includes a memory cell array, an error correction circuit, an error log register and a control logic circuit. The memory cell array includes a plurality of memory bank arrays and each of the memory bank arrays includes a plurality of pages. The control logic circuit is configured to control the error correction circuit to perform an ECC decoding sequentially on some of the pages designated at least one access address for detecting at least one bit error, in response to a first command received from a memory controller. The control logic circuit performs an error logging operation to write page error information into the error log register and the page error information includes a number of error occurrence on each of the some pages determined from the detecting.

Abstract: A method of correcting a memory error of a dynamic random-access memory module (DRAM) using a double data rate (DDR) interface, the method includes conducting a memory transaction including multiple bursts with a memory controller to send data from data chips of the DRAM to the memory controller, detecting one or more errors using an ECC chip of the DRAM, determining a number of the bursts having the errors using the ECC chip of the DRAM, determining whether the number of the bursts having the errors is greater than a threshold number, determining a type of the errors, and directing the memory controller based on the determined type of the errors, wherein the DRAM includes a single ECC chip per memory channel.

Abstract: The present invention relates to a polyvinyl-based compound, which maximizes self-healing ability by introducing various functional molecules into a brush of a polyvinyl-based resin, a preparation method thereof, and a polymer coating film produced therefrom.

Abstract: Disclosed are a coating apparatus and a coating method. The coating apparatus includes a chamber, a support located in an interior space of the chamber and configured to support a substrate which is to be coated, an ejection nozzle configured to eject a coating material toward the support, and an electric field forming unit configured to form an electric field in a movement path of the coating material to provide kinetic energy for the coating material.