Patents by Inventor Hyung-Jin Lee

Hyung-Jin Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11929140
    Abstract: A memory controller comprising a DMA master device configured to provide a first data group to a non-volatile memory (NVM) device, a program buffer memory configured to temporarily store the first data group before the DMA master device provides the first data group to the NVM device, an exclusive OR computing circuit configured to perform an exclusive OR computation and an accumulation on a plurality of data included in the first data group provided from the program buffer memory to generate a first recovery data, after the DMA master device provides the first data group to the NVM device, and a buffer slave device including a first program recovery buffer memory configured to store the first recovery data and provide the first recovery data from the first program recovery buffer memory to the program buffer memory, in response to a program failure signal, may be provided.
    Type: Grant
    Filed: June 2, 2022
    Date of Patent: March 12, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young Min Lee, Hyung Jin Kim, Seong Wan Hong
  • Patent number: 11929029
    Abstract: A display device includes first and second initialization voltage sources and first and second pixel circuits. The first initialization voltage source provides a first initialization voltage. The second initialization voltage source provides a second initialization voltage less than the first initialization voltage. The first pixel circuit includes a first organic light emitting diode. The second pixel circuit includes a second organic light emitting diode with an organic material having a band gap different from a band gap of an organic material in the first organic light emitting diode. The first pixel circuit is coupled to the first initialization voltage source and the second initialization voltage source. The second pixel circuit is coupled to a single initialization voltage source.
    Type: Grant
    Filed: January 27, 2023
    Date of Patent: March 12, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hyung Jun Park, Yang Wan Kim, Byung Sun Kim, Su Jin Lee, Jae Yong Lee
  • Patent number: 11923882
    Abstract: A hybrid communication device, an operation method thereof, and a communication system including the same are provided. The hybrid communication device includes a contact unit that includes an antenna for receiving a first communication signal and an electrode for receiving a second signal, a switch controller that includes a first switch and a second switch and controls the first switch and the second switch based on a change in capacitance of the electrode, and a signal processing unit that receives at least one of the first communication signal and the second communication signal from the contact unit via the first switch and processes the received signal. The first switch is connected to the contact unit, and the signal processing unit is connected to the first switch.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: March 5, 2024
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Tae Wook Kang, Sung Eun Kim, Hyung-Il Park, Jae-Jin Lee, Hyuk Kim, Kyung Hwan Park, Mi Jeong Park, Kyung Jin Byun, Kwang Il Oh, In Gi Lim
  • Patent number: 11905204
    Abstract: According to an embodiment, a cover glass includes a glass plate forming at least a portion of an electronic device, and a first coat layer deposited on a surface of the glass plate, the first coat layer at least partially including a network structure. The first coat layer includes silicon (Si), oxygen (O), and at least one impurity, and such that Si—O bonds are 80% or more by weight of the first coat layer. A polysilazane-applied coat is laid over one surface of the reinforced glass plate, providing an elegant haze glass cover.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: February 20, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Wook-Tae Kim, In-Gi Kim, Ji-Won Lee, Chang-Soo Lee, Hyung-jin Lee, Gyu-Ha Jo, Yong-Hyun Cho
  • Patent number: 11854445
    Abstract: A method for inspecting a display device includes preparing a target substrate comprising sub-pixels in which light-emitting elements are disposed, dividing each of first regions of the sub-pixels into second regions, obtaining a gray value of each of the second regions, generating a random number using the gray value, calculating a representative value of each of the first regions by reflecting variables in the random number, and summing the representative values of the first regions to calculate a number of light-emitting elements of the sub-pixels.
    Type: Grant
    Filed: February 3, 2021
    Date of Patent: December 26, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hyung Jin Lee, Sang Heon Ye, Se Yoon Oh
  • Publication number: 20230269667
    Abstract: A method for dynamically applying a battery saving technology by a terminal is disclosed. The method comprises transmitting a first message requesting an activation of a battery saving technology dynamic service to an authentication server, receiving a second message being a response to the first message from the authentication server, transmitting and receiving data with a base station in a battery saving technology deactivated state, when response information included in the second message comprises authentication success, and at least one application included in the second message is running, and maintaining a battery saving technology activated state when the application included in the second message is not running.
    Type: Application
    Filed: February 15, 2021
    Publication date: August 24, 2023
    Applicant: KT Corporation
    Inventors: Han-Jin JOH, Hyung-Jin LEE, Youn-Pil JEUNG
  • Publication number: 20230141957
    Abstract: An optical inspection device includes: a barrel; a first light source unit at a first side of the barrel and configured to irradiate light of a first wavelength range through a first light path; a second light source unit at a second side of the barrel, the second side being different from the first side, and configured to irradiate light of a second wavelength range that is different from the first wavelength range through a second light path; and a camera. At least a portion of the first light path is different from the second light path.
    Type: Application
    Filed: May 5, 2022
    Publication date: May 11, 2023
    Inventors: Jeong Moon LEE, Dae Hong KIM, Hyung Jin LEE
  • Patent number: 11621334
    Abstract: Embodiments of the disclosure are in the field of advanced integrated circuit structure fabrication. In an example, an integrated circuit structure includes a fin including silicon. A gate structure is over the fin, the gate structure having a center. A conductive source trench contact is over the fin, the conductive source trench contact having a center spaced apart from the center of the gate structure by a first distance. A conductive drain trench contact is over the fin, the conductive drain trench contact having a center spaced apart from the center of the gate structure by a second distance, the second distance greater than the first distance by a factor of three.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: April 4, 2023
    Assignee: Intel Corporation
    Inventors: Said Rami, Hyung-Jin Lee, Surej Ravikumar, Kinyip Phoa
  • Patent number: 11538803
    Abstract: Embodiments disclosed herein include semiconductor devices and methods of forming such devices. In an embodiment the semiconductor device comprises a first semiconductor layer, where first transistors are fabricated in the first semiconductor layer, and a back end stack over the first transistors. In an embodiment the back end stack comprises conductive traces and vias electrically coupled to the first transistors. In an embodiment, the semiconductor device further comprises a second semiconductor layer over the back end stack, where the second semiconductor layer is a different semiconductor than the first semiconductor layer. In an embodiment, second transistors are fabricated in the second semiconductor layer.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: December 27, 2022
    Assignee: Intel Corporation
    Inventors: Gilbert Dewey, Telesphor Kamgaing, Aleksandar Aleksov, Gerogios Dogiamis, Hyung-Jin Lee
  • Patent number: 11532574
    Abstract: Embodiments may relate to a semiconductor package that includes a die and a package substrate. The package substrate may include one or more cavities that go through the package substrate from a first side of the package substrate that faces the die to a second side of the package substrate opposite the first side. The semiconductor package may further include a waveguide communicatively coupled with the die. The waveguide may extend through one of the one or more cavities such that the waveguide protrudes from the second side of the package substrate. Other embodiments may be described or claimed.
    Type: Grant
    Filed: April 25, 2019
    Date of Patent: December 20, 2022
    Assignee: Intel Coropration
    Inventors: Aleksandar Aleksov, Georgios Dogiamis, Telesphor Kamgaing, Gilbert W. Dewey, Hyung-Jin Lee
  • Patent number: 11515424
    Abstract: Disclosed herein are field-effect transistors with asymmetric gate stacks. An example transistor includes a channel material and an asymmetric gate stack, provided over a portion of the channel material between source and drain (S/D) regions. The gate stack is asymmetric in that a thickness of a gate dielectric of a portion of the gate stack closer to one of the S/D regions is different from that of a portion of the gate stack closer to the other S/D region, and in that a work function (WF) material of a portion of the gate stack closer to one of the S/D regions is different from a WF material of a portion of the gate stack closer to the other S/D region. Transistors as described herein exploit asymmetry in the gate stacks to improve the transistor performance in terms of high breakdown voltage, high gain, and/or high output resistance.
    Type: Grant
    Filed: February 8, 2019
    Date of Patent: November 29, 2022
    Assignee: Intel Corporation
    Inventors: Said Rami, Hyung-Jin Lee, Saurabh Morarka, Guannan Liu, Qiang Yu, Bernhard Sell, Mark Armstrong
  • Patent number: 11437706
    Abstract: Embodiments may relate to an semiconductor package. The semiconductor package may include a die coupled with the face of the package substrate. The semiconductor package may further include a waveguide coupled with the face of the package substrate adjacent to the die, wherein the waveguide is to receive an electromagnetic signal from the die and facilitate conveyance of the electromagnetic signal in a direction parallel to the face of the package substrate. Other embodiments may be described or claimed.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: September 6, 2022
    Assignee: Intel Corporation
    Inventors: Georgios Dogiamis, Aleksandar Aleksov, Telesphor Kamgaing, Gilbert W. Dewey, Hyung-Jin Lee
  • Publication number: 20220241818
    Abstract: The present invention relates to a flat-plate focusing ultrasonic transducer and an acoustic lens composed of an annular array piezoelectric element and methods of manufacturing and designing thereof, more particularly to a flat-plate focusing ultrasonic transducer composed of an annular array piezoelectric element, wherein the annular array piezoelectric element has a plurality of concentric regions which is concentrically arranged in a concentric circle shape with respect to a center point, the concentric region has ring shaped sound insulation regions and piezoelectric regions which are alternatively formed in a direction from the center point to a radius direction, so as to focus a sound wave near a focal point, wherein the piezoelectric regions are composed of a piezoelectric ring that is composed of a piezoelectric material and thus excites a sound wave, the concentric region is in a shape of a flat-plate of which both sides are flat and which has a constant thickness, and each radius of the plurality o
    Type: Application
    Filed: May 20, 2021
    Publication date: August 4, 2022
    Inventors: Yong Tae KIM, Kyung Min BAIK, Sung Mok KIM, Hyung Jin LEE, Il DOH
  • Patent number: 11322059
    Abstract: An aging system according to an embodiment includes an aging pad inspector for inspecting an aging pad of a display device, an aging aligner for aligning the aging pad with a probe, and an aging processor for applying an aging signal to the display device through the aging pad and through the probe.
    Type: Grant
    Filed: September 11, 2019
    Date of Patent: May 3, 2022
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hyun Ae Kim, Kyung Min Lee, Hyung Jin Lee
  • Patent number: 11205410
    Abstract: The anisotropic media has an anisotropic layer, is disposed between outer isotropic media, causes multiple mode transmission on an elastic wave having a predetermined mode incident into the anisotropic media, and has a mode-coupling stiffness constant not zero. A thickness of the anisotropic layer according to modulus of elasticity and excitation frequency satisfies Equation (2) which is a phase matching condition of elastic waves propagating along the same direction or Equation (3) which is a phase matching condition of elastic waves propagating along the opposite direction, to generate mode conversion Fabry-Pérot resonance, ???kqld?kqsd=(2n+1)?, ??Equation (2) ???kqld+kqsd=(2m+1)?, ??Equation (3) kql is wave numbers of anisotropic media with quasi-longitudinal mode. lqs is wave numbers of anisotropic media with quasi-shear mode. d is a thickness of anisotropic media. n and m are integers.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: December 21, 2021
    Inventors: Yoon-young Kim, Xiongwei Yang, Min-woo Kweun, Hyung-jin Lee
  • Publication number: 20210366329
    Abstract: A method for inspecting a display device includes preparing a target substrate comprising sub-pixels in which light-emitting elements are disposed, dividing each of first regions of the sub-pixels into second regions, obtaining a gray value of each of the second regions, generating a random number using the gray value, calculating a representative value of each of the first regions by reflecting variables in the random number, and summing the representative values of the first regions to calculate a number of light-emitting elements of the sub-pixels.
    Type: Application
    Filed: February 3, 2021
    Publication date: November 25, 2021
    Applicant: Samsung Display Co., LTD.
    Inventors: Hyung Jin LEE, Sang Heon YE, Se Yoon OH
  • Patent number: 11108433
    Abstract: Embodiments herein may relate to an interconnect that includes a transceiver, wherein the transceiver is configured to generate a single side band (SSB) signal for communication over a waveguide and a waveguide interconnect to communicate the SSB signal over the waveguide. In an example, an SSB operator is configured to generate the SSB signal and the SSB signal can be generated by use of a finite-impulse response filter. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: August 31, 2021
    Assignee: Intel Corporation
    Inventors: Henning Braunisch, Georgios Dogiamis, Jeff C. Morriss, Hyung-Jin Lee, Richard Dischler, Ajay Balankutty, Telesphor Kamgaing, Said Rami
  • Patent number: 11109461
    Abstract: An LED lighting apparatus capable of color temperature control includes a color temperature controller to receive a color temperature selection signal and output first and second control signals; a LED driver connected a plurality of LED groups; and a LED selection circuit including a first switch connected to a first node to which a rectified voltage is applied and receiving the first control signal, a first LED group selectively connected to the first node by the first switch, a second LED group connected in scales with the first LED group, a third LED group selectively connected to the first node by the first switch, a fourth LED group connected in series with the third LED group, and a second switch for selectively connecting the output terminal of the second LED group or the fourth LED group to the LED driver by receiving the second control signal.
    Type: Grant
    Filed: June 2, 2020
    Date of Patent: August 31, 2021
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Keith Hopwood, Sung Ho Jin, Hyung Jin Lee, Sang Wook Han
  • Patent number: 10992017
    Abstract: Embodiments may relate to a dielectric waveguide that includes a substrate and a waveguide material disposed within the substrate. The dielectric waveguide may further include a waveguide launcher electromagnetically and physically coupled with the waveguide material, wherein the waveguide launcher is exposed at a side of the dielectric substrate. Other embodiments may be described or claimed.
    Type: Grant
    Filed: November 15, 2018
    Date of Patent: April 27, 2021
    Assignee: Intel Corporation
    Inventors: Telesphor Kamgaing, Georgios Dogiamis, Aleksandar Aleksov, Gilbert W. Dewey, Hyung-Jin Lee
  • Patent number: 10964992
    Abstract: There is disclosed in one example an electromagnetic wave launcher apparatus, including: an interface to an electromagnetic waveguide; a first launcher configured to launch a high-frequency electromagnetic signal onto a first cross-sectional portion of the waveguide; and a second launcher configured to launch a lower-frequency electromagnetic signal onto a second cross-sectional portion of the waveguide.
    Type: Grant
    Filed: November 9, 2018
    Date of Patent: March 30, 2021
    Assignee: Intel Corporation
    Inventors: Georgios Dogiamis, Adel A. Elsherbini, Henning Braunisch, Gilbert W. Dewey, Telesphor Kamgaing, Hyung-Jin Lee, Johanna M. Swan