Patents by Inventor Hyung Seok Kim
Hyung Seok Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9197402Abstract: A re-circulating time-to-digital converter (TDC) can include a triggered reference ring oscillator (TRRO) and a delay module. The triggered reference ring oscillator can, when triggered by a reference signal edge, generate a periodic ring oscillator signal with a ring oscillator period that is a selected ratio of a voltage-controlled oscillator (VCO) period. The delay module can store, in a plurality of latches, samples of a VCO signal docked by the periodic ring oscillator signal. Each latch can generate an output of the sample, and each latch output can represent a time difference polarity between VCO signal and TRRO signal. In another example, the re-circulating TDC can include the triggered reference ring oscillator, a digital frequency lock module, and a TDC post-process module. The digital frequency lock module can generate a ring oscillator control signal, which sets the ring oscillator period for the triggered reference ring oscillator.Type: GrantFiled: April 10, 2012Date of Patent: November 24, 2015Assignee: INTEL CORPORATIONInventors: Hyung Seok Kim, Ashoke Ravi, William Y. Li, Kailash Chandrashekar
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Patent number: 9082680Abstract: The inventive concept provides methods for inhibiting the formation of one or more oxides on metal bumps during the formation of solder joint structures and solder joint structures including one or more preservative films. In some embodiments, the solder joint structure includes a metal bump having a preservative film disposed on the surface thereof.Type: GrantFiled: June 28, 2012Date of Patent: July 14, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Ju-Il Choi, Jeong-Gi Jin, Ui-Hyoung Lee, Hyung-Seok Kim, Jeong-Woo Park
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Publication number: 20150147247Abstract: Disclosed is a method of pre-treating molybdenite containing copper. The method includes mixing molybdenite containing copper with sulfuric acid, performing a sulfation reaction through a heating process after the mixing process is performed, performing a water leaching process by putting and stirring water after the sulfation reaction is performed, separating a cake from liquid after the water leaching process is performed, and drying the separated cake.Type: ApplicationFiled: December 13, 2013Publication date: May 28, 2015Applicant: KOREA INSTITUTE OF GEOSCIENCE AND MINERAL RESOURCESInventors: Young-Yoon Choi, Shun-Myung Shin, Chul-Woo Nam, Hyung-Seok Kim
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Patent number: 8986603Abstract: Disclosed is an apparatus for producing low oxygen-content molybdenum powders by reducing MoO3. The apparatus includes a body, a cover to close an upper end of the body, a joint to couple the body with the cover, a bracket located in the body, and a micro-sieve located on an upper portion of the bracket. Metal Mo powders having the oxygen content of 3,000 ppm are obtained by using the apparatus for producing low oxygen-content molybdenum powders by reducing MoO3.Type: GrantFiled: November 13, 2013Date of Patent: March 24, 2015Assignee: Korea Institute of Geoscience and Mineral ResourcesInventors: Hyung-Seok Kim, Jung-Min Oh, Chang-Youl Suh, Back-Kyu Lee, Jae-Won Lim
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Patent number: 8979975Abstract: Disclosed is a method of producing low oxygen-content molybdenum powders by reducing molybdenum trioxide, which includes charging a first reducing agent and the molybdenum trioxide, which are in the direct contact with each other on a micro-sieve on an upper portion of a bracket in a body, charging a second reducing agent in the bracket under the micro-sieve, coupling the body with a cover to close the body, and performing a reduction reaction by raising an internal temperature of the body by performing the first reduction reaction due to direct contact between the first reducing agent and the molybdenum trioxide, and performing the second reduction reaction due to evaporation of the second reducing agent. The first and second reduction reactions are performed at a temperature in a range of 550° C. to 650° C., and a temperature in a range of 1000° C. to 1200° C., respectively.Type: GrantFiled: November 13, 2013Date of Patent: March 17, 2015Assignee: Korea Institute of Geoscience and Mineral ResourcesInventors: Hyung-Seok Kim, Jung-Min Oh, Chang-Youl Suh, Back-Kyu Lee, Jae-Won Lim
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Patent number: 8976583Abstract: Provided are a semiconductor memory device has improved read disturbance characteristics as well as improved retention characteristics at a high temperature, and a reading method thereof. The non-volatile semiconductor memory device includes at least one bit line; and a cell string configured to be coupled with the bit line respectively, and include normal memory cells and dummy memory cells that are alternately coupled with each other, where normal data are programmed and read to and from the normal memory cells, and dummy memory cells are programmed with dummy data.Type: GrantFiled: September 6, 2012Date of Patent: March 10, 2015Assignee: SK Hynix Inc.Inventor: Hyung-Seok Kim
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Patent number: 8941520Abstract: An inverter-driven resistor-ladder digital-to-analog (DAC) converter includes a resistor-ladder network that comprises a resistor for each bit signal of a multi-bit input signal. Each resistor of the resistor-ladder network comprises an input end and an output end. The input end of each resistor is coupled to a corresponding bit signal of the multi-bit input signal, and the output end of each resistor is coupled to an output node of the resistor-ladder network. An output voltage is generated at the output node that is based on the multi-bit input signal. In one exemplary embodiment, the multi-bit input signal is a sigma-delta (??) modulated multi-bit input signal. In another exemplary embodiment, resistance values of the resistors of the resistor-ladder network are related by a binary weighting. In still another exemplary embodiment, resistance values of the resistors of the resistor-ladder network are substantially equal.Type: GrantFiled: September 30, 2011Date of Patent: January 27, 2015Assignee: Intel CorporationInventors: Hyung Seok Kim, Yee W. Li, Ashoke Ravi, Hasnain Lakdawala
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Patent number: 8929148Abstract: A semiconductor memory device includes a plurality of memory blocks configured to include memory cells, a voltage supply circuit configured to supply an erase voltage for an erase operation of a memory block selected from the memory blocks and supply an erase verify voltage and an erase pass voltage for an erase verify operation of the memory block selected from the memory blocks, and a control logic configured to group word lines per specific word lines, when the erase verify operation for the selected memory block is performed, and control the voltage supply circuit so that one or more of the erase verify voltage and the erase pass voltage rise whenever the erase verify operation is performed.Type: GrantFiled: November 10, 2011Date of Patent: January 6, 2015Assignee: SK Hynix Inc.Inventor: Hyung Seok Kim
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Patent number: 8923064Abstract: A semiconductor memory device includes a memory array including a plurality of memory cells, and a peripheral circuit configured to perform an erase operation by supplying a first erase voltage to selected memory cells and perform an erase verify operation by supplying an erase verify voltage to the selected memory cells, wherein the peripheral circuit is configured to increase the first erase voltage to a first level at a first rising rate for a first rising period and increase the first erase voltage to a first target level at a second rising rate lower than the first rising rate for a second rising period.Type: GrantFiled: December 5, 2012Date of Patent: December 30, 2014Assignee: SK Hynix Inc.Inventors: Noh Yong Park, Hyung Seok Kim
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Patent number: 8916000Abstract: A system for producing carbon nanotubes includes a reaction chamber in which a process is performed for producing a carbon nanotube on a synthetic substrate; a station part disposed at one side of the reaction chamber and provided with a first transporter for loading/unloading the synthetic substrate to/from the reaction chamber; a first transporter installed inside the station part for loading/unloading synthetic substrates to/from the reaction chamber; a substrate accommodating part in which a substrate to be loaded to the reaction chamber is accommodated or a synthetic substrate unloaded from the reaction chamber waits; a retrieve part for drawing out a synthetic substrate from the substrate accommodating part to retrieve a carbon nanotube produced on the synthetic substrate; a catalyst coating unit configured for coating a synthetic substrate with a catalyst before the synthetic substrate is accommodated in the substrate accommodating part of the station part; and a second transporter for transporting a sType: GrantFiled: November 29, 2006Date of Patent: December 23, 2014Assignee: Korea Kumho Petrochemical Co., Ltd.Inventors: Sung-Soo Kim, Ho-Soo Hwang, Hyung-Seok Kim, Suk-Won Jang, Suk-Min Choi
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Publication number: 20140333358Abstract: A re-circulating time-to-digital converter (TDC) can include a triggered reference ring oscillator (TRRO) and a delay module. The triggered reference ring oscillator can, when triggered by a reference signal edge, generate a periodic ring oscillator signal with a ring oscillator period that is a selected ratio of a voltage-controlled oscillator (VCO) period. The delay module can store, in a plurality of latches, samples of a VCO signal docked by the periodic ring oscillator signal. Each latch can generate an output of the sample, and each latch output can represent a time difference polarity between VCO signal and TRRO signal. In another example, the re-circulating TDC can include the triggered reference ring oscillator, a digital frequency lock module, and a TDC post-process module. The digital frequency lock module can generate a ring oscillator control signal, which sets the ring oscillator period for the triggered reference ring oscillator.Type: ApplicationFiled: April 10, 2012Publication date: November 13, 2014Inventors: Hyung Seok Kim, Ashoke Ravi, William Y. Li, Kailash Chandrashekar
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Patent number: 8811083Abstract: A semiconductor memory device and a method of operating the same include a circuit group configured to apply a program maintaining voltage between the program prohibition voltage and the program permission voltage to bit lines connected to programmed memory cells to prevent a decrease in threshold voltage.Type: GrantFiled: August 31, 2012Date of Patent: August 19, 2014Assignee: SK Hynix Inc.Inventor: Hyung Seok Kim
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Publication number: 20140217138Abstract: The present invention relates to a shoulder-mounted multifunctional hanging device having a structure for fitting onto the body of a user. The shoulder-mounted multifunctional hanging device having a body-fitting structure comprises: a first support unit having a connection portion extending in the lateral direction, and a concave portion contacting the acromion; a second support unit extending from the first support unit and mounted on supraspinatus; and a recess unit that is recessed up to the area in which the first support unit and the second unit are connected. The shoulder-mounted multifunctional hanging device of the present invention is shaped to fit to the structure of the shoulder of a user, and the user may thus be administered an infusion solution in a more comfortable manner without inconvenience to the shoulder.Type: ApplicationFiled: October 5, 2012Publication date: August 7, 2014Applicant: Mobiu Co., Ltd.Inventor: Hyung-Seok Kim
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Publication number: 20140151944Abstract: Disclosed is an apparatus for producing low oxygen-content molybdenum powders by reducing MoO3. The apparatus includes a body, a cover to close an upper end of the body, a joint to couple the body with the cover, a bracket located in the body, and a micro-sieve located on an upper portion of the bracket. Metal Mo powders having the oxygen content of 3,000 ppm are obtained by using the apparatus for producing low oxygen-content molybdenum powders by reducing MoO3.Type: ApplicationFiled: November 13, 2013Publication date: June 5, 2014Applicant: KOREA INSTITUTE OF GEOSCIENCE AND MINERAL RESOURCESInventors: Hyung-Seok KIM, Jung-Min Oh, Chang-Youl Suh, Back-Kyu Lee, Jae-Won Lim
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Publication number: 20140144291Abstract: Disclosed is a method of producing low oxygen-content molybdenum powders by reducing molybdenum trioxide, which includes charging a first reducing agent and the molybdenum trioxide, which are in the direct contact with each other on a micro-sieve on an upper portion of a bracket in a body, charging a second reducing agent in the bracket under the micro-sieve, coupling the body with a cover to close the body, and performing a reduction reaction by raising an internal temperature of the body by performing the first reduction reaction due to direct contact between the first reducing agent and the molybdenum trioxide, and performing the second reduction reaction due to evaporation of the second reducing agent. The first and second reduction reactions are performed at a temperature in a range of 550° C. to 650° C., and a temperature in a range of 1000° C. to 1200° C., respectively.Type: ApplicationFiled: November 13, 2013Publication date: May 29, 2014Applicant: KOREA INSTITUTE OF GEOSCIENCE AND MINERAL RESOURCESInventors: Hyung-Seok KIM, Jung-Min Oh, Chang-Youl Suh, Back-Kyu Lee, Jae-Won Lim
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Patent number: 8597973Abstract: Discussed are an ink containing nanoparticles for formation of thin film of a solar cell and its preparation method, CIGS thin film solar cell having at least one light absorption layer formed by coating or printing the above ink containing nanoparticles on a rear electrode, and a process for manufacturing the same. More particularly, the above absorption layer includes Cu, In, Ga and Se elements as constitutional ingredients thereof and such elements exist in the light absorption layer by coating or printing an ink that contains Cu2Se nanoparticles and (In,Ga)2Se3 nanoparticles on the rear electrode, and heating the treated electrode with the ink. Since Cu(In,Ga)Se2 (CIGS) thin film is formed using the ink containing nanoparticles, a simple process is used without requirement of vacuum processing or complex equipment and particle size of the thin film, Ga doping concentration, etc., can be easily regulated.Type: GrantFiled: December 27, 2011Date of Patent: December 3, 2013Assignee: LG Electronics Inc.Inventors: Young-Ho Choe, Young-Hee Lee, Yong-Woo Choi, Hyung-Seok Kim, Ho-Gyoung Kim
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Publication number: 20130308380Abstract: Provided are a semiconductor memory device has improved read disturbance characteristics as well as improved retention characteristics at a high temperature, and a reading method thereof. The non-volatile semiconductor memory device includes at least one bit line; and a cell string configured to be coupled with the bit line respectively, and include normal memory cells and dummy memory cells that are alternately coupled with each other, where normal data are programmed and read to and from the normal memory cells, and dummy memory cells are programmed with dummy data.Type: ApplicationFiled: September 6, 2012Publication date: November 21, 2013Inventor: Hyung-Seok KIM
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Publication number: 20130271305Abstract: An inverter-driven resistor-ladder digital-to-analog (DAC) converter includes a resistor-ladder network that comprises a resistor for each bit signal of a multi-bit input signal. Each resistor of the resistor-ladder network comprises an input end and an output end. The input end of each resistor is coupled to a corresponding bit signal of the multi-bit input signal, and the output end of each resistor is coupled to an output node of the resistor-ladder network. An output voltage is generated at the output node that is based on the multi-bit input signal. In one exemplary embodiment, the multi-bit input signal is a sigma-delta (??) modulated multi-bit input signal. In another exemplary embodiment, resistance values of the resistors of the resistor-ladder network are related by a binary weighting. In still another exemplary embodiment, resistance values of the resistors of the resistor-ladder network are substantially equal.Type: ApplicationFiled: September 30, 2011Publication date: October 17, 2013Inventors: Hyung Seok Kim, Yee W. Li, Ashoke Ravi, Hasnain Lakdawala
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Patent number: 8526239Abstract: A semiconductor memory device includes a memory string coupled to a bit line, a page buffer configured to sense a sensing current of the bit line in an erase verification operation or a program verification operation, and a sensing control circuit configured to differently set a level of the sensing current in the erase verification operation and the program verification operation in order to sense the threshold voltage level of a selected memory cell of the memory string.Type: GrantFiled: April 28, 2011Date of Patent: September 3, 2013Assignee: Hynix Semiconductor Inc.Inventor: Hyung Seok Kim
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Publication number: 20130163334Abstract: A semiconductor memory device and a method of operating the same include a circuit group configured to apply a program maintaining voltage between the program prohibition voltage and the program permission voltage to bit lines connected to programmed memory cells to prevent a decrease in threshold voltage.Type: ApplicationFiled: August 31, 2012Publication date: June 27, 2013Applicant: SK hynix Inc.Inventor: Hyung Seok KIM