Patents by Inventor Igor Sankin

Igor Sankin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7820511
    Abstract: Wide bandgap semiconductor devices including normally-off VJFET integrated power switches are described. The power switches can be implemented monolithically or hybridly, and may be integrated with a control circuit built in a single- or multi-chip wide bandgap power semiconductor module. The devices can be used in high-power, temperature-tolerant and radiation-resistant electronics components. Methods of making the devices are also described.
    Type: Grant
    Filed: July 6, 2007
    Date of Patent: October 26, 2010
    Assignee: SemiSouth Laboratories, Inc.
    Inventors: Igor Sankin, Joseph Neil Merrett
  • Publication number: 20100212730
    Abstract: A photovoltaic cell can include a substrate having a transparent conductive oxide layer, a CdS/CdTe layer, and a back metal contact. The back metal contact can be deposited by sputtering or by chemical vapor deposition.
    Type: Application
    Filed: December 17, 2009
    Publication date: August 26, 2010
    Applicant: First Solar, Inc.
    Inventor: Igor Sankin
  • Publication number: 20090278177
    Abstract: Semiconductor devices are described wherein current flow in the device is confined between the rectifying junctions (e.g., p-n junctions or metal-semiconductor junctions). The device provides non-punch-through behavior and enhanced current conduction capability. The devices can be power semiconductor devices as such as Junction Field-Effect Transistors (VJFETs), Static Induction Transistors (SITs), Junction Field Effect Thyristors, or JFET current limiters. The devices can be made in wide bandgap semiconductors such as silicon carbide (SiC). According to some embodiments, the device can be a normally-off SiC vertical junction field effect transistor. Methods of making the devices and circuits comprising the devices are also described.
    Type: Application
    Filed: May 8, 2008
    Publication date: November 12, 2009
    Applicant: SemiSouth Laboratories, Inc.
    Inventors: Igor Sankin, David C. Sheridan, Joseph Neil Merrett
  • Patent number: 7560325
    Abstract: Methods of making a semiconductor device such as a lateral junction field effect transistor (JFET) are described. The methods are self-aligned and involve selective epitaxial growth using a regrowth mask material to form the gate or the source/drain regions of the device. The methods can eliminate the need for ion implantation. The device can be made from a wide band-gap semiconductor material such as SiC. The regrowth mask material can be TaC. The devices can be used in harsh environments including applications involving exposure to radiation and/or high temperatures.
    Type: Grant
    Filed: April 14, 2008
    Date of Patent: July 14, 2009
    Assignee: SemiSouth Laboratories, Inc.
    Inventors: Joseph Neil Merrett, Igor Sankin
  • Patent number: 7556994
    Abstract: Wide bandgap semiconductor devices including normally-off VJFET integrated power switches are described. The power switches can be implemented monolithically or hybridly, and may be integrated with a control circuit built in a single-or multi-chip wide bandgap power semiconductor module. The devices can be used in high-power, temperature-tolerant and radiation-resistant electronics components. Methods of making the devices are also described.
    Type: Grant
    Filed: April 6, 2007
    Date of Patent: July 7, 2009
    Assignee: SemiSouth Laboratories, Inc.
    Inventors: Igor Sankin, Joseph N. Merrett
  • Patent number: 7510921
    Abstract: A self-aligned silicon carbide power MESFET with improved current stability and a method of making the device are described. The device, which includes raised source and drain regions separated by a gate recess, has improved current stability as a result of reduced surface trapping effects even at low gate biases. The device can be made using a self-aligned process in which a substrate comprising an n+-doped SiC layer on an n-doped SiC channel layer is etched to define raised source and drain regions (e.g., raised fingers) using a metal etch mask. The metal etch mask is then annealed to form source and drain ohmic contacts. A single- or multilayer dielectric film is then grown or deposited and anisotropically etched. A Schottky contact layer and a final metal layer are subsequently deposited using evaporation or another anisotropic deposition technique followed by an optional isotropic etch of dielectric layer or layers.
    Type: Grant
    Filed: January 30, 2007
    Date of Patent: March 31, 2009
    Assignee: SemiSouth Laboratories, Inc.
    Inventors: Igor Sankin, Janna B. Casady, Joseph N. Merrett
  • Patent number: 7470967
    Abstract: A self-aligned silicon carbide power MESFET with improved current stability and a method of making the device are described. The device, which includes raised source and drain regions separated by a gate recess, has improved current stability as a result of reduced surface trapping effects even at low gate biases. The device can be made using a self-aligned process in which a substrate comprising an n+-doped SiC layer on an n-doped SiC channel layer is etched to define raised source and drain regions (e.g., raised fingers) using a metal etch mask. The metal etch mask is then annealed to form source and drain ohmic contacts. A single- or multilayer dielectric film is then grown or deposited and anisotropically etched. A Schottky contact layer and a final metal layer are subsequently deposited using evaporation or another anisotropic deposition technique followed by an optional isotropic etch of dielectric layer or layers.
    Type: Grant
    Filed: March 11, 2005
    Date of Patent: December 30, 2008
    Assignee: SemiSouth Laboratories, Inc.
    Inventors: Igor Sankin, Janna B. Casady, Joseph N. Merrett
  • Publication number: 20080258184
    Abstract: Wide bandgap semiconductor devices including normally-off VJFET integrated power switches are described. The power switches can be implemented monolithically or hybridly, and may be integrated with a control circuit built in a single- or multi-chip wide bandgap power semiconductor module. The devices can be used in high-power, temperature-tolerant and radiation-resistant electronics components. Methods of making the devices are also described.
    Type: Application
    Filed: July 6, 2007
    Publication date: October 23, 2008
    Inventors: Igor Sankin, Joseph Neil Merrett
  • Publication number: 20080160685
    Abstract: A wide bandgap semiconductor device with surge current protection and a method of making the device are described. The device comprises a low doped n-type region formed by plasma etching through the first epitaxial layer grown on a heavily doped n-type substrate and a plurality of heavily doped p-type regions formed by plasma etching through the second epitaxial layer grown on the first epitaxial layer. Ohmic contacts are formed on p-type regions and on the backside of the n-type substrate. Schottky contacts are formed on the top surface of the n-type region. At normal operating conditions, the current in the device flows through the Schottky contacts. The device, however, is capable of withstanding extremely high current densities due to conductivity modulation caused by minority carrier injection from p-type regions.
    Type: Application
    Filed: June 28, 2007
    Publication date: July 3, 2008
    Inventors: Igor Sankin, Joseph Neil Merrett
  • Publication number: 20080093637
    Abstract: A vertical junction field effect transistor (VJFET) having a mesa termination and a method of making the device are described. The device includes: an n-type mesa on an n-type substrate; a plurality of raised n-type regions on the mesa comprising an upper n-type layer on a lower n-type layer; p-type regions between and adjacent the raised n-type regions and along a lower sidewall portion of the raised regions; dielectric material on the sidewalls of the raised regions, on the p-type regions and on the sidewalls of the mesa; and electrical contacts to the substrate (drain), p-type regions (gate) and the upper n-type layer (source). The device can be made in a wide-bandgap semiconductor material such as SiC. The method includes selectively etching through an n-type layer using a mask to form the raised regions and implanting p-type dopants into exposed surfaces of an underlying n-type layer using the mask.
    Type: Application
    Filed: August 10, 2007
    Publication date: April 24, 2008
    Applicant: SEMISOUTH LABORATORIES, INC.
    Inventors: Igor SANKIN, Joseph MERRETT
  • Publication number: 20080061362
    Abstract: Junction field-effect transistors with vertical channels and self-aligned regrown gates and methods of making these devices are described. The methods use techniques to selectively grow and/or selectively remove semiconductor material to form a p-n junction gate along the sides of the channel and on the bottom of trenches separating source fingers. Methods of making bipolar junction transistors with self-aligned regrown base contact regions and methods of making these devices are also described. The semiconductor devices can be made in silicon carbide.
    Type: Application
    Filed: November 5, 2007
    Publication date: March 13, 2008
    Applicant: SEMISOUTH LABORATORIES, INC.
    Inventors: Joseph Merrett, Igor Sankin
  • Patent number: 7314799
    Abstract: Junction field-effect transistors with vertical channels and self-aligned regrown gates and methods of making these devices are described. The methods use techniques to selectively grow and/or selectively remove semiconductor material to form a p-n junction gate along the sides of the channel and on the bottom of trenches separating source fingers. Methods of making bipolar junction transistors with self-aligned regrown base contact regions and methods of making these devices are also described. The semiconductor devices can be made in silicon carbide.
    Type: Grant
    Filed: December 5, 2005
    Date of Patent: January 1, 2008
    Assignee: SemiSouth Laboratories, Inc.
    Inventors: Joseph Neil Merrett, Igor Sankin
  • Publication number: 20070275527
    Abstract: Junction field-effect transistors with vertical channels and self-aligned regrown gates and methods of making these devices are described. The methods use techniques to selectively grow and/or selectively remove semiconductor material to form a p-n junction gate along the sides of the channel and on the bottom of trenches separating source fingers. Methods of making bipolar junction transistors with self-aligned regrown base contact regions and methods of making these devices are also described. The semiconductor devices can be made in silicon carbide.
    Type: Application
    Filed: December 5, 2005
    Publication date: November 29, 2007
    Inventors: Joseph Merrett, Igor Sankin
  • Publication number: 20070243668
    Abstract: Wide bandgap semiconductor devices including normally-off VJFET integrated power switches are described. The power switches can be implemented monolithically or hybridly, and may be integrated with a control circuit built in a single- or multi-chip wide bandgap power semiconductor module. The devices can be used in high-power, temperature-tolerant and radiation-resistant electronics components. Methods of making the devices are also described.
    Type: Application
    Filed: April 6, 2007
    Publication date: October 18, 2007
    Inventors: Igor Sankin, Joseph Merrett
  • Patent number: 7274083
    Abstract: A wide bandgap semiconductor device with surge current protection and a method of making the device are described. The device comprises a low doped n-type region formed by plasma etching through the first epitaxial layer grown on a heavily doped n-type substrate and a plurality of heavily doped p-type regions formed by plasma etching through the second epitaxial layer grown on the first epitaxial layer. Ohmic contacts are formed on p-type regions and on the backside of the n-type substrate. Schottky contacts are formed on the top surface of the n-type region. At normal operating conditions, the current in the device flows through the Schottky contacts. The device, however, is capable of withstanding extremely high current densities due to conductivity modulation caused by minority carrier injection from p-type regions.
    Type: Grant
    Filed: May 2, 2006
    Date of Patent: September 25, 2007
    Assignee: Semisouth Laboratories, Inc.
    Inventors: Igor Sankin, Joseph Neil Merrett
  • Patent number: 7242040
    Abstract: A junction field effect transistor is described. The transistor is made from a wide bandgap semiconductor material. The device comprises source, channel, drift and drain semiconductor layers, as well as p-type implanted or Schottky gate regions. The source, channel, drift and drain layers can be epitaxially grown. The ohmic contacts to the source, gate, and drain regions can be formed on the same side of the wafer. The devices can have different threshold voltages depending on the vertical channel width and can be implemented for both depletion and enhanced modes of operation for the same channel doping. The devices can be used for digital, analog, and monolithic microwave integrated circuits. Methods for making the transistors and integrated circuits comprising the devices are also described.
    Type: Grant
    Filed: August 18, 2006
    Date of Patent: July 10, 2007
    Assignee: Semisouth Laboratories, Inc.
    Inventors: Igor Sankin, Jeffrey B. Casady, Joseph N. Merrett
  • Publication number: 20070122951
    Abstract: A self-aligned silicon carbide power MESFET with improved current stability and a method of making the device are described. The device, which includes raised source and drain regions separated by a gate recess, has improved current stability as a result of reduced surface trapping effects even at low gate biases. The device can be made using a self-aligned process in which a substrate comprising an n+-doped SiC layer on an n-doped SiC channel layer is etched to define raised source and drain regions (e.g., raised fingers) using a metal etch mask. The metal etch mask is then annealed to form source and drain ohmic contacts. A single- or multilayer dielectric film is then grown or deposited and anisotropically etched. A Schottky contact layer and a final metal layer are subsequently deposited using evaporation or another anisotropic deposition technique followed by an optional isotropic etch of dielectric layer or layers.
    Type: Application
    Filed: January 30, 2007
    Publication date: May 31, 2007
    Inventors: Igor Sankin, Janna Casady, Joseph Merrett
  • Patent number: 7202528
    Abstract: Wide bandgap semiconductor devices including normally-off VJFET integrated power switches are described. The power switches can be implemented monolithically or hybridly, and may be integrated with a control circuit built in a single-or multi-chip wide bandgap power semiconductor module. The devices can be used in high-power, temperature-tolerant and radiation-resistant electronics components. Methods of making the devices are also described.
    Type: Grant
    Filed: December 1, 2004
    Date of Patent: April 10, 2007
    Assignee: Semisouth Laboratories, Inc.
    Inventors: Igor Sankin, Joseph N. Merrett
  • Publication number: 20070012946
    Abstract: A junction field effect transistor is described. The transistor is made from a wide bandgap semiconductor material. The device comprises source, channel, drift and drain semiconductor layers, as well as p-type implanted or Schottky gate regions. The source, channel, drift and drain layers can be epitaxially grown. The ohmic contacts to the source, gate, and drain regions can be formed on the same side of the wafer. The devices can have different threshold voltages depending on the vertical channel width and can be implemented for both depletion and enhanced modes of operation for the same channel doping. The devices can be used for digital, analog, and monolithic microwave integrated circuits. Methods for making the transistors and integrated circuits comprising the devices are also described.
    Type: Application
    Filed: August 18, 2006
    Publication date: January 18, 2007
    Inventors: Igor Sankin, Jeffrey Casady, Joseph Merrett
  • Patent number: 7119380
    Abstract: A junction field effect transistor is described. The transistor is made from a wide bandgap semiconductor material. The device comprises source, channel, drift and drain semiconductor layers, as well as p-type implanted or Schottky gate regions. The source, channel, drift and drain layers can be epitaxially grown. The ohmic contacts to the source, gate, and drain regions can be formed on the same side of the wafer. The devices can have different threshold voltages depending on the vertical channel width and can be implemented for both depletion and enhanced modes of operation for the same channel doping. The devices can be used for digital, analog, and monolithic microwave integrated circuits. Methods for making the transistors and integrated circuits comprising the devices are also described.
    Type: Grant
    Filed: December 1, 2004
    Date of Patent: October 10, 2006
    Assignee: SemiSouth Laboratories, Inc.
    Inventors: Igor Sankin, Jeffrey B. Casady, Joseph N. Merrett