Patents by Inventor Igor Sankin

Igor Sankin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060113593
    Abstract: Wide bandgap semiconductor devices including normally-off VJFET integrated power switches are described. The power switches can be implemented monolithically or hybridly, and may be integrated with a control circuit built in a single-or multi-chip wide bandgap power semiconductor module. The devices can be used in high-power, temperature-tolerant and radiation-resistant electronics components. Methods of making the devices are also described.
    Type: Application
    Filed: December 1, 2004
    Publication date: June 1, 2006
    Inventors: Igor Sankin, Joseph Merrett
  • Publication number: 20060113561
    Abstract: A junction field effect transistor is described. The transistor is made from a wide bandgap semiconductor material. The device comprises source, channel, drift and drain semiconductor layers, as well as p-type implanted or Schottky gate regions. The source, channel, drift and drain layers can be epitaxially grown. The ohmic contacts to the source, gate, and drain regions can be formed on the same side of the wafer. The devices can have different threshold voltages depending on the vertical channel width and can be implemented for both depletion and enhanced modes of operation for the same channel doping. The devices can be used for digital, analog, and monolithic microwave integrated circuits. Methods for making the transistors and integrated circuits comprising the devices are also described.
    Type: Application
    Filed: December 1, 2004
    Publication date: June 1, 2006
    Inventors: Igor Sankin, Jeffrey Casady, Joseph Merrett
  • Publication number: 20050199882
    Abstract: A self-aligned silicon carbide power MESFET with improved current stability and a method of making the device are described. The device, which includes raised source and drain regions separated by a gate recess, has improved current stability as a result of reduced surface trapping effects even at low gate biases. The device can be made using a self-aligned process in which a substrate comprising an n+-doped SiC layer on an n-doped SiC channel layer is etched to define raised source and drain regions (e.g., raised fingers) using a metal etch mask. The metal etch mask is then annealed to form source and drain ohmic contacts. A single- or multilayer dielectric film is then grown or deposited and anisotropically etched. A Schottky contact layer and a final metal layer are subsequently deposited using evaporation or another anisotropic deposition technique followed by an optional isotropic etch of dielectric layer or layers.
    Type: Application
    Filed: March 11, 2005
    Publication date: September 15, 2005
    Inventors: Igor Sankin, Janna Casady, Joseph Merrett
  • Patent number: 6815304
    Abstract: Silicon carbide bipolar junction transistors having an overgrown base layer are provided. The bipolar junction transistors can be made with a very thin (e.g., 0.3 &mgr;m or less) base layer while still possessing adequate peripheral base resistance values. Self aligning manufacturing techniques for making the silicon carbide bipolar junction transistors are also provided. Using these techniques, the spacing between emitter and base contacts on the device can be reduced. The silicon carbide bipolar junction transistors can also be provided with edge termination structures such as guard rings to increase the blocking capabilities of the device.
    Type: Grant
    Filed: February 22, 2002
    Date of Patent: November 9, 2004
    Assignee: SemiSouth Laboratories, LLC
    Inventors: Igor Sankin, Janna B. Dufrene
  • Patent number: 6767783
    Abstract: A method of making vertical diodes and transistors in SiC is provided. The method according to the invention uses a mask (e.g., a mask that has been previously used for etching features into the device) for selective epitaxial growth or selective ion implantation. In this manner, the gate and base regions of static induction transistors and bipolar junction transistors can be formed in a self-aligned process. A method of making planar diodes and planar edge termination structures (e.g., guard rings) is also provided.
    Type: Grant
    Filed: July 12, 2002
    Date of Patent: July 27, 2004
    Assignee: Mississippi State University-Research and Technology Corporation (RTC)
    Inventors: Jeffrey B. Casady, Geoffrey E. Carter, Yaroslav Koshka, Michael S. Mazzola, Igor Sankin
  • Patent number: 6693308
    Abstract: Silicon carbide semiconductor power devices having epitaxially grown guard rings edge termination structure are provided. Forming the claimed guard rings from an epitaxially grown SiC layer avoids the traditional problems associated with implantation of guard rings, and permits the use of self aligning manufacturing techniques for making the silicon carbide semiconductor power devices.
    Type: Grant
    Filed: February 22, 2002
    Date of Patent: February 17, 2004
    Assignee: Semisouth Laboratories, LLC
    Inventors: Igor Sankin, Janna B. Dufrene
  • Publication number: 20030160302
    Abstract: Silicon carbide bipolar junction transistors having an overgrown base layer are provided. The bipolar junction transistors can be made with a very thin (e.g., 0.3 &mgr;m or less) base layer while still possessing adequate peripheral base resistance values. Self aligning manufacturing techniques for making the silicon carbide bipolar junction transistors are also provided. Using these techniques, the spacing between emitter and base contacts on the device can be reduced. The silicon carbide bipolar junction transistors can also be provided with edge termination structures such as guard rings to increase the blocking capabilities of the device.
    Type: Application
    Filed: February 22, 2002
    Publication date: August 28, 2003
    Inventors: Igor Sankin, Janna B. Dufrene
  • Publication number: 20030162355
    Abstract: Silicon carbide semiconductor power devices having epitaxially grown guard rings edge termination structure are provided. Forming the claimed guard rings from an epitaxially grown SiC layer avoids the traditional problems associated with implantation of guard rings, and permits the use of self aligning manufacturing techniques for making the silicon carbide semiconductor power devices.
    Type: Application
    Filed: February 22, 2002
    Publication date: August 28, 2003
    Inventors: Igor Sankin, Janna B. Dufrene
  • Publication number: 20030034495
    Abstract: A method of making vertical diodes and transistors in SiC is provided. The method according to the invention uses a mask (e.g., a mask that has been previously used for etching features into the device) for selective epitaxial growth or selective ion implantation. In this manner, the gate and base regions of static induction transistors and bipolar junction transistors can be formed in a self-aligned process. A method of making planar diodes and planar edge termination structures (e.g., guard rings) is also provided.
    Type: Application
    Filed: July 12, 2002
    Publication date: February 20, 2003
    Inventors: Jeffrey B. Casady, Geoffrey E. Carter, Yaroslav Koshka, Michael S. Mazzola, Igor Sankin