Patents by Inventor In-kyeong Yoo

In-kyeong Yoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070267675
    Abstract: A nonvolatile memory device includes at least one switching device and at least one storage node electrically connected to the at least one switching device. The at least one storage node includes a lower electrode, one or more oxygen-deficient metal oxide layers, one or more data storage layers, and an upper electrode. At least one of the one or more metal oxide layers is electrically connected to the lower electrode. At least one of the one or more data storage layers is electrically connected to at least one of the one or more metal oxide layers. The upper electrode is electrically connected to at least one of the one or more data storage layers. A method of manufacturing the nonvolatile memory device includes preparing the at least one switching device and forming the lower electrode, one or more metal oxide layers, one or more data storage layers, and upper electrode.
    Type: Application
    Filed: May 16, 2007
    Publication date: November 22, 2007
    Inventors: Sung-Il Cho, Choong-rae Cho, Eun-hong Lee, In-kyeong Yoo
  • Publication number: 20070257257
    Abstract: A nonvolatile memory device may include a lower electrode, an oxide layer including an amorphous alloy metal oxide disposed on the lower electrode, and a diode structure disposed on the oxide layer.
    Type: Application
    Filed: February 9, 2007
    Publication date: November 8, 2007
    Inventors: Choong-Rae Cho, Sung-Il Cho, In-Kyeong Yoo, Eun-Hong Lee, Chang-Wook Moon
  • Patent number: 7282446
    Abstract: A method of manufacturing a nanochannel-array and a method of fabricating a nanodot using the nanochannel-array are provided. The nanochannel-array manufacturing method includes: performing first anodizing to form a first alumina layer having a channel array formed by a plurality of cavities on an aluminum substrate; etching the first alumina layer to a predetermined depth and forming a plurality of concave portions on the aluminum substrate, wherein each concave portion corresponds to the bottom of each channel of the first alumina layer; and performing second anodizing to form a second alumina layer having an array of a plurality of channels corresponding to the plurality of concave portions on the aluminum substrate. The array manufacturing method makes it possible to obtain finely ordered cavities and form nanoscale dots using the cavities.
    Type: Grant
    Filed: April 7, 2004
    Date of Patent: October 16, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-kyeong Yoo, Soo-hwan Jeong, Sun-ae Seo, In-sook Kim
  • Publication number: 20070207619
    Abstract: A method of manufacturing a nanochannel-array and a method of fabricating a nanodot using the nanochannel-array are provided. The nanochannel-array manufacturing method includes: performing first anodizing to form a first alumina layer having a channel array formed by a plurality of cavities on an aluminum substrate; etching the first alumina layer to a predetermined depth and forming a plurality of concave portions on the aluminum substrate, wherein each concave portion corresponds to the bottom of each channel of the first alumina layer; and performing second anodizing to form a second alumina layer having an array of a plurality of channels corresponding to the plurality of concave portions on the aluminum substrate. The array manufacturing method makes it possible to obtain finely ordered cavities and form nanoscale dots using the cavities.
    Type: Application
    Filed: April 7, 2004
    Publication date: September 6, 2007
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: In-kyeong Yoo, Soo-hwan Jeong, Sun-ae Seo, In-sook Kim
  • Publication number: 20070205456
    Abstract: A nonvolatile memory device having self-presence diode characteristics, and/or a nonvolatile memory array including the nonvolatile memory device may be provided. The nonvolatile memory device may include a lower electrode, a first semiconductor oxide layer on the lower electrode, a second semiconductor oxide layer on the first semiconductor oxide layer, and/or an upper electrode on the second semiconductor oxide layer.
    Type: Application
    Filed: February 28, 2007
    Publication date: September 6, 2007
    Inventors: Myoung-Jae Lee, In-Kyeong Yoo, Eun-Hong Lee, Jong-Wan Kim, Dong-Chul Kim, Seung-Eon Ahn
  • Publication number: 20070200158
    Abstract: An electrode structure having at least two oxide layers that more reliably switch and operate without the use of additional devices and a non-volatile memory device having the same are provided. The electrode structure may include a lower electrode, a first oxide layer formed on the lower electrode, a second oxide layer formed on the first oxide layer and an upper electrode formed on the second oxide layer wherein at least one of the first and second oxide layers may be formed of a resistance-varying material. The first oxide layer may be formed of an oxide having a variable oxidation state.
    Type: Application
    Filed: January 19, 2007
    Publication date: August 30, 2007
    Inventors: Stefanovich Genrikh, Choong-rae Cho, In-kyeong Yoo, Eun-hong Lee, Sung-Il Cho, Chang-wook Moon
  • Patent number: 7256406
    Abstract: An emitter for an electron-beam projection lithography system includes a photoconductor substrate, an insulating layer formed on a front surface of the photoconductor substrate, a gate electrode layer formed on the insulating layer, and a base electrode layer formed on a rear surface of the photoconductor substrate and formed of a transparent conductive material. In operation of the emitter, a voltage is applied between the base electrode and the gate electrode layer, light is projected onto a portion of the photoconductor substrate to convert the portion of the photoconductor substrate into a conductor such that electrons are emitted only from the partial portion where the light is projected. Since the emitter can partially emit electrons, partial correcting, patterning or repairing of a subject electron-resist can be realized.
    Type: Grant
    Filed: October 13, 2004
    Date of Patent: August 14, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-kyeong Yoo, Chang-wook Moon, Chang-hoon Choi
  • Publication number: 20070165434
    Abstract: Resistive memory devices having at least one varistor and methods of operating the same are disclosed. The resistive memory device may include at least one bottom electrode line, at least one top electrode line crossing the at least one bottom electrode line, and at least one stack structure disposed at an intersection of the at least one top electrode line and the at least one bottom electrode line including a varistor and a data storage layer.
    Type: Application
    Filed: January 19, 2007
    Publication date: July 19, 2007
    Inventors: Jung-Hyun Lee, Eun-Hong Lee, Sang-Jun Choi, In-Kyeong Yoo, Myoung-Jae Lee
  • Publication number: 20070126043
    Abstract: A storage node having a metal-insulator-metal structure, a non-volatile memory device including a storage node having a metal-insulator-metal (MIM) structure and a method of operating the same are provided. The memory device may include a switching element and a storage node connected to the switching element. The storage node may include a first metal layer, a first insulating layer and a second metal layer, sequentially stacked, and a nano-structure layer. The storage node may further include a second insulating layer and a third metal layer. The nano-structure layer, which is used as a carbon nano-structure layer, may include at least one fullerene layer.
    Type: Application
    Filed: December 1, 2006
    Publication date: June 7, 2007
    Inventors: Chang-wook Moon, Sang-mock Lee, In-kyeong Yoo, Seung-woon Lee, El Bourim, Eun-hong Lee, Choong-rae Cho
  • Publication number: 20070120580
    Abstract: A memory device may include a switching device and a storage node coupled with the switching device. The storage node may include a first electrode, a second electrode, a data storage layer and at least one contact layer. The data storage layer may be disposed between the first electrode and the second electrode and may include a transition metal oxide or aluminum oxide. The at least one contact layer may be disposed at least one of above or below the data storage layer and may include a conductive metal oxide.
    Type: Application
    Filed: April 14, 2006
    Publication date: May 31, 2007
    Inventors: Dong Kim, In-kyeong Yoo, Myoung-jae Lee, Sun-ae Seo, In-gyu Baek, Seung-eon Ahn, Byoung-ho Park, Young-kwan Cha, Sang-jin Park
  • Publication number: 20070114587
    Abstract: A nonvolatile memory device including one transistor and one resistant material and a method of manufacturing the nonvolatile memory device are provided. The nonvolatile memory device includes a substrate, a transistor formed on the substrate, and a data storage unit connected to a drain of the transistor. The data storage unit includes a data storage material layer having different resistance characteristics in different voltage ranges.
    Type: Application
    Filed: January 18, 2007
    Publication date: May 24, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sun-ae Seo, In-kyeong Yoo, Myoung-jae Lee, Wan-jun Park
  • Publication number: 20070099309
    Abstract: A high-density data storage medium, a method of manufacturing the data storage medium, a high-density data storage apparatus, and methods of writing data on, and reading and erasing data from the data storage medium by using the data storage apparatus are provided. The data storage medium includes a lower electrode, an insulation layer deposited on the lower electrode, a photoelectron emission layer deposited on the insulation layer and having a plurality of protrusions from which photoelectrons are emitted due to collisions between the protrusions and photons, and a dielectric layer deposited on the photoelectron emission layer and storing the photoelectrons emitted from the photoelectron emission layer.
    Type: Application
    Filed: December 18, 2006
    Publication date: May 3, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung-bum Hong, In-kyeong Yoo, Ju-hwan Jung
  • Publication number: 20070085122
    Abstract: A semiconductor memory device may have a lower leakage current and/or higher reliability, e.g., a longer retention time and/or a shorter refresh time. The device may include a switching device and a capacitor. A source of the switching device may be connected to a first end of a metal-insulator transition film resistor, and at least one electrode of the capacitor may be connected to a second end of the metal-insulator transition film resistor. The metal-insulator transition film resistor may transition between an insulator and a conductor according to a voltage supplied to the first and second ends thereof.
    Type: Application
    Filed: July 13, 2006
    Publication date: April 19, 2007
    Inventors: Jae-Woong Hyun, In-Kyeong Yoo, Yoon-Dong Park, Choong-Rae Cho, Sung-Il Cho
  • Publication number: 20070052001
    Abstract: A nonvolatile semiconductor memory device and a method of fabricating the same are provided. The nonvolatile memory device may include a switching device and a storage node connected to the switching device. The storage node may comprise a lower electrode, a data storing layer, and an upper electrode. The data storing layer may include a first region where a current path is formed at a first voltage, and a second region surrounding the first region where a current path is formed at a second voltage, greater than the first voltage. The first region may be positioned to contact the upper electrode and the lower electrode.
    Type: Application
    Filed: August 11, 2006
    Publication date: March 8, 2007
    Inventors: Seung-eon Ahn, Jung-bin Yun, In-kyeong Yoo, Dong-chul Kim, Tae-hoon Kim
  • Patent number: 7170843
    Abstract: A high-density data storage medium, a method of manufacturing the data storage medium, a high-density data storage apparatus, and methods of writing data on, and reading and erasing data from the data storage medium by using the data storage apparatus are provided. The data storage medium includes a lower electrode, an insulation layer deposited on the lower electrode, a photoelectron emission layer deposited on the insulation layer and having a plurality of protrusions from which photoelectrons are emitted due to collisions between the protrusions and photons, and a dielectric layer deposited on the photoelectron emission layer and storing the photoelectrons emitted from the photoelectron emission layer.
    Type: Grant
    Filed: July 2, 2003
    Date of Patent: January 30, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung-bum Hong, In-kyeong Yoo, Ju-hwan Jung
  • Publication number: 20060284793
    Abstract: Provided is a display system that uses a mobile communication terminal. The display system includes a mobile communication terminal having an insertion unit, and a mobile display device having a slot-type connection unit insertable into the insertion unit of the mobile communication terminal. Accordingly, it is possible to display received content on a display screen larger than that of the mobile communication terminal. Also, the display system overcomes noise problems and displays high-definition images by constructing a minimum number of connection terminals that connect the mobile display device to the mobile communication terminal. A method for displaying an image from a mobile communication terminal and a computer program product including a storage medium for performing the method are also provided.
    Type: Application
    Filed: June 15, 2006
    Publication date: December 21, 2006
    Inventors: Young-soo Park, Jung-woo Kim, Jang-yeon Kwon, In-kyeong Yoo
  • Publication number: 20060255392
    Abstract: A transistor including a metal-insulation transition material and a method of manufacturing the same. The transistor including a metal-insulator transition material may include a substrate, a insulation layer formed on the substrate, a source region and a drain region separately formed from each other on the insulation layer, a tunneling barrier layer formed on at least one surface of the source region and the drain region, a metal-insulator transition material layer formed on the tunneling barrier layer and the insulation layer, a dielectric layer stacked on the metal-insulator transition material layer, and a gate electrode layer formed on the dielectric layer.
    Type: Application
    Filed: May 12, 2006
    Publication date: November 16, 2006
    Inventors: Choong-Rae Cho, In-Kyeong Yoo, Yang-Kyu Choi, Sung-Il Cho
  • Publication number: 20060252276
    Abstract: A fast, reliable, highly integrated memory device formed of a carbon nanotube memory device and a method for forming the same, in which the carbon nanotube memory device includes a substrate, a source electrode, a drain electrode, a carbon nanotube having high electrical and thermal conductivity, a memory cell having excellent charge storage capability, and a gate electrode. The source electrode and drain electrode are arranged with a predetermined interval between them on the substrate and are subjected to a voltage. The carbon nanotube connects the source electrode to the drain electrode and serves as a channel for charge movement. The memory cell is located over the carbon nanotube and stores charges from the carbon nanotube. The gate electrode is formed in contact with the upper surface of the memory cell and controls the amount of charge flowing from the carbon nanotube into the memory cell.
    Type: Application
    Filed: February 13, 2006
    Publication date: November 9, 2006
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Won-bong Choi, In-kyeong Yoo, Jae-uk Chu
  • Patent number: 7115306
    Abstract: Provided are a method of growing carbon nanotubes and a carbon nanotube device. The method includes: depositing an aluminum layer on a substrate; forming an insulating layer over the substrate to cover the aluminum layer; patterning the insulating layer and the aluminum layer on the substrate to expose a side of the aluminum layer; forming a plurality of holes in the exposed side of the aluminum layer to a predetermined depth; depositing a catalyst metal layer on the bottoms of the holes; and growing the carbon nanotubes from the catalyst metal layer.
    Type: Grant
    Filed: January 18, 2005
    Date of Patent: October 3, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Soo-hwan Jeong, Wan-jun Park, In-kyeong Yoo, Ju-hye Ko
  • Publication number: 20060197082
    Abstract: A transistor using a physical property-changing layer, a method of operating the transistor, and a method of manufacturing the transistor are provided. The transistor may include an insulation layer formed on a substrate, the first and second conductive layer patterns, the physical property-changing layer, a dielectric layer, for example, a high dielectric layer, and a gate electrode. The first and second conductive layer patterns may be spaced apart from each other on the insulation layer. The physical property-changing layer may be formed on a portion of the insulation layer between the first and second conductive layer patterns. The dielectric layer may be stacked on the physical property-changing layer and the gate electrode may be formed on the high dielectric layer.
    Type: Application
    Filed: February 28, 2006
    Publication date: September 7, 2006
    Inventors: Choong-rae Cho, In-kyeong Yoo, Sung-il Cho