Abstract: Disclosed are a metal interconnection of a semiconductor device and a method for manufacturing the same, capable of improving the reliability of the semiconductor device. The metal interconnection of the semiconductor device includes a first metal interconnection formed on a semiconductor substrate; an interlayer dielectric layer formed on the semiconductor substrate including the first metal interconnection, the interlayer dielectric layer being selectively removed to form a via hole and a trench on the via hole; a metal diffusion blocking layer formed in the via hole and the trench formed on the via hole; a second metal interconnection buried in the via hole and the trench below a top portion of the metal diffusion blocking layer; and a protection layer covering the interlayer dielectric layer, the metal diffusion blocking layer, and the second metal interconnection.

Abstract: Methods for fabricating a copper interconnect of a semiconductor device are disclosed. An example method for fabricating a copper interconnect of a semiconductor device deposits a first insulating layer on a substrate having at least one predetermined structure, forms a trench and via hole through the first insulating layer by using a dual damascene process, and deposits a barrier layer along the bottom and the sidewalls of the trench and via hole.

Abstract: A method for forming a contact using a Cu line in semiconductor fabrication process is disclosed. An example method forms a dual damascene pattern by etching a pre-metal dielectric (PMD) layer formed on a substrate. The dual damascene pattern includes a contact hole portion located on the substrate and a trench portion located on the contact hole portion. The width of the contact hole portion is narrower than that of the trench portion. The example method deposits a tungsten diffusion barrier on sidewalls of the damascene pattern, fills the damascene pattern with tungsten by depositing tungsten on the tungsten diffusion barrier to form a tungsten layer and uses chemical mechanical polishing to polish a portion of the tungsten layer over the trench portion.

Abstract: Disclosed is a method for forming a trench device isolation film in a semiconductor device, which is capable of preventing voids from being generated, regardless of the trench aspect ratio. The method includes forming a trench in a device isolation field of a semiconductor substrate using a mask pattern on the semiconductor substrate, implanting oxygen in a lower portion of the trench, filling the trench with a fill insulating film, and stabilizing the implanted oxygen as an oxide film by annealing and/or compacting the fill insulating film.

Abstract: A dual damascene interconnection in a semiconductor device is formed to be capable of preventing fluorine (F) component from being diffused through sidewalls of a via hole and a trench. The dual damascene interconnection includes a lower metal interconnection film, an intermetal insulating film having a via hole and a trench and formed on the lower metal interconnection film, first second insulative spacer films formed on sidewalls of the via hole and the trench, respectively, a barrier metal layer covering the first second insulative spacer films and the lower metal interconnection film in the via hole and the trench, and an upper metal interconnection film formed on the barrier metal layer, the via hole and the trench being filled with the upper metal interconnection film.

Abstract: A method for forming a contact using a Cu line in semiconductor fabrication process is disclosed. An example method forms a dual damascene pattern by etching a pre-metal dielectric (PMD) layer formed on a substrate. The dual damascene pattern includes a contact hole portion located on the substrate and a trench portion located on the contact hole portion. The width of the contact hole portion is narrower than that of the trench portion. The example method deposits a tungsten diffusion barrier on sidewalls of the damascene pattern, fills the damascene pattern with tungsten by depositing tungsten on the tungsten diffusion barrier to form a tungsten layer and uses chemical mechanical polishing to polish a portion of the tungsten layer over the trench portion.

Abstract: A wire protecting structure for connecting the wire to a insulator mounted onto a pole is directed to facilitate reception of the wire therein and to prevent exposure of the wire therefrom. The wire protecting structure includes a tube having a slit which is longitudinally formed throughout the tube and has substantially a width to facilitate insert of the wire into the tube, and a plurality of protrusions which may be formed at outer surface of the tube; a cover for enforcing the tube to closely contact the wire to the tube, wherein an edge of the cover is integral with outer surface of the tube, other edge of the cover is provided with a plurality of holes which are held to the protrusions of the tube, and a mid-portion of the cover is attached to the top portion of the insulator; and elongated binders wound about the tube and the cover, in a spiral winding configuration, to hold the tube and the cover to the insulator.