Patents by Inventor Ioannis Koltsidas

Ioannis Koltsidas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11295302
    Abstract: A user computing device generates a token while the user computing device is in an offline mode and not connected to an external network. The token includes information of an amount of cryptocurrency to be transferred from a user account to a receiving account and information of a first password for enabling the transfer. The token is signed by the user computing device with a private key while in the offline mode and the signed token is stored by the user computing device on a portable device. A receiving device receiving the signed token from the portable user storage device, authenticates a user corresponding to the user account based on the signed token, receives a second password, compares the first and second passwords for enabling the transfer, and transfers the amount of cryptocurrency from the user account to the receiving account based on the information included in the token.
    Type: Grant
    Filed: December 16, 2015
    Date of Patent: April 5, 2022
    Assignee: International Business Machines Corporation
    Inventors: Elli Androulaki, Andreas Kind, Ioannis Koltsidas
  • Patent number: 11176036
    Abstract: An apparatus, according to one embodiment, includes non-volatile memory configured to store data, and a controller and logic integrated with and/or executable by the controller, the logic being configured to: determine, by the controller, that at least one block of the non-volatile memory and/or portion of a block of the non-volatile memory meets a retirement condition, re-evaluate, by the controller, the at least one block and/or the portion of a block to determine whether to retire the at least one block and/or the portion of a block, indicate, by the controller, that the at least one block and/or the portion of a block remains usable when a result of the re-evaluation is not to retire the block, and indicate, by the controller, that the at least one block and/or the portion of a block is retired when the result of the re-evaluation is to retire the block.
    Type: Grant
    Filed: March 19, 2019
    Date of Patent: November 16, 2021
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Camp, Timothy J. Fisher, Aaron D. Fry, Nikolas Ioannou, Ioannis Koltsidas, Roman A. Pletka, Sasa Tomic
  • Patent number: 11042437
    Abstract: A computer-implemented method, according to one embodiment, includes: receiving, at a storage drive, a portion of a write command. Metadata information is extracted from the received portion of the write command, and sequentially added to a metadata buffer. Parity information is extracted from the received portion of the write command, and adding to a parity buffer. The data in the received portion of the write command is stored in a memory in the storage drive. A determination is also made as to whether an open segment in the memory which corresponds to the received portion of the write command has been filled. In response to determining that the open segment has been filled, the parity buffer is updated with the metadata information included in the metadata buffer. The metadata information and parity information is also destaged from the respective buffers to a physical storage location in the memory.
    Type: Grant
    Filed: July 10, 2019
    Date of Patent: June 22, 2021
    Assignee: International Business Machines Corporation
    Inventors: Ioannis Koltsidas, Charles J. Camp, Nikolas Ioannou, Roman A Pletka, Antonios K. Kourtis, Sasa Tomic, Radu I. Stoica, Christopher Dennett, Andrew D. Walls
  • Patent number: 11036580
    Abstract: A computer-implemented method, according to one embodiment, includes: sequentially adding metadata information that has been extracted from a received write command to a metadata buffer, and adding parity information that has been extracted from the received write command to a parity buffer. The data corresponding to the received write command is also sent to memory. A determination is made as to whether an open segment in the memory which corresponds to the write command has been filled. In response to determining that the open segment has been filled, the parity buffer is updated with the metadata information included in the metadata buffer. Moreover, the metadata information is destaged from the metadata buffer and parity information is destaged from the parity buffer to a physical storage location in the memory.
    Type: Grant
    Filed: July 10, 2019
    Date of Patent: June 15, 2021
    Assignee: International Business Machines Corporation
    Inventors: Ioannis Koltsidas, Charles J. Camp, Nikolas Ioannou, Roman A. Pletka, Antonios K. Kourtis, Sasa Tomic, Radu I. Stoica, Christopher Dennett, Andrew D. Walls
  • Patent number: 11036637
    Abstract: A computer-implemented method, according to one embodiment, includes: retrieving a physical block address corresponding to a logic block address, extracting information from the physical block address, and performing a lookup operation in cache using the extracted information. A range check of the physical block address is further performed in response to the lookup operation succeeding, while data is read from the cache in response to the range check succeeding. An architecture of the cache supports separation of data streams, as well as parallel writes to different non-volatile memory channels. The cache architecture further supports pipelining of the parallel writes to different non-volatile memory planes. Moreover, the non-volatile memory controller is configured to perform a direct memory lookup in the cache based on a physical block address.
    Type: Grant
    Filed: May 21, 2019
    Date of Patent: June 15, 2021
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Camp, Timothy J. Fisher, Aaron D. Fry, Nikolas Ioannou, Ioannis Koltsidas, Roman Pletka, Sasa Tomic, Andrew D. Walls
  • Patent number: 11016940
    Abstract: Techniques for selecting a storage node of a storage system to store data include applying a first function to at least some data chunks of an extent to provide respective first values for each of the at least some data chunks. A storage node, included within multiple storage nodes of a storage system, is selected to store the extent based on a majority vote derived from the respective first values.
    Type: Grant
    Filed: November 28, 2017
    Date of Patent: May 25, 2021
    Assignee: International Business Machines Corporation
    Inventors: Nikolas Ioannou, Ioannis Koltsidas, Roman A. Pletka, Cheng-Chung Song, Radu Stoica, Sasa Tomic, Andrew D. Walls
  • Patent number: 10929229
    Abstract: A computer-implemented method, according to one embodiment, includes: receiving a write request at a storage system which includes more than one storage device, determining a storage location for data included in the write request, and determining a storage location for parity information corresponding to the data included in the write request. A first copy of the data included in the write request is sent to a first storage device which corresponds to the storage location for the data included in the write request. Moreover, a second copy of the data included in the write request is sent to a second storage device which corresponds to the storage location for the parity information. One or more instructions to compute the parity information via a decentralized communication link with the remaining storage devices are sent to the second storage device. The first storage device is different than the second storage device.
    Type: Grant
    Filed: June 21, 2018
    Date of Patent: February 23, 2021
    Assignee: International Business Machines Corporation
    Inventors: Radu I. Stoica, Roman A. Pletka, Ioannis Koltsidas, Nikolas Ioannou, Antonios K. Kourtis, Sasa Tomic, Charalampos Pozidis, Brent W. Yardley
  • Patent number: 10831651
    Abstract: A computer program product, according to one embodiment, includes a computer readable storage medium having program instructions embodied therewith. The computer readable storage medium is not a transitory signal per se. Moreover, the program instructions are readable and/or executable by a controller to cause the controller to perform a method which includes: assigning data having a first heat to a first data stream, assigning data having a second heat to a second data stream, and writing the data streams simultaneously, in parallel, to page-stripes having a same index across a series of planes of memory. The writing of the first data stream begins at an opposite end of the series of planes as the writing of the second data stream, the writing of the streams being toward one another. Other systems, methods, and computer program products are described in additional embodiments.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: November 10, 2020
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Camp, Timothy J. Fisher, Aaron D. Fry, Nikolas Ioannou, Ioannis Koltsidas, Roman A. Pletka, Sasa Tomic
  • Patent number: 10732846
    Abstract: A computer-implemented method according to one embodiment includes determining, after writing data to a non-volatile memory block, one or more delta threshold voltage shift (TVS?) values. One or more overall threshold voltage shift values for the data written to the non-volatile memory block are calculated, the values being a function of the one or more TVS? values to be used when writing data to the non-volatile memory block. The overall threshold voltage shift values are stored. A base threshold voltage shift (TVSBASE) value, the one or more TVS? values, or both the TVSBASE value and the one or more TVS? values are re-calibrated during a background health check after a predetermined number of background health checks without calibration are performed.
    Type: Grant
    Filed: January 9, 2019
    Date of Patent: August 4, 2020
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Camp, Timothy J. Fisher, Aaron D. Fry, Nikolas Ioannou, Ioannis Koltsidas, Nikolaos Papandreou, Thomas Parnell, Roman A. Pletka, Charalampos Pozidis, Sasa Tomic
  • Patent number: 10733069
    Abstract: In a data storage system including a non-volatile random access memory (NVRAM) array, a page is a smallest granularity of the NVRAM array that can be accessed by read and write operations, and a memory block containing multiple pages is a smallest granularity of the NVRAM array that can be erased. Data are stored in the NVRAM array in page stripes distributed across multiple memory blocks. In response to detection of an error in a particular page of a particular block of the NVRAM array, only the particular page of the particular block is retired, such that at least two of the multiple memory blocks across which a particular one of the page stripes is distributed include differing numbers of active (non-retired) pages.
    Type: Grant
    Filed: November 28, 2017
    Date of Patent: August 4, 2020
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Camp, Ioannis Koltsidas, Roman A. Pletka, Andrew D. Walls
  • Patent number: 10733114
    Abstract: Performance of a data cache is controlled; the cache implements a garbage collection process for maintaining free storage blocks in a data store of the cache and an eviction policy for selecting data to be evicted from the cache. A cache performance control method defines a performance target for operation of the cache and, in operation of the cache, monitors performance of the cache in relation to the performance target. The garbage collection process is selectively performed in a relocation mode and an eviction mode so as to promote compliance with the performance target. In the relocation mode, data contained in a set of storage blocks selected for garbage collection is relocated in the data store. In the eviction mode, a set of storage blocks for garbage collection is selected in dependence on the eviction policy and data contained in each selected storage block is evicted from the cache.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: August 4, 2020
    Assignee: International Business Machines Corporation
    Inventors: Antonios Kornilios Kourtis, Nikolas Ioannou, Ioannis Koltsidas
  • Patent number: 10691343
    Abstract: Methods, computing systems and computer program products implement embodiments of the present invention that include identifying, in a storage system including multiple storage devices having respective sets of storage regions, respective default low storage region thresholds that are used for garbage collection. For each given storage region, a time threshold and an alternative low storage region threshold greater than the default low storage region threshold for the given storage device are defined. While processing input/output operations for each given storage device, a count of unused storage regions in the given storage device is maintained, a timer is initialized, and upon the timer matching the time threshold for the given storage device, a garbage collection operation is initiated. In some embodiments, processing the input/output operations includes using a log-structured array format.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: June 23, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nikolas Ioannou, Ioannis Koltsidas, Amit Margalit, Rivka Matosevich
  • Patent number: 10592173
    Abstract: A technique for operating a data storage system includes receiving uncompressed data. The uncompressed data is organized into data strips of a stripe. The data strips are compressed subsequent to the organizing. Parity information for the compressed data strips is calculated. Storage of the compressed data strips and the parity information for the stripe is initiated on respective storage devices of the data storage system.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: March 17, 2020
    Assignee: International Business Machines Corporation
    Inventors: Roman A. Pletka, Radu I. Stoica, Ioannis Koltsidas, Nikolas Ioannou, Sasa Tomic, Antonios K. Kourtis, Charalampos Pozidis
  • Publication number: 20200073823
    Abstract: Performance of a data cache is controlled; the cache implements a garbage collection process for maintaining free storage blocks in a data store of the cache and an eviction policy for selecting data to be evicted from the cache. A cache performance control method defines a performance target for operation of the cache and, in operation of the cache, monitors performance of the cache in relation to the performance target. The garbage collection process is selectively performed in a relocation mode and an eviction mode so as to promote compliance with the performance target. In the relocation mode, data contained in a set of storage blocks selected for garbage collection is relocated in the data store. In the eviction mode, a set of storage blocks for garbage collection is selected in dependence on the eviction policy and data contained in each selected storage block is evicted from the cache.
    Type: Application
    Filed: August 28, 2018
    Publication date: March 5, 2020
    Inventors: Antonios Kornilios Kourtis, Nikolas Ioannou, Ioannis Koltsidas
  • Patent number: 10579270
    Abstract: A computer program product, according to one embodiment, includes a computer readable storage medium having program instructions embodied therewith. The computer readable storage medium is not a transitory signal per se. Moreover, the program instructions are readable and/or executable by a processor to cause the processor to perform a method which includes: maintaining a first open logical erase block for user writes, and a second open logical erase block for relocate writes. A first data stream having the user writes is received, and transferred to the first open logical erase block. A second data stream having the relocate writes is also received, and transferred to the second open logical erase block. Furthermore, a third data stream is received, and is mixed with the first, second, and/or another data stream in response to determining that an open logical erase block is not available for assignment to the third data stream.
    Type: Grant
    Filed: October 29, 2018
    Date of Patent: March 3, 2020
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Camp, Timothy J. Fisher, Aaron D. Fry, Nikolas Ioannou, Ioannis Koltsidas, Roman A. Pletka, Sasa Tomic
  • Publication number: 20200057814
    Abstract: Techniques for selecting a storage node of a storage system to store data include applying a first function to at least some data chunks of an extent to provide respective first values for each of the at least some data chunks. A storage node, included within multiple storage nodes of a storage system, is selected to store the extent based on a majority vote derived from the respective first values.
    Type: Application
    Filed: November 28, 2017
    Publication date: February 20, 2020
    Inventors: NIKOLAS IOANNOU, IOANNIS KOLTSIDAS, ROMAN A. PLETKA, CHENG-CHUNG SONG, RADU STOICA, SASA TOMIC, ANDREW D. WALLS
  • Publication number: 20200057702
    Abstract: In a data storage system including a non-volatile random access memory (NVRAM) array, a page is a smallest granularity of the NVRAM array that can be accessed by read and write operations, and a memory block containing multiple pages is a smallest granularity of the NVRAM array that can be erased. Data are stored in the NVRAM array in page stripes distributed across multiple memory blocks. In response to detection of an error in a particular page of a particular block of the NVRAM array, only the particular page of the particular block is retired, such that at least two of the multiple memory blocks across which a particular one of the page stripes is distributed include differing numbers of active (non-retired) pages.
    Type: Application
    Filed: November 28, 2017
    Publication date: February 20, 2020
    Inventors: CHARLES J. CAMP, IOANNIS KOLTSIDAS, ROMAN A. PLETKA, ANDREW D. WALLS
  • Patent number: 10565588
    Abstract: The present invention is notably directed to methods, systems and computer program products for securing data operations in a computerized system comprising interconnected nodes, wherein the nodes are configured to transmit, receive and store data, and wherein the method comprises executing computerized cryptographic methods to implement two or more proofs of work that comprises: provably crawling, from each node of at least a subset of the interconnected nodes, a respective subset of data stored on nodes of the system; and provably acquiring, at each node of the subset, data in the subset of data.
    Type: Grant
    Filed: March 12, 2015
    Date of Patent: February 18, 2020
    Assignee: International Business Machines Corporation
    Inventors: Elli Androulaki, Mircea Gusat, Ioannis Koltsidas, Maria Soimu
  • Patent number: 10552317
    Abstract: System and method for operating a solid state memory containing a memory space. The present invention provides a computerized system that includes a solid state memory having a memory space; a controller adapted to use a first portion of the memory space as a cache; and a garbage collector adapted to use a second portion of the memory space to collect garbage in the solid state memory. The controller is adapted to change a size of at least one of the first portion and the second portion of the memory space during operation of the solid state memory.
    Type: Grant
    Filed: April 5, 2016
    Date of Patent: February 4, 2020
    Assignee: International Business Machines Corporation
    Inventors: Xiao-Yu Hu, Nikolas Ioannou, Ioannis Koltsidas
  • Patent number: 10540231
    Abstract: Embodiments for optimizing resource consumption through partial parity information eviction in a storage system of a data storage environment. One or more cooperative Redundant Array of Independent Disks (RAID) parity computations are performed by evicting partial parity data from a RAID controller memory to a storage entity prior to a full stripes worth of data being monotonically written to the storage entity. The storage entity assembles the partial parity data from the one or more cooperative RAID parity computations into a single parity computation valid for the full stripes worth of data, thereby offloading parity computation to the storage entity to more efficiently utilize the RAID controller memory resources.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: January 21, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Charles Camp, Ioannis Koltsidas, Christopher Dennett, Andrew D. Walls