Patents by Inventor Isaac Ali
Isaac Ali has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240113700Abstract: Examples may include techniques for using a sample clock to measure a duty cycle by periodic sampling a target clock signal based on a prime number ratio of a reference clock frequency. The reference clock frequency used to set a measurement cycle time over which the duty cycle is to be measured. A magnitude of a duty cycle error as compared to a programmable target duty cycle is determined based on the measured duty cycle and the duty cycle is adjusted based, at least in part, on the magnitude of the duty cycle error.Type: ApplicationFiled: December 8, 2023Publication date: April 4, 2024Inventors: Christopher P. MOZAK, Ralph S. LI, Chin Wah LIM, Mahmoud ELASSAL, Anant BALAKRISHNAN, Isaac ALI
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Patent number: 11916554Abstract: Examples may include techniques for using a sample clock to measure a duty cycle by periodic sampling a target clock signal based on a prime number ratio of a reference clock frequency. The reference clock frequency used to set a measurement cycle time over which the duty cycle is to be measured. A magnitude of a duty cycle error as compared to a programmable target duty cycle is determined based on the measured duty cycle and the duty cycle is adjusted based, at least in part, on the magnitude of the duty cycle error.Type: GrantFiled: December 16, 2019Date of Patent: February 27, 2024Assignee: Intel CorporationInventors: Christopher P. Mozak, Ralph S. Li, Chin Wah Lim, Mahmoud Elassal, Anant Balakrishnan, Isaac Ali
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Patent number: 11588454Abstract: Various embodiments are directed to apparatuses and methods to generate a first signal representing modulation data and a second signal representing an amplitude of the modulation data, the first signal and the second signal to depend on an output signal and vary a power supply voltage to a gain stage in proportion to the amplitude of the modulation data.Type: GrantFiled: July 10, 2020Date of Patent: February 21, 2023Assignee: Intel CorporationInventors: Nicholas P. Cowley, Isaac Ali, William L. Barber
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Publication number: 20210006216Abstract: Various embodiments are directed to apparatuses and methods to generate a first signal representing modulation data and a second signal representing an amplitude of the modulation data, the first signal and the second signal to depend on an output signal and vary a power supply voltage to a gain stage in proportion to the amplitude of the modulation data.Type: ApplicationFiled: July 10, 2020Publication date: January 7, 2021Applicant: Intel CorporationInventors: Nicholas P. Cowley, Isaac Ali, William L. Barber
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Patent number: 10715092Abstract: Various embodiments are directed to apparatuses and methods to generate a first signal representing modulation data and a second signal representing an amplitude of the modulation data, the first signal and the second signal to depend on an output signal and vary a power supply voltage to a gain stage in proportion to the amplitude of the modulation data.Type: GrantFiled: January 18, 2019Date of Patent: July 14, 2020Assignee: Intel CorporationInventors: Nicholas P. Cowley, Isaac Ali, William L. Barber
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Publication number: 20200119721Abstract: Examples may include techniques for using a sample clock to measure a duty cycle by periodic sampling a target clock signal based on a prime number ratio of a reference clock frequency. The reference clock frequency used to set a measurement cycle time over which the duty cycle is to be measured. A magnitude of a duty cycle error as compared to a programmable target duty cycle is determined based on the measured duty cycle and the duty cycle is adjusted based, at least in part, on the magnitude of the duty cycle error.Type: ApplicationFiled: December 16, 2019Publication date: April 16, 2020Inventors: Christopher P. MOZAK, Ralph S. LI, Chin Wah LIM, Mahmoud ELASSAL, Anant BALAKRISHNAN, Isaac ALI
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Publication number: 20190260337Abstract: Various embodiments are directed to apparatuses and methods to generate a first signal representing modulation data and a second signal representing an amplitude of the modulation data, the first signal and the second signal to depend on an output signal and vary a power supply voltage to a gain stage in proportion to the amplitude of the modulation data.Type: ApplicationFiled: January 18, 2019Publication date: August 22, 2019Applicant: Intel CorporationInventors: Nicholas P. Cowley, Isaac Ali, William L. Barber
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Patent number: 10224883Abstract: Various embodiments are directed to apparatuses and methods to generate a first signal representing modulation data and a second signal representing an amplitude of the modulation data, the first signal and the second signal to depend on an output signal and vary a power supply voltage to a gain stage in proportion to the amplitude of the modulation data.Type: GrantFiled: July 26, 2017Date of Patent: March 5, 2019Assignee: INTEL CORPORATIONInventors: Nicholas P. Cowley, Isaac Ali, William L. Barber
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Publication number: 20180270948Abstract: In various embodiments, apparatuses and methods are disclosed that may be able to implement a multi-layer, three dimensional routing between a decoupling component and an input port for a SoC or MCM. A three dimensional (3D) structure may provide a defined current return path from the decoupling component to the input port. The current return path may be constrained by design to provide an equal and opposite electromagnetic flux to the input port thereby reducing series inductance between the input port and the decoupling component.Type: ApplicationFiled: August 14, 2017Publication date: September 20, 2018Applicant: Intel CorporationInventors: William L. Barber, Keith Pinson, Andrew P. Collins, Boping Wu, Isaac Ali, Colin L. Perry
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Publication number: 20180198425Abstract: Various embodiments are directed to apparatuses and methods to generate a first signal representing modulation data and a second signal representing an amplitude of the modulation data, the first signal and the second signal to depend on an output signal and vary a power supply voltage to a gain stage in proportion to the amplitude of the modulation data.Type: ApplicationFiled: July 26, 2017Publication date: July 12, 2018Applicant: Intel CorporationInventors: Nicholas P. Cowley, Isaac Ali, William L. Barber
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Patent number: 10015878Abstract: In various embodiments, apparatuses and methods are disclosed that may be able to implement a multi-layer, three dimensional routing between a decoupling component and an input port for a SoC or MCM. A three dimensional (3D) structure may provide a defined current return path from the decoupling component to the input port. The current return path may be constrained by design to provide an equal and opposite electromagnetic flux to the input port thereby reducing series inductance between the input port and the decoupling component.Type: GrantFiled: November 19, 2015Date of Patent: July 3, 2018Assignee: INTEL CORPORATIONInventors: William L. Barber, Keith Pinson, Andrew P. Collins, Boping Wu, Isaac Ali, Colin L. Perry
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Patent number: 9729112Abstract: Various embodiments are directed to apparatuses and methods to generate a first signal representing modulation data and a second signal representing an amplitude of the modulation data, the first signal and the second signal to depend on an output signal and vary a power supply voltage to a gain stage in proportion to the amplitude of the modulation data.Type: GrantFiled: March 10, 2015Date of Patent: August 8, 2017Assignee: INTEL CORPORATIONInventors: Nicholas P. Cowley, Isaac Ali, William L. Barber
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Patent number: 9577523Abstract: A dual mode voltage regulator according to one embodiment includes a passive regulator circuit, a switching regulator circuit, and a controller circuit configured to determine parameters of an external select input. The controller is configured to selectively couple, on a cold boot up, either the passive regulator circuit or the switching regulator circuit between an input voltage port and an output load based on the determination of parameters.Type: GrantFiled: March 1, 2012Date of Patent: February 21, 2017Assignee: Intel CorporationInventors: Nicholas P. Cowley, Andrew D. Talbot, Mark Mudd, Stephen J. Spinks, Keith Pinson, Colin L. Perry, Alan J. Martin, Chi Man Kan, Matthew T. Aitken, William L. Barber, Isaac Ali
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Patent number: 9577581Abstract: A system for amplifying a signal with active power management according to one embodiment includes a first digital to analog converter (DAC) circuit configured to provide a modulated carrier signal; a amplifier circuit coupled to the first DAC, where the amplifier circuit is configured to amplify the modulated carrier signal; an output stage circuit coupled to the amplifier circuit, where the output stage circuit is configured to provide the amplified signal to a network; a second DAC circuit configured to provide a full wave rectified envelope of the modulated carrier signal; and a switching regulator circuit including a voltage reference input coupled to the second DAC circuit, where the switching regulator circuit is configured to provide a supply voltage to the output stage circuit and the supply voltage is modulated in response to the envelope received at the voltage reference input.Type: GrantFiled: April 19, 2012Date of Patent: February 21, 2017Assignee: Intel CorporationInventors: Nicholas P. Cowley, Isaac Ali, William L. Barber
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Patent number: 9509214Abstract: Generally, this disclosure describes an apparatus, systems and methods for adaptively controlling a voltage regulator.Type: GrantFiled: May 1, 2012Date of Patent: November 29, 2016Assignee: Intel CorporationInventors: Isaac Ali, Nicholas P. Cowley
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Publication number: 20160309580Abstract: In various embodiments, apparatuses and methods are disclosed that may be able to implement a multi-layer, three dimensional routing between a decoupling component and an input port for a SoC or MCM. A three dimensional (3D) structure may provide a defined current return path from the decoupling component to the input port. The current return path may be constrained by design to provide an equal and opposite electromagnetic flux to the input port thereby reducing series inductance between the input port and the decoupling component.Type: ApplicationFiled: November 19, 2015Publication date: October 20, 2016Applicant: INTEL CORPORATIONInventors: William L. Barber, Keith Pinson, Andrew P. Collins, Boping Wu, Isaac Ali, Colin L. Perry
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Patent number: 9343963Abstract: A dual mode voltage regulator according to one embodiment includes a passive regulator circuit; a switching regulator circuit; and a controller circuit configured to monitor operational parameters of the dual mode voltage regulator and selectively couple either the passive regulator circuit or the switching regulator circuit between an input voltage port and an output load. The selective coupling is based on the monitoring of parameters including current through the output load, voltage at the input voltage port and voltage at the output load as well as the availability of a system clock signal.Type: GrantFiled: December 22, 2011Date of Patent: May 17, 2016Assignee: Intel CorporationInventors: Nicholas P. Cowley, Andrew D. Talbot, Isaac Ali, Keith Pinson, Colin L. Perry, Matthew T. Aitken, Chi Man Kan, Mark S. Mudd, Stephen J. Spinks, Alan J. Martin, William L. Barber
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Patent number: 9325339Abstract: Generally, this disclosure describes an apparatus, systems and methods for analog to digital conversion with improved spurious free dynamic range.Type: GrantFiled: May 1, 2012Date of Patent: April 26, 2016Assignee: Intel CorporationInventors: Nicholas P. Cowley, Isaac Ali, William L. Barber
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Patent number: 9225559Abstract: A receiver and a method to process signals from one or more transmission sources. The receives includes a front-end having: an input coupling path to route an analog input signal received from one or more transmission sources; an equalizer to generate an equalized signal from the analog input signal; and an ADC to generate a digitized signal from the equalized signal. The method includes routing the analog input signal through an input coupling path; equalizing the analog input signal to generate an equalized signal therefrom; and digitizing the equalized signal to generate a digitized signal therefrom.Type: GrantFiled: September 24, 2010Date of Patent: December 29, 2015Assignee: INTEL CORPORATIONInventors: Nicholas Cowley, Isaac Ali
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Patent number: 9225164Abstract: In various embodiments, apparatuses and methods are disclosed that may be able to implement a multi-layer, three dimensional routing between a decoupling component and an input port for a SoC or MCM. A three dimensional (3D) structure may provide a defined current return path from the decoupling component to the input port. The current return path may be constrained by design to provide an equal and opposite electromagnetic flux to the input port thereby reducing series inductance between the input port and the decoupling component.Type: GrantFiled: November 6, 2014Date of Patent: December 29, 2015Assignee: INTEL CORPORATIONInventors: William L. Barber, Keith Pinson, Andrew P. Collins, Boping Wu, Isaac Ali, Colin L. Perry