Patents by Inventor Isao Kamioka

Isao Kamioka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080261370
    Abstract: According to the present invention, there is provided a semiconductor device fabrication method comprising: forming a first insulating film on a semiconductor substrate; forming a first conductive layer on the first insulating film; forming a second insulating film on the first conductive layer in a first processing chamber isolated from an outside; performing a modification process on the second insulating film in the first processing chamber, and unloading the semiconductor substrate from the first processing chamber to the outside; annealing the second insulating film in a second processing chamber; and forming a second conductive layer on the second insulating film.
    Type: Application
    Filed: June 2, 2008
    Publication date: October 23, 2008
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Isao Kamioka, Yoshio Ozawa
  • Patent number: 7396721
    Abstract: According to the present invention, there is provided a semiconductor device fabrication method comprising: forming a first insulating film on a semiconductor substrate; forming a first conductive layer on the first insulating film; forming a second insulating film on the first conductive layer in a first processing chamber isolated from an outside; performing a modification process on the second insulating film in the first processing chamber, and unloading the semiconductor substrate from the first processing chamber to the outside; annealing the second insulating film in a second processing chamber; and forming a second conductive layer on the second insulating film.
    Type: Grant
    Filed: May 17, 2005
    Date of Patent: July 8, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Isao Kamioka, Yoshio Ozawa
  • Publication number: 20070196985
    Abstract: A semiconductor memory device manufacturing method includes forming a floating gate electrode above a semiconductor substrate, forming an interelectrode insulating film above the floating gate electrode, forming a first radical nitride film on a surface of the interelectrode insulating film by first radical nitriding, and forming a control gate electrode on the first radical nitride film.
    Type: Application
    Filed: January 30, 2007
    Publication date: August 23, 2007
    Inventors: Yoshio Ozawa, Isao Kamioka, Junichi Shiozawa, Akihito Yamamoto, Ryota Fujitsuka, Yoshihiro Ogawa, Katsuaki Natori, Katsuyuki Sekine, Masayuki Tanaka, Daisuke Nishida
  • Publication number: 20070173020
    Abstract: A semiconductor device manufacturing method includes forming a first insulating film on a semiconductor substrate containing silicon, the first insulating film having a first dielectric constant and constituting a part of a tunnel insulating film, forming a floating gate electrode film on the first insulating film, the floating gate electrode film being formed of a semiconductor film containing silicon, patterning the floating gate electrode film, the first insulating film, and the semiconductor substrate to form a first structure having a first side surface, exposing the first structure to an atmosphere containing an oxidizing agent, oxidizing that part of the floating gate electrode film which corresponds to a boundary between the first insulating film and the floating gate electrode film using the oxidizing agent, to form a second insulating film having a second dielectric constant smaller than the first dielectric constant and constituting a part of the tunnel insulating film.
    Type: Application
    Filed: September 22, 2006
    Publication date: July 26, 2007
    Inventors: Yoshio Ozawa, Isao Kamioka
  • Publication number: 20070018231
    Abstract: A nonvolatile semiconductor memory device includes a gate portion formed by laminating a tunnel insulating film, floating gate electrode, inter-poly insulating film and control gate electrode on a semiconductor substrate, and source and drain regions formed on the substrate. The tunnel insulating film has a three-layered structure having a silicon nitride film sandwiched between silicon oxide films. The silicon nitride film is continuous in an in-plane direction and has 3-coordinate nitrogen bonds and at least one of second neighboring atoms of nitrogen is nitrogen.
    Type: Application
    Filed: July 24, 2006
    Publication date: January 25, 2007
    Inventors: Yuuichiro Mitani, Daisuke Matsushita, Ryuji Ooba, Isao Kamioka, Yoshio Ozawa
  • Publication number: 20060240619
    Abstract: A semiconductor memory device manufacturing method includes forming a floating gate electrode above a semiconductor substrate, forming an interelectrode insulating film above the floating gate electrode, forming a first radical nitride film on a surface of the interelectrode insulating film by first radical nitriding, and forming a control gate electrode on the first radical nitride film.
    Type: Application
    Filed: July 27, 2005
    Publication date: October 26, 2006
    Inventors: Yoshio Ozawa, Isao Kamioka, Junichi Shiozawa
  • Publication number: 20060202259
    Abstract: A semiconductor device includes a semiconductor substrate, a gate insulating film formed on the semiconductor substrate, a gate electrode formed on the gate insulating film, a source/drain diffusion layer formed in the semiconductor substrate at both sides of the gate electrode, and a channel region formed in the semiconductor substrate between a source and a drain of the source/drain diffusion layer and arranged below the gate insulating film, wherein an upper surface of the source/drain diffusion layer is positioned below a bottom surface of the gate electrode, and an upper surface of the channel region is positioned below the upper surface of the source/drain diffusion layer.
    Type: Application
    Filed: May 20, 2005
    Publication date: September 14, 2006
    Inventors: Yoshio Ozawa, Isao Kamioka
  • Publication number: 20060166428
    Abstract: According to the present invention, there is provided a semiconductor device fabrication method comprising: forming a first insulating film on a semiconductor substrate; forming a first conductive layer on the first insulating film; forming a second insulating film on the first conductive layer in a first processing chamber isolated from an outside; performing a modification process on the second insulating film in the first processing chamber, and unloading the semiconductor substrate from the first processing chamber to the outside; annealing the second insulating film in a second processing chamber; and forming a second conductive layer on the second insulating film.
    Type: Application
    Filed: May 17, 2005
    Publication date: July 27, 2006
    Inventors: Isao Kamioka, Yoshio Ozawa
  • Publication number: 20060166421
    Abstract: According to the present invention, there is provided a semiconductor device fabrication method comprising: forming a first insulating film on a semiconductor substrate; forming a conductive layer on the first insulating film; exposing the first insulating film by removing a portion of the conductive layer; forming a second insulating film on the exposed surface of the first insulating film in a first processing chamber isolated from an outside; performing a modification process on the second insulating film in the first processing chamber, and then unloading the semiconductor substrate from the first processing chamber to the outside; and annealing the second insulating film in a second processing chamber.
    Type: Application
    Filed: April 15, 2005
    Publication date: July 27, 2006
    Inventors: Isao Kamioka, Yoshio Ozawa