Abstract: A semiconductor memory device includes a semiconductor substrate having a first region and a second region, a transistor placed in the first region of the semiconductor substrate, a first insulating film formed on the semiconductor substrate in the first and second regions and on the transistor, a first ferroelectric capacitor formed on the first insulating film in the first region and electrically connected to the transistor, a hydrogen barrier film formed above the first ferroelectric capacitor and above the first insulating film in the first and second regions, a first contact penetrating the hydrogen barrier film in the first region and electrically connected to the first ferroelectric capacitor, and a second contact which penetrates the hydrogen barrier film in the second region and which is in a floating state.

Abstract: A semiconductor memory device, which prevents the penetration of hydrogen or moisture to a ferroelectric capacitor from its surrounding area including a contact plug portion, comprises a ferroelectric capacitor formed above a semiconductor substrate, a first hydrogen barrier film formed on an upper surface of the ferroelectric capacitor to work as a mask in the formation of the ferroelectric capacitor, a second hydrogen barrier film formed on the upper surface and a side face of the ferroelectric capacitor including on the first hydrogen barrier film, and a contact plug disposed through the first and second hydrogen barrier films, and connected to an upper electrode of the ferroelectric capacitor, a side face thereof being surrounded with the hydrogen barrier films.

Abstract: A semiconductor memory, comprising: a first memory cell transistor disposed on a semiconductor substrate; a second memory cell transistor disposed on the semiconductor substrate and having a first source-drain region in common with the first memory cell transistor; a first ferroelectric capacitor disposed with a via in between above a second source-drain region of the first memory cell transistor; a second ferroelectric capacitor disposed with a via in between above a second source-drain region of the second memory cell transistor; an interlayer dielectric disposed on the semiconductor substrate, as coating the memory cell transistors and the ferroelectric capacitors, the interlayer dielectric having a contact hole through which the first source-drain region is partially exposed at the bottom and upper electrodes of the first and second ferroelectric capacitors are partially exposed at the top; and a wiring layer filled into the contact hole, which connects the first source-drain region, the upper electrode o

Abstract: A semiconductor memory device includes a semiconductor substrate having a first region and a second region, a transistor placed in the first region of the semiconductor substrate, a first insulating film formed on the semiconductor substrate in the first and second regions and on the transistor, a first ferroelectric capacitor formed on the first insulating film in the first region and electrically connected to the transistor, a hydrogen barrier film formed above the first ferroelectric capacitor and above the first insulating film in the first and second regions, a first contact penetrating the hydrogen barrier film in the first region and electrically connected to the first ferroelectric capacitor, and a second contact which penetrates the hydrogen barrier film in the second region and which is in a floating state.

Abstract: A semiconductor memory device includes a semiconductor substrate having a first region and a second region, a transistor placed in the first region of the semiconductor substrate, a first insulating film formed on the semiconductor substrate in the first and second regions and on the transistor, a first ferroelectric capacitor formed on the first insulating film in the first region and electrically connected to the transistor, a hydrogen barrier film formed above the first ferroelectric capacitor and above the first insulating film in the first and second regions, a first contact penetrating the hydrogen barrier film in the first region and electrically connected to the first ferroelectric capacitor, and a second contact which penetrates the hydrogen barrier film in the second region and which is in a floating state.

Abstract: A semiconductor memory device includes a semiconductor substrate having a first region and a second region, a transistor placed in the first region of the semiconductor substrate, a first insulating film formed on the semiconductor substrate in the first and second regions and on the transistor, a first ferroelectric capacitor formed on the first insulating film in the first region and electrically connected to the transistor, a hydrogen barrier film formed above the first ferroelectric capacitor and above the first insulating film in the first and second regions, a first contact penetrating the hydrogen barrier film in the first region and electrically connected to the first ferroelectric capacitor, and a second contact which penetrates the hydrogen barrier film in the second region and which is in a floating state.

Abstract: According to an aspect of the present invention, there is provided a non-volatile semiconductor memory device, including a ferroelectric capacitor being stacked a first electrode, a ferroelectric film and a second electrode in order, a first protective film with hydrogen barrier performance, the first protective film being formed under the first electrode and on a side-wall of the ferroelectric capacitor, the first protective film being widened from the second electrode towards the first electrode, a second protective film with hydrogen barrier performance, the second protective film being formed over the second electrode and on the first protective film formed on the side-wall of the ferroelectric capacitor, the second protective film being widened from the first electrode towards the second electrode, a cell transistor, a source of the cell transistor being connected to the first electrode, a drain of the cell transistor being connected to a bit line and a gate being connected to a word line.

Abstract: A semiconductor device comprising a ferroelectric capacitor having improved reliability is disclosed. According to one aspect of the present invention, it is provided a semiconductor device comprising a transistor formed on a semiconductor substrate, a ferroelectric capacitor formed above the transistor and comprising a lower electrode, a ferroelectric film and an upper electrode, a first hydrogen barrier film formed over the ferroelectric capacitor, an insulator formed over the first hydrogen barrier film, a contact plug disposed in the insulator and electrically connected with the upper electrode, a second hydrogen barrier film disposed between the contact plug and the insulator continuously, and a wiring connected with the contact plug.

Abstract: According to an aspect of the present invention, there is provided a semiconductor device including: a substrate; an insulating film disposed on the substrate; a plug electrode disposed in the insulating film; and a capacitor unit including: a lower electrode that is disposed on the insulating film and that covers a top face of the plug electrode, a ferroelectric film disposed on the lower electrode, a first upper electrode disposed on the ferroelectric film, and a second upper electrode disposed on the ferroelectric film and separated from the first upper electrode; wherein the first upper electrode covers a center of the plug electrode as viewed in a direction perpendicular to a surface of the semiconductor substrate.

Abstract: According to an aspect of the present invention, there is provided a semiconductor memory including a lower electrode, a first insulating region formed in the same layer as the lower electrode, a ferroelectric film formed on the lower electrode and on the first insulating region, an upper electrode formed on the ferroelectric film, a second insulating region formed in the same layer as the upper electrode and a transistor. The first insulating region partitions the lower electrode. The second insulating region partitions the upper electrode. The transistor includes a first impurity region connected to the lower electrode and a second impurity region connected to the upper electrode. At least one of the first insulating region and the second insulating region is formed by insulating the lower electrode or the upper electrode.

Abstract: A semiconductor memory device includes a semiconductor substrate having a first region and a second region, a transistor placed in the first region of the semiconductor substrate, a first insulating film formed on the semiconductor substrate in the first and second regions and on the transistor, a first ferroelectric capacitor formed on the first insulating film in the first region and electrically connected to the transistor, a hydrogen barrier film formed above the first ferroelectric capacitor and above the first insulating film in the first and second regions, a first contact penetrating the hydrogen barrier film in the first region and electrically connected to the first ferroelectric capacitor, and a second contact which penetrates the hydrogen barrier film in the second region and which is in a floating state.

Abstract: There is provided a semiconductor storage device comprising a ferroelectric capacitor superior in barrier capability against penetration of hydrogen from all directions including a transverse direction. The device comprises a transistor formed on a semiconductor substrate, the ferroelectric capacitor formed above the transistor and including a lower electrode, a ferroelectric film, and an upper electrode, a first hydrogen barrier film which continuously surrounds side portions of a ferroelectric capacitor cell array constituted of a plurality of ferroelectric capacitors, and a second hydrogen barrier film which is formed above the ferroelectric capacitor cell array and which is brought into contact with the first hydrogen barrier film in the whole periphery.

Abstract: A method of manufacturing a ferroelectric memory cell includes: forming device isolation regions; and source/drain regions; forming a gate insulating film on the semiconductor substrate; forming a gate electrode on the gate insulating film; forming; forming a contact plug to be connected to one of the source/drain regions. The method further includes: forming a lower electrode to be connected to the contact plug; depositing a sol-gel solution containing a ferroelectric minute crystal on the lower electrode to form a ferroelectric film; forming an upper electrode on the ferroelectric film; forming a second interlayer insulating film. The method further includes: forming a capacitor contact plug to be connected to the upper electrode; forming a substrate contact plug to be connected to the other one of the source/drain regions; and forming first and second wiring layers to be connected to the capacitor contact plug and the substrate contact plug, respectively.

Abstract: A semiconductor device including a ferroelectric random access memory, which has a structure suitable for miniaturization and easy to manufacture, and having less restrictions on materials to be used, comprises a field effect transistor formed on a surface area of a semiconductor wafer, a trench ferroelectric capacitor formed in the semiconductor wafer in one source/drain of the field effect transistor, wherein one electrode thereof is connected to the source/drain, and a wiring formed in the semiconductor wafer and connected to the other electrode of the trench ferroelectric capacitor.

Abstract: A semiconductor device comprising a ferroelectric capacitor having improved reliability is disclosed. According to one aspect of the present invention, it is provided a semiconductor device comprising a transistor formed on a semiconductor substrate, a ferroelectric capacitor formed above the transistor and comprising a lower electrode, a ferroelectric film and an upper electrode, a first hydrogen barrier film formed over the ferroelectric capacitor, an insulator formed over the first hydrogen barrier film, a contact plug disposed in the insulator and electrically connected with the upper electrode, a second hydrogen barrier film disposed between the contact plug and the insulator continuously, and a wiring connected with the contact plug.

Abstract: A semiconductor device includes a plurality of first word lines which extend in a first direction, a plurality of second word lines which extend in a direction orthogonal to the first direction, a plurality of selection circuits which are provided at intersections of the first word lines and the second word lines, and each of which includes a first transistor and a second transistor which are connected in series, the first transistor having a gate electrode connected to one of the first word lines, and the second transistor having a gate electrode connected to one of the second word lines.

Abstract: A semiconductor memory device includes a semiconductor substrate, a first transistor formed on the semiconductor substrate and including a first gate electrode and first and second diffusion layers, a first contact connected to the first diffusion layer, a first conductive oxygen barrier film electrically connected to the first contact and covering at least the upper surface of the first contact, a first ferroelectric capacitor including a first electrode, a second electrode, and a first ferroelectric film interposed between the first and second electrodes, and a first connecting member connected to the first electrode and to the first conductive oxygen barrier film.

Abstract: A semiconductor memory device, which prevents the penetration of hydrogen or moisture to a ferroelectric capacitor from its surrounding area including a contact plug portion, comprises a ferroelectric capacitor formed above a semiconductor substrate, a first hydrogen barrier film formed on an upper surface of the ferroelectric capacitor to work as a mask in the formation of the ferroelectric capacitor, a second hydrogen barrier film formed on the upper surface and a side face of the ferroelectric capacitor including on the first hydrogen barrier film, and a contact plug disposed through the first and second hydrogen barrier films, and connected to an upper electrode of the ferroelectric capacitor, a side face thereof being surrounded with the hydrogen barrier films.

Abstract: A semiconductor device includes a switching element formed on a semiconductor substrate, a first interconnect layer formed on the semiconductor substrate and having a first wiring connected to one terminal of the switching element, a ferroelectric capacitor formed on the first interconnect layer and having a first electrode connected to the one terminal of the switching element via the first wiring, a first protective film formed on the ferroelectric capacitor and the first interconnect layer, a second interconnect layer formed on the first protective film and having a second wiring connected to a second electrode of the ferroelectric capacitor and a first interlayer insulating film having a dielectric constant of 4 or more, and a third interconnect layer formed on the second interconnect layer and having a second interlayer insulating film with a dielectric constant of less than 4.

Abstract: There is provided a semiconductor storage device comprising a ferroelectric capacitor superior in barrier capability against penetration of hydrogen from all directions including a transverse direction. The device comprises a transistor formed on a semiconductor substrate, the ferroelectric capacitor formed above the transistor and including a lower electrode, a ferroelectric film, and an upper electrode, a first hydrogen barrier film which continuously surrounds side portions of a ferroelectric capacitor cell array constituted of a plurality of ferroelectric capacitors, and a second hydrogen barrier film which is formed above the ferroelectric capacitor cell array and which is brought into contact with the first hydrogen barrier film in the whole periphery.