Patents by Inventor Izumi Nitta

Izumi Nitta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6415427
    Abstract: A global routing method acquiring global routing between net terminals of cells placed on a VLSI chip. First, a Steiner tree is generated without any of constraints such as layers, prohibition and a wiring capacity as an initial solution. Then, partial correction of the Steiner tree is repeated so as not to increase a line length as far as possible in consideration of constraints such as a prohibiting region, a wiring capacity and layers based on the initial solution of the Steiner tree to obtain the global routing. The Steiner tree is corrected generating a path collection obtained by dividing the Steiner tree into a plurality of paths each having at least a Steiner point, as a value, being an intersection of 3 or more branches.
    Type: Grant
    Filed: March 8, 2001
    Date of Patent: July 2, 2002
    Assignee: Fujitsu Limited
    Inventors: Izumi Nitta, Hidetoshi Matsuoka
  • Publication number: 20010009031
    Abstract: A global routing method acquiring global routing between net terminals of cells placed on a VLSI chip. First, a Steiner tree is generated without any of constraints such as layers, prohibition and a wiring capacity as an initial solution. Then, partial correction of the Steiner tree is repeated so as not to increase a line length as far as possible in consideration of constraints such as a prohibiting region, a wiring capacity and layers based on the initial solution of the Steiner tree to obtain the global routing. The Steiner tree is corrected generating a path collection obtained by dividing the Steiner tree into a plurality of paths each having at least a Steiner point, as a value, being an intersection of 3 or more branches.
    Type: Application
    Filed: March 8, 2001
    Publication date: July 19, 2001
    Inventors: Izumi Nitta, Hidetoshi Matsuoka
  • Patent number: 5850350
    Abstract: In addition to cell size sums C.sub.a and C.sub.b as a restrictive condition to well balance the cell sizes in two divided areas D.sub.A and D.sub.B, net cell sizes N.sub.a and N.sub.b are taken into consideration by replacing the number of nets with a cell size under a restrictive condition in executing a mini-cut method. That is, the mini-cut method is performed under a restrictive condition that the integrated cell size obtained by adding the cell sizes C.sub.a and C.sub.b to the net cell sizes N.sub.a and N.sub.b is well balanced in both divided areas.
    Type: Grant
    Filed: August 26, 1996
    Date of Patent: December 15, 1998
    Assignee: Fujitsu Limited
    Inventors: Toshiyuki Shibuya, Izumi Nitta