Patents by Inventor Jade M. Kizer

Jade M. Kizer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • High-speed signaling systems and methods with adaptable, continuous-time equalization
    Patent number: 9860089
    Abstract: A receiver includes a continuous-time equalizer, a decision-feedback equalizer (DFE), data and error sampling logic, and an adaptation engine. The receiver corrects for inter-symbol interference (ISI) associated with the most recent data symbol (first post cursor ISI) by establishing appropriate equalization settings for the continuous-time equalizer based upon a measure of the first-post-cursor ISI.
    Type: Grant
    Filed: July 12, 2016
    Date of Patent: January 2, 2018
    Assignee: Rambus Inc.
    Inventors: Hae-Chang Lee, Brian S. Leibowitz, Jade M. Kizer, Thomas H. Greer, Akash Bansal
  • MEMORY CONTROLLER FOR STROBE-BASED MEMORY SYSTEMS
    Publication number: 20170372769
    Abstract: An integrated circuit (IC) memory controller is disclosed. The memory controller includes a receiver to receive a strobe signal and provide an internal strobe signal. An adjustable delay circuit delays an enable signal to generate a delayed enable signal. A gate circuit generates a gated strobe signal using the delayed enable signal that masks transitions of the internal strobe signal that occur prior to a valid region of the internal strobe signal. A sample circuit samples data using the gated strobe signal.
    Type: Application
    Filed: July 10, 2017
    Publication date: December 28, 2017
    Inventors: Jade M. Kizer, Sivakumar Doraiswamy, Benedict Lau
  • Clock and data recovery using receiver clock spread spectrum modulation and offset compensation
    Patent number: 9774441
    Abstract: A system and method for performing clock and data recovery. The system sets the phase of a recovered clock signal according to at least three estimates of the frequency offset, or rate of change of the frequency offset, between an arriving signal and the recovered clock signal.
    Type: Grant
    Filed: May 9, 2016
    Date of Patent: September 26, 2017
    Assignee: RAMBUS INC.
    Inventors: Hae-Chang Lee, Thomas H. Greer, III, Jade M. Kizer, Brian S. Leibowitz, Mark A. Horowitz
  • Memory controller for strobe-based memory systems
    Patent number: 9728247
    Abstract: An integrated circuit (IC) memory controller is disclosed. The memory controller includes a receiver to receive a strobe signal and provide an internal strobe signal. An adjustable delay circuit delays an enable signal to generate a delayed enable signal. A gate circuit generates a gated strobe signal using the delayed enable signal that masks transitions of the internal strobe signal that occur prior to a valid region of the internal strobe signal. A sample circuit samples data using the gated strobe signal.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: August 8, 2017
    Assignee: Rambus Inc.
    Inventors: Jade M. Kizer, Sivakumar Doraiswamy, Benedict Lau
  • MEMORY CONTROLLER FOR STROBE-BASED MEMORY SYSTEMS
    Publication number: 20170169876
    Abstract: An integrated circuit (IC) memory controller is disclosed. The memory controller includes a receiver to receive a strobe signal and provide an internal strobe signal. An adjustable delay circuit delays an enable signal to generate a delayed enable signal. A gate circuit generates a gated strobe signal using the delayed enable signal that masks transitions of the internal strobe signal that occur prior to a valid region of the internal strobe signal. A sample circuit samples data using the gated strobe signal.
    Type: Application
    Filed: December 22, 2016
    Publication date: June 15, 2017
    Inventors: Jade M. Kizer, Sivakumar Doraiswamy, Benedict Lau
  • Memory controller for strobe-based memory systems
    Patent number: 9564192
    Abstract: An integrated circuit (IC) memory controller is disclosed. The memory controller includes a receiver to receive a strobe signal and provide an internal strobe signal. An adjustable delay circuit delays an enable signal to generate a delayed enable signal. A gate circuit generates a gated strobe signal using the delayed enable signal that masks transitions of the internal strobe signal that occur prior to a valid region of the internal strobe signal. A sample circuit samples data using the gated strobe signal.
    Type: Grant
    Filed: July 6, 2016
    Date of Patent: February 7, 2017
    Assignee: Rambus Inc.
    Inventors: Jade M. Kizer, Sivakumar Doraiswamy, Benedict Lau
  • MEMORY CONTROLLER FOR STROBE-BASED MEMORY SYSTEMS
    Publication number: 20170004866
    Abstract: An integrated circuit (IC) memory controller is disclosed. The memory controller includes a receiver to receive a strobe signal and provide an internal strobe signal. An adjustable delay circuit delays an enable signal to generate a delayed enable signal. A gate circuit generates a gated strobe signal using the delayed enable signal that masks transitions of the internal strobe signal that occur prior to a valid region of the internal strobe signal. A sample circuit samples data using the gated strobe signal.
    Type: Application
    Filed: July 6, 2016
    Publication date: January 5, 2017
    Inventors: Jade M. Kizer, Sivakumar Doraiswamy, Benedict Lau
  • HIGH-SPEED SIGNALING SYSTEMS AND METHODS WITH ADAPTABLE, CONTINUOUS-TIME EQUALIZATION
    Publication number: 20170005839
    Abstract: A receiver includes a continuous-time equalizer, a decision-feedback equalizer (DFE), data and error sampling logic, and an adaptation engine. The receiver corrects for inter-symbol interference (ISI) associated with the most recent data symbol (first post cursor ISI) by establishing appropriate equalization settings for the continuous-time equalizer based upon a measure of the first-post-cursor ISI.
    Type: Application
    Filed: July 12, 2016
    Publication date: January 5, 2017
    Inventors: Hae-Chang Lee, Brian S. Leibowitz, Jade M. Kizer, Thomas H. Greer, Akash Bansal
  • Clock and Data Recovery Using Receiver Clock Spread Spectrum Modulation and Offset Compensation
    Publication number: 20160330013
    Abstract: A system and method for performing clock and data recovery. The system sets the phase of a recovered clock signal according to at least three estimates of the frequency offset, or rate of change of the frequency offset, between an arriving signal and the recovered clock signal.
    Type: Application
    Filed: May 9, 2016
    Publication date: November 10, 2016
    Inventors: Hae-Chang Lee, Thomas H. Greer, III, Jade M. Kizer, Brian S. Leibowitz, Mark A. Horowitz
  • High-speed signaling systems and methods with adaptable, continuous-time equalization
    Patent number: 9419663
    Abstract: A receiver includes a continuous-time equalizer, a decision-feedback equalizer (DFE), data and error sampling logic, and an adaptation engine. The receiver corrects for inter-symbol interference (ISI) associated with the most recent data symbol (first post cursor ISI) by establishing appropriate equalization settings for the continuous-time equalizer based upon a measure of the first-post-cursor ISI.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: August 16, 2016
    Assignee: Rambus Inc.
    Inventors: Hae-Chang Lee, Brian S. Leibowitz, Jade M. Kizer, Thomas H. Greer, Akash Bansal
  • Memory controller for strobe-based memory systems
    Patent number: 9390777
    Abstract: An integrated circuit (IC) memory controller is disclosed. The memory controller includes a receiver to receive a strobe signal and provide an internal strobe signal. An adjustable delay circuit delays an enable signal to generate a delayed enable signal. A gate circuit generates a gated strobe signal using the delayed enable signal that masks transitions of the internal strobe signal that occur prior to a valid region of the internal strobe signal. A sample circuit samples data using the gated strobe signal.
    Type: Grant
    Filed: August 7, 2015
    Date of Patent: July 12, 2016
    Assignee: Rambus Inc.
    Inventors: Jade M. Kizer, Sivakumar Doraiswamy, Benedict Lau
  • Clock and data recovery using receiver clock spread spectrum modulation and offset compensation
    Patent number: 9337992
    Abstract: A system and method for performing clock and data recovery. The system sets the phase of a recovered clock signal according to at least three estimates of the rate of change of an offset between the frequency of the data transmitter clock and the frequency of a receiver clock.
    Type: Grant
    Filed: December 17, 2014
    Date of Patent: May 10, 2016
    Assignee: RAMBUS INC.
    Inventors: Hae-Chang Lee, Thomas H. Greer, III, Jade M. Kizer, Brian S. Leibowitz, Mark A. Horowitz
  • MEMORY CONTROLLER FOR STROBE-BASED MEMORY SYSTEMS
    Publication number: 20160005446
    Abstract: An integrated circuit (IC) memory controller is disclosed. The memory controller includes a receiver to receive a strobe signal and provide an internal strobe signal. An adjustable delay circuit delays an enable signal to generate a delayed enable signal. A gate circuit generates a gated strobe signal using the delayed enable signal that masks transitions of the internal strobe signal that occur prior to a valid region of the internal strobe signal. A sample circuit samples data using the gated strobe signal.
    Type: Application
    Filed: August 7, 2015
    Publication date: January 7, 2016
    Inventors: Jade M. Kizer, Sivakumar Doraiswamy, Benedict Lau
  • Clock and Data Recovery Using Receiver Clock Spread Spectrum Modulation and Offset Compensation
    Publication number: 20150312019
    Abstract: A system and method for performing clock and data recovery. The system sets the phase of a recovered clock signal according to at least three estimates of the rate of change of an offset between the frequency of the data transmitter clock and the frequency of a receiver clock.
    Type: Application
    Filed: December 17, 2014
    Publication date: October 29, 2015
    Inventors: Hae-Chang Lee, Thomas H. Greer, III, Jade M. Kizer, Brian S. Leibowitz, Mark A. Horowitz
  • Memory controller for strobe-based memory systems
    Patent number: 9105325
    Abstract: An integrated circuit (IC) memory controller is disclosed. The memory controller includes a receiver to receive a strobe signal and provide an internal strobe signal. An adjustable delay circuit delays an enable signal to generate a delayed enable signal. A gate circuit generates a gated strobe signal using the delayed enable signal that masks transitions of the internal strobe signal that occur prior to a valid region of the internal strobe signal. A sample circuit samples data using the gated strobe signal.
    Type: Grant
    Filed: May 21, 2014
    Date of Patent: August 11, 2015
    Assignee: Rambus Inc.
    Inventors: Jade M. Kizer, Sivakumar Doraiswamy, Benedict Lau
  • HIGH-SPEED SIGNALING SYSTEMS AND METHODS WITH ADAPTABLE, CONTINUOUS-TIME EQUALIZATION
    Publication number: 20150078430
    Abstract: A receiver includes a continuous-time equalizer, a decision-feedback equalizer (DFE), data and error sampling logic, and an adaptation engine. The receiver corrects for inter-symbol interference (ISI) associated with the most recent data symbol (first post cursor ISI) by establishing appropriate equalization settings for the continuous-time equalizer based upon a measure of the first-post-cursor ISI.
    Type: Application
    Filed: November 25, 2014
    Publication date: March 19, 2015
    Inventors: Hae-Chang Lee, Brian S. Leibowitz, Jade M. Kizer, Thomas H. Greer, Akash Bansal
  • High-speed signaling systems and methods with adaptable, continuous-time equalization
    Patent number: 8934525
    Abstract: A receiver includes a continuous-time equalizer, a decision-feedback equalizer (DFE), data and error sampling logic, and an adaptation engine. The receiver corrects for inter-symbol interference (ISI) associated with the most recent data symbol (first post cursor ISI) by establishing appropriate equalization settings for the continuous-time equalizer based upon a measure of the first-post-cursor ISI.
    Type: Grant
    Filed: January 7, 2008
    Date of Patent: January 13, 2015
    Assignee: Rambus Inc.
    Inventors: Hae-Chang Lee, Brian S. Leibowitz, Jade M. Kizer, Thomas H. Greer, Akash Bansal
  • Clock and data recovery using receiver clock spread spectrum modulation and offset compensation
    Patent number: 8923467
    Abstract: A system and method for performing clock and data recovery. The system sets the phase of a recovered clock signal according to at least three estimates of the rate of change of an offset between the frequency of the data transmitter clock and the frequency of a receiver clock.
    Type: Grant
    Filed: November 12, 2012
    Date of Patent: December 30, 2014
    Assignee: Rambus Inc.
    Inventors: Hae-Chang Lee, Thomas H. Greer, III, Jade M. Kizer, Brian S. Leibowitz, Mark A. Horowitz
  • MEMORY CONTROLLER FOR STROBE-BASED MEMORY SYSTEMS
    Publication number: 20140254294
    Abstract: An integrated circuit (IC) memory controller is disclosed. The memory controller includes a receiver to receive a strobe signal and provide an internal strobe signal. An adjustable delay circuit delays an enable signal to generate a delayed enable signal. A gate circuit generates a gated strobe signal using the delayed enable signal that masks transitions of the internal strobe signal that occur prior to a valid region of the internal strobe signal. A sample circuit samples data using the gated strobe signal.
    Type: Application
    Filed: May 21, 2014
    Publication date: September 11, 2014
    Applicant: Rambus Inc.
    Inventors: Jade M. Kizer, Sivakumar Doraiswamy, Benedict Lau
  • Clock Synchronization In A Memory System
    Publication number: 20140169110
    Abstract: Synchronization is provided in a memory system. During memory write operations a timing reference signal is transmitted with control signals to a memory device, and a calibration signal is received from the memory device. An internal clock signal is adjusted based on the calibration signal, and a data signal is then transmitted according to the internal clock. In this manner, the data is synchronized such that the data is accurately sampled according to the local clock signal.
    Type: Application
    Filed: May 21, 2013
    Publication date: June 19, 2014
    Inventors: Jade M. Kizer, John M. Wilson, John Eble, III, Frederick A. Ware