Patents by Inventor Jae-Jin Shin

Jae-Jin Shin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170207066
    Abstract: A plasma etching apparatus includes an etching chamber and at least one processor. The etching chamber is configured to support a target therein. The at least one processor is configured to: determine a process condition for plasma etching the target before execution of a plasma etching process; and control an aspect of the chamber according to the process condition. The process condition includes a unit etching time over which the plasma etching process is to be continuously performed.
    Type: Application
    Filed: April 20, 2016
    Publication date: July 20, 2017
    Inventors: Kijong PARK, Jun-Youl Yang, Yongsun Ko, Kyunghyun Kim, Taeheon Kim, Jae Jin Shin
  • Patent number: 9502427
    Abstract: A preliminary tunnel insulation pattern and a preliminary charge storage pattern are formed on each active pattern extending in a direction, and a trench is defined between structures including the active pattern, the preliminary tunnel insulation pattern and the preliminary charge storage pattern. A preliminary isolation pattern partially fills the trench. A dielectric layer and a control gate electrode layer are formed on the preliminary charge storage pattern and the preliminary isolation pattern. The control gate electrode layer, the dielectric layer, the preliminary charge storage pattern and the preliminary tunnel insulation pattern are patterned to form gate structures including a tunnel insulation pattern, a charge storage pattern, a dielectric layer pattern and a control gate electrode. The preliminary isolation pattern is isotropically etched to form an isolation pattern and a first air gap. An insulating interlayer is formed between the gate structures to keep the first air gap.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: November 22, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-Jin Shin, Kyung-Hyun Kim, Jung-Hun No, Choong-Kee Seong, Seung-Pil Chung, Jung-Geun Jee
  • Publication number: 20160260726
    Abstract: A preliminary tunnel insulation pattern and a preliminary charge storage pattern are formed on each active pattern extending in a direction, and a trench is defined between structures including the active pattern, the preliminary tunnel insulation pattern and the preliminary charge storage pattern. A preliminary isolation pattern partially fills the trench. A dielectric layer and a control gate electrode layer are formed on the preliminary charge storage pattern and the preliminary isolation pattern. The control gate electrode layer, the dielectric layer, the preliminary charge storage pattern and the preliminary tunnel insulation pattern are patterned to form gate structures including a tunnel insulation pattern, a charge storage pattern, a dielectric layer pattern and a control gate electrode. The preliminary isolation pattern is isotropically etched to form an isolation pattern and a first air gap. An insulating interlayer is formed between the gate structures to keep the first air gap.
    Type: Application
    Filed: February 19, 2016
    Publication date: September 8, 2016
    Inventors: Jae-Jin SHIN, Kyung-Hyun KIM, Jung-Hun NO, Choong-Kee SEONG, Seung-Pil CHUNG, Jung-Geun JEE
  • Publication number: 20140337878
    Abstract: A broadcasting receiving apparatus includes a receiver having a plurality of tuners, a storage configured to store an image received by the receiver and a controller configured to control at least one of the tuners that does not tune to a currently viewed image out of the plurality of tuners, to alternately tune a plurality of channels for preset time, and controls the storage to store a channel information image corresponding to respective channels based on an image tuned to by the at least one tuner.
    Type: Application
    Filed: April 7, 2014
    Publication date: November 13, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jae-jin SHIN, Hung-rok KWON, Min-chul JUNG
  • Patent number: 8815676
    Abstract: Methods of forming vertical nonvolatile memory devices may include forming an electrically insulating layer, which includes a composite of a sacrificial layer sandwiched between first and second mold layers. An opening extends through the electrically insulating layer and exposes inner sidewalls of the first and second mold layers and the sacrificial layer. A sidewall of the opening may be lined with an electrically insulating protective layer and a first semiconductor layer may be formed on an inner sidewall of the electrically insulating protective layer within the opening. At least a portion of the sacrificial layer may then be selectively etched from between the first and second mold layers to thereby define a lateral recess therein, which exposes an outer sidewall of the electrically insulating protective layer.
    Type: Grant
    Filed: November 8, 2012
    Date of Patent: August 26, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Ryol Yang, Yoo-Chul Kong, Jung-Ho Kim, Jin-Gyun Kim, Jae-Jin Shin, Ji-Hoon Choi
  • Publication number: 20130065369
    Abstract: Methods of forming vertical nonvolatile memory devices may include forming an electrically insulating layer, which includes a composite of a sacrificial layer sandwiched between first and second mold layers. An opening extends through the electrically insulating layer and exposes inner sidewalls of the first and second mold layers and the sacrificial layer. A sidewall of the opening may be lined with an electrically insulating protective layer and a first semiconductor layer may be formed on an inner sidewall of the electrically insulating protective layer within the opening. At least a portion of the sacrificial layer may then be selectively etched from between the first and second mold layers to thereby define a lateral recess therein, which exposes an outer sidewall of the electrically insulating protective layer.
    Type: Application
    Filed: November 8, 2012
    Publication date: March 14, 2013
    Inventors: Sang-Ryol Yang, Yoo-Chul Kong, Jung-Ho Kim, Jin-Gyun Kim, Jae-Jin Shin, Ji-Hoon Choi
  • Patent number: 8309405
    Abstract: Methods of forming vertical nonvolatile memory devices may include forming an electrically insulating layer, which includes a composite of a sacrificial layer sandwiched between first and second mold layers. An opening extends through the electrically insulating layer and exposes inner sidewalls of the first and second mold layers and the sacrificial layer. A sidewall of the opening may be lined with an electrically insulating protective layer and a first semiconductor layer may be formed on an inner sidewall of the electrically insulating protective layer within the opening. At least a portion of the sacrificial layer may then be selectively etched from between the first and second mold layers to thereby define a lateral recess therein, which exposes an outer sidewall of the electrically insulating protective layer.
    Type: Grant
    Filed: September 8, 2011
    Date of Patent: November 13, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Ryol Yang, Yoo-Chul Kong, Jin-Gyun Kim, Jae-Jin Shin, Jung-Ho Kim, Ji-Hoon Choi
  • Patent number: 8283248
    Abstract: A method of manufacturing a semiconductor device includes forming a plurality of preliminary gate structures, forming a capping layer pattern on sidewalls of the plurality of preliminary gate structures, and forming a blocking layer on top surfaces of the plurality of preliminary gate structures and the capping layer pattern such that a void is formed therebetween. The method also includes removing the blocking layer and an upper portion of the capping layer pattern such that at least the upper sidewalls of the plurality of preliminary gate structures are exposed, and a lower portion of the capping layer pattern remains on lower sidewalls of the preliminary gate structures. The method further includes forming a conductive layer on at least the upper sidewalls of the plurality of preliminary gate structures, reacting the conductive layer with the preliminary gate structures, and forming an insulation layer having an air gap therein.
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: October 9, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tae-Hyun Kim, Kyung-Hyun Kim, Jae-Hwang Sim, Jae-Jin Shin, Jong-Heun Lim, Hyun-Min Park
  • Patent number: 8161507
    Abstract: A channel-switching apparatus and method in a digital broadcasting system omits conditional access control in logical channel-switching in one physical channel from processes that are executed for channel-switching in a digital broadcasting system, thereby reducing channel-switching time.
    Type: Grant
    Filed: May 30, 2006
    Date of Patent: April 17, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Jin Shin, Sung-Kwon Park, Hong-Ik Kim, Tae-Woong Kim, Su-Kyung Kim, Joon-Soon Im
  • Publication number: 20120083077
    Abstract: Methods of forming vertical nonvolatile memory devices may include forming an electrically insulating layer, which includes a composite of a sacrificial layer sandwiched between first and second mold layers. An opening extends through the electrically insulating layer and exposes inner sidewalls of the first and second mold layers and the sacrificial layer. A sidewall of the opening may be lined with an electrically insulating protective layer and a first semiconductor layer may be formed on an inner sidewall of the electrically insulating protective layer within the opening. At least a portion of the sacrificial layer may then be selectively etched from between the first and second mold layers to thereby define a lateral recess therein, which exposes an outer sidewall of the electrically insulating protective layer.
    Type: Application
    Filed: September 8, 2011
    Publication date: April 5, 2012
    Inventors: Sang-Ryol Yang, Yoo-Chul Kong, Jin-Gyun Kim, Jae-Jin Shin, Jung-Ho Kim, Ji-Hoon Choi
  • Publication number: 20120070976
    Abstract: A method of manufacturing a semiconductor device includes forming a plurality of preliminary gate structures, forming a capping layer pattern on sidewalls of the plurality of preliminary gate structures, and forming a blocking layer on top surfaces of the plurality of preliminary gate structures and the capping layer pattern such that a void is formed therebetween. The method also includes removing the blocking layer and an upper portion of the capping layer pattern such that at least the upper sidewalls of the plurality of preliminary gate structures are exposed, and a lower portion of the capping layer pattern remains on lower sidewalls of the preliminary gate structures. The method further includes forming a conductive layer on at least the upper sidewalls of the plurality of preliminary gate structures, reacting the conductive layer with the preliminary gate structures, and forming an insulation layer having an air gap therein.
    Type: Application
    Filed: September 16, 2011
    Publication date: March 22, 2012
    Inventors: Tae-Hyun KIM, Kyung-Hyun Kim, Jae-Hwang Sim, Jae-Jin Shin, Jong-Heun Lim, Hyun-Min Park
  • Publication number: 20120052671
    Abstract: A method of manufacturing a non-volatile memory device and a non-volatile memory device are provided. The method includes: providing a substrate on which a plurality of charge storage layers that are electrically separated from each other by device isolation layers are formed; recessing the device isolation layers such that an uppermost portion of the device isolation layers is lower than an uppermost portion of the charge storage layers; and dry cleaning first and second sides of each of the charge storage layers that are exposed by the device isolation layers by using a cleaning agent including NF3 gas.
    Type: Application
    Filed: July 27, 2011
    Publication date: March 1, 2012
    Inventors: Choong-kee Seong, Kwang-bok Kim, Kyung-hyun Kim, Jae-jin Shin, Hyun-ho Son
  • Publication number: 20110113465
    Abstract: A set-top box identification method and system for identifying the set-top box which is currently connected to a Downloadable Conditional Access System (DCAS) based on set-top box manufacturer and/or set-top box model are provided. The set-top box identification method for the DCAS includes retrieving set-top box type information upon receipt of a set-top box information request transmitted by a DCAS headend, transmitting the set-top box information including the set-top box type information to the DCAS headend, and identifying, at the DCAS headend, the set-top box based on the set-top box information. The DCAS headend can acquire the information on the connected set-top box at any time and determine the manufacturer and model of the set-top box from the set-top box information.
    Type: Application
    Filed: November 8, 2010
    Publication date: May 12, 2011
    Applicant: SAMSUNG ELECTRONICS CO. LTD.
    Inventors: Seong Min JOE, Jae Jin SHIN
  • Patent number: 7913285
    Abstract: A method for providing pay-per-view service while observing an OpenCable standard in realization of bi-directional digital cable broadcasting includes a method for interfacing between a set-top box and a point of deployment (POD), the method comprising the steps of: receiving, at the set-top box, an arbitrary program event purchase-related instruction inputted by a user, generating an object based on the arbitrary program event purchase-related instruction, and transmitting the arbitrary program event purchase-related instruction object to the POD; and receiving, at the POD, the object transmitted by the set-top box, generating an answer object based on the reception, and transmitting the answer object to the set-top box.
    Type: Grant
    Filed: December 23, 2005
    Date of Patent: March 22, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jae-Jin Shin
  • Patent number: 7462659
    Abstract: This invention is related to a reactive nanoparticular cyclodextrin derivative useful as a porogen and a low dielectric matrix, with excellent mechanical properties and uniformly distributed nanopores, manufactured by sol-gel reaction of the above reactive cyclodextrin. Furthermore, this invention also is related to an ultralow dielectric film, with uniformly distributed nanopores, a relatively high porosity of 51%, and a relatively low dielectric constant of 1.6, manufactured by thin-filming of the conventional organic or inorganic silicate precursor by using the above reactive nanoparticular cyclodextrin derivative as a porogen.
    Type: Grant
    Filed: December 14, 2004
    Date of Patent: December 9, 2008
    Assignee: Industry - University Cooperation Foundation Sogang University
    Inventors: Hee-Woo Rhee, Do Young Yoon, Kook Heon Char, Jin-Kyu Lee, Bongjin Moon, Sung-Kyu Min, Se Jung Park, Jae-Jin Shin
  • Publication number: 20080287573
    Abstract: The present invention relates to an ultra-low dielectric film for a copper interconnect, in particular, to an porous film prepared in such a manner that coating with an organic solution containing a polyalkyl silsesquioxane precursor or its copolymer as a matrix and acetylcyclodextrin nanoparticles as a template and then performing a sol-gel reaction and heat treatment at higher temperature. The present films may contain the template of up to 60 vol %, due to the use of acetylcyclodextrin, and have homogeneously distributed pores with the size of no more than 5 nm in the matrix. In addition, the present films exhibit a relatively low dielectric constant of about 1.5, and excellent interconnectivity between pores, so that they are considered a promising ultra-low dielectric film for a copper interconnect.
    Type: Application
    Filed: May 12, 2004
    Publication date: November 20, 2008
    Inventors: Hee-Woo Rhee, Do Young Yoon, Kook Heon Char, Jin-Kyu Lee, Bongjin Moon, Sung-Kyu Min, Se Jung Park, Jae-Jin Shin
  • Publication number: 20070128879
    Abstract: This invention is related to a reactive nanoparticular cyclodextrin derivative useful as a porogen and a low dielectric matrix, with excellent mechanical properties and uniformly distributed nanopores, manufactured by sol-gel reaction of the above reactive cyclodextrin. Furthemore, this invention also is related to an ultralow dielectric film, with uniformly distributed nanopores, a relatively high porosity of 51%, and a relatively low dielectric constant of 1.6, manufactured by thin-filming of the conventional organic or inorganic silicate precursor by using the above reactive cyclodextrin as a porogen.
    Type: Application
    Filed: December 14, 2004
    Publication date: June 7, 2007
    Applicant: INDUSTRY-UNIVERSITY CORPORATION FOUNDATION SOGANG UNIVERSITY
    Inventors: Hee-Woo Rhee, Do Young Yoon, Kook Heon Char, Jin-Kyu Lee, Bongjin Moon, Sung-Kyu Min, SeJung Park, Jae-Jin Shin
  • Publication number: 20070016920
    Abstract: A channel-switching apparatus and method in a digital broadcasting system omits conditional access control in logical channel-switching in one physical channel from processes that are executed for channel-switching in a digital broadcasting system, thereby reducing channel-switching time.
    Type: Application
    Filed: May 30, 2006
    Publication date: January 18, 2007
    Inventors: Jae-Jin Shin, Sung-Kwon Park, Hong-Ik Kim, Tae-Woong Kim, Su-Kyung Kim, Joon-Soon Im
  • Publication number: 20070006257
    Abstract: A channel changing apparatus and method in a digital broadcasting system can reduce channel changing time by including a plurality of broadcast programs in one logical channel, and in response to channel changing, selectively displaying a corresponding program in the logical channel.
    Type: Application
    Filed: April 5, 2006
    Publication date: January 4, 2007
    Inventors: Jae-Jin Shin, Sung-Kwon Park, Hong-Ik Kim, Tae-Woong Kim, Su-Kyung Kim, Joon-Soon Im
  • Publication number: 20060184971
    Abstract: A method for providing pay-per-view service while observing an OpenCable standard in realization of bi-directional digital cable broadcasting includes a method for interfacing between a set-top box and a point of deployment (POD), the method comprising the steps of: receiving, at the set-top box, an arbitrary program event purchase-related instruction inputted by a user, generating an object based on the arbitrary program event purchase-related instruction, and transmitting the arbitrary program event purchase-related instruction object to the POD; and receiving, at the POD, the object transmitted by the set-top box, generating an answer object based on the reception, and transmitting the answer object to the set-top box.
    Type: Application
    Filed: December 23, 2005
    Publication date: August 17, 2006
    Inventor: Jae-Jin Shin