Patents by Inventor Jae-woong Hyun
Jae-woong Hyun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20130294158Abstract: A multi-level cell (MLC) memory device may include ‘a’ number of m-bit MLC memory cells; an encoder that encodes ‘k’ bits of data at a code rate of k/n to generate an encoded bit stream; and a signal mapping module that applies pulses to the MLC memory cells in order to write the encoded bit stream in the MLC memory cells. In the device, ‘a’ and ‘m’ may be integers greater than or equal to 2, ‘k’ and ‘n’ may be integers greater than or equal to 1, and ‘n’ may be greater than ‘k’. A method of storing data in the device may include encoding ‘k’ bits of data at a code rate of k/n to generate an encoded bit stream. A method of reading data from the device may include decoding ‘n’ bits of data at a code rate of n/k to generate a decoded bit stream.Type: ApplicationFiled: July 8, 2013Publication date: November 7, 2013Inventors: Jun Jin KONG, Sung Chung PARK, Dong-Ku KANG, Young Hwan LEE, Si Hoon HONG, Jae Woong HYUN
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Patent number: 8499215Abstract: A multi-level cell (MLC) memory device may include ‘a’ number of m-bit MLC memory cells; an encoder that encodes ‘k’ bits of data at a code rate of k/n to generate an encoded bit stream; and a signal mapping module that applies pulses to the MLC memory cells in order to write the encoded bit stream in the MLC memory cells. In the device, ‘a’ and ‘m’ may be integers greater than or equal to 2, ‘k’ and ‘n’ may be integers greater than or equal to 1, and ‘n’ may be greater than ‘k’. A method of storing data in the device may include encoding ‘k’ bits of data at a code rate of k/n to generate an encoded bit stream. A method of reading data from the device may include decoding ‘n’ bits of data at a code rate of n/k to generate a decoded bit stream.Type: GrantFiled: May 24, 2007Date of Patent: July 30, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Jun Jin Kong, Sung Chung Park, Dong Ku Kang, Young Hwan Lee, Si Hoon Hong, Jae Woong Hyun
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Publication number: 20120063231Abstract: Methods, storage controllers, and systems for non-volatile storage element programming are described. One method includes programming user data in pages associated with a set of wordlines of an erase block of a non-volatile, solid-state storage element. The method further includes selecting at least one of the wordlines of the set programmed with the user data and restricting further programming of user data in the pages associated with the selected wordline. In some embodiments, the selected wordline occurs subsequent to the pages associated with the other wordlines of the set in a page programming order for the erase block.Type: ApplicationFiled: September 15, 2011Publication date: March 15, 2012Applicant: FUSION-IO, INC.Inventors: Robert Barry Wood, Jae Woong Hyun, Hairong Sun
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Publication number: 20120026790Abstract: Provided are a semiconductor device having a block state confirmation cell that may store information indicating the number of data bits written to a plurality of memory cells, a method of reading memory data based on the number of the data bits written, and/or a memory programming method of storing the information indicating the number of the data bits written. The semiconductor device may include one or more memory blocks and a controller. Each of the memory blocks may include a plurality of memory cells each storing data, and a block state confirmation cell storing information indicating the number of data bits written to the memory cells. The controller may read the data bits from the memory blocks based on the number of data bits, which is indicated in the information in the block state confirmation cell.Type: ApplicationFiled: September 1, 2011Publication date: February 2, 2012Inventors: Ju-hee Park, Jae-woong Hyun, Kyoung-lae Cho, Yoon-dong Park, Seung-hoon Lee, Kee-won Kwon
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Patent number: 8050087Abstract: Provided are a semiconductor device having a block state confirmation cell that may store information indicating the number of data bits written to a plurality of memory cells, a method of reading memory data based on the number of the data bits written, and/or a memory programming method of storing the information indicating the number of the data bits written. The semiconductor device may include one or more memory blocks and a controller. Each of the memory blocks may include a plurality of memory cells each storing data, and a block state confirmation cell storing information indicating the number of data bits written to the memory cells. The controller may read the data bits from the memory blocks based on the number of data bits, which is indicated in the information in the block state confirmation cell.Type: GrantFiled: February 20, 2008Date of Patent: November 1, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Ju-hee Park, Jae-woong Hyun, Kyoung-lae Cho, Yoon-dong Park, Seung-hoon Lee, Kee-won Kwon
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Patent number: 8020081Abstract: A multi-level cell (MLC) memory device may include: a MLC memory cell; an outer encoder that encodes data using a first encoding scheme to generate an outer encoded bit stream; and a trellis coded modulation (TCM) modulator that applies a program pulse to the MLC memory cell to write the data in the MLC memory cell. The program pulse may be generated by TCM modulating the outer encoded bit stream. A method of storing data in a MLC memory device, reading data from the MLC memory device, or storing data in and reading data from the MLC memory device may include: encoding data using a first encoding scheme to generate an outer encoded bit stream; and applying a program pulse to a MLC memory cell of the MLC memory device to write the data in the MLC memory cell. The program pulse may be generated by TCM modulating the outer encoded bit stream.Type: GrantFiled: May 22, 2007Date of Patent: September 13, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Jun Jin Kong, Sung Chung Park, Yun Tae Lee, Young Hwan Lee, Si Hoon Hong, Jae Woong Hyun, Dong Ku Kang
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Patent number: 8004906Abstract: Provided is a method of reliably operating a highly integratable nonvolatile memory device. The nonvolatile memory device may include a string selection transistor, a plurality of memory transistors, and a ground selection transistor between a bit line and a common source line. In the nonvolatile memory device, data may be erased from the memory transistors by applying an erasing voltage to the bit line or the common source line.Type: GrantFiled: August 3, 2010Date of Patent: August 23, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Ki-ha Hong, Sung-hoon Lee, Jae-woong Hyun, Jai-kwang Shin, Young-gu Jin, Sung-il Park, Jong-seob Kim
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Patent number: 8000148Abstract: Methods of operating nonvolatile memory devices are provided. In a method of operating a nonvolatile memory device including a plurality of memory cells, recorded data is stabilized by inducing a boosting voltage on a channel of a memory cell in which the recorded data is recorded. The memory cell is selected from a plurality of memory cells and the boosting voltage on the channel of the selected memory cell is induced by a channel voltage of at least one memory cell connected to the selected memory cell.Type: GrantFiled: August 3, 2010Date of Patent: August 16, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Won-joo Kim, Tae-hee Lee, Jae-woong Hyun, Yoon-dong Park
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Patent number: 7978584Abstract: There is provided a method and device for reading, writing, or both, data from or to a pattern recognition type optical memory having a light transmittable substrate. Patterns can be formed in the pattern recognition type optical memory from light images representing the data. An optical memory reading device comprises a light source, an image detecting unit for detecting images corresponding to the patterns and generating image signals converted by an optical/electric converter into electric signals. An optical memory writing device comprises a light source, an electric/optical converter for receiving an electric signal corresponding to the data and converting the electric signal into an image signal, and an image generation unit for receiving the light emitted from the light source and the image signal and generating light images corresponding to the image signal, wherein the images are configured to form the patterns on the light transmittable substrate.Type: GrantFiled: December 28, 2006Date of Patent: July 12, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Nam-kyun Tak, Chang-hyun Kim, Yeong-taek Lee, Jae-woong Hyun
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Patent number: 7977707Abstract: Provided are a capacitorless DRAM and methods of manufacturing the same. The capacitorless DRAM may include a substrate including a source, a drain and a channel, a gate on the channel of the substrate, and a hole reserving unit below the channel.Type: GrantFiled: December 27, 2007Date of Patent: July 12, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Ki-ha Hong, Jae-woong Hyun, Young-gu Jin, Jai-kwang Shin
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Patent number: 7947590Abstract: The non-volatile memory device may include a semiconductor substrate having a body and a pair of fins. A bridge insulating layer may non-electrically connect upper portions of the pair of fins to define a void between the pair of fins. Outer surfaces of the pair of fins are the surfaces of the pair of fins that do not face the void and inner surfaces of the pair of fins are the surfaces of the pair of fins that do face the void. The non-volatile memory device may further include at least one control gate electrode that may cover at least a portion of outer surfaces of the pair of fins, may extend over the bridge insulating layer, and may be isolated from the semiconductor substrate. At least one pair of gate insulating layers may be between the at least one control gate electrode and the pair of fins, and at least one pair of storage nodes may be between the at least one pair of gate insulating layers and the at least one control gate electrode.Type: GrantFiled: October 2, 2009Date of Patent: May 24, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Yoon-Dong Park, Won-Joo Kim, June-Mo Koo, Suk-Pil Kim, Jae-Woong Hyun, Jung-Hoon Lee
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Patent number: 7911842Abstract: Provided are a memory cell programming method and a semiconductor device which may be capable of simultaneously writing a bit of data and then another bit of the data to a plurality of memory blocks. The memory programming method, in which M bits of data are written to a plurality of memory blocks, may include a data division operation and a data writing operation where M may be a natural number. In the data division operation, the plurality of memory blocks may be divided into a plurality of memory block groups. In the data writing operation, an ith bit of the data may be simultaneously written to two or more memory block groups from among the plurality memory block groups, and then an i+1th bit of the data may be simultaneously written to the two or more memory block groups from among the plurality memory block groups, where i is a natural number less than M.Type: GrantFiled: April 17, 2008Date of Patent: March 22, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Ju-hee Park, Jae-woong Hyun, Yoon-dong Park, Kyoung-lae Cho, Sung-jae Byun, Seung-hwan Song, Jun-jin Kong, Sung-chung Park
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Patent number: 7889552Abstract: A nonvolatile semiconductor device according to example embodiments may include a plurality of memory cells on a semiconductor substrate and at least one selection transistor on the semiconductor substrate, wherein the at least one selection transistor may be disposed at a different level from the plurality of memory cells. The at least one selection transistor may be connected to a data line and/or a power source line via a first contact and/or a third contact, respectively. The at least one selection transistor may be connected to the plurality of memory cells via a second contact and/or a fourth contact. The active layer of the at least one selection transistor may contain an oxide. Accordingly, the nonvolatile semiconductor device according to example embodiments may include a selection transistor having a reduced size.Type: GrantFiled: February 6, 2008Date of Patent: February 15, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Jae-chul Park, Jae-woong Hyun, Young-soo Park, Sun-il Kim
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Publication number: 20100302870Abstract: Provided is a method of reliably operating a highly integratable nonvolatile memory device. The nonvolatile memory device may include a string selection transistor, a plurality of memory transistors, and a ground selection transistor between a bit line and a common source line. In the nonvolatile memory device, data may be erased from the memory transistors by applying an erasing voltage to the bit line or the common source line.Type: ApplicationFiled: August 3, 2010Publication date: December 2, 2010Inventors: Ki-ha Hong, Sung-hoon Lee, Jae-woong Hyun, Jai-kwang Shin, Young-gu Jin, Sung-iI Park, Jong-seob Kim
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Publication number: 20100296344Abstract: Methods of operating nonvolatile memory devices are provided. In a method of operating a nonvolatile memory device including a plurality of memory cells, recorded data is stabilized by inducing a boosting voltage on a channel of a memory cell in which the recorded data is recorded. The memory cell is selected from a plurality of memory cells and the boosting voltage on the channel of the selected memory cell is induced by a channel voltage of at least one memory cell connected to the selected memory cell.Type: ApplicationFiled: August 3, 2010Publication date: November 25, 2010Inventors: Won-joo KIM, Tae-hee LEE, Jae-woong HYUN, Yoon-dong PARK
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Patent number: 7839694Abstract: Methods of reading memory cell data and nonvolatile memory devices, which apply a low voltage to memory cells adjacent to a memory cell from which data may be read are provided. Methods of reading memory cell data of nonvolatile memory device include applying a first voltage to a control gate of a read memory cell from among the plurality of memory cells, applying a third voltage to control gates of memory cell adjacent to the read memory cell, and applying a second voltage to control gates of memory cells other than the read memory cell and the adjacent memory cells.Type: GrantFiled: March 21, 2008Date of Patent: November 23, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: In-sung Joe, Young-gu Jin, Jae-woong Hyun, Yoon-dong Park
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Patent number: 7829932Abstract: Example embodiments relate to a semiconductor device including a fin-type channel region and a method of fabricating the same. The semiconductor device includes a semiconductor substrate, a semiconductor pillar and a contact plug. The semiconductor substrate includes at least one pair of fins used (or functioning) as an active region. The semiconductor pillar may be interposed between portions of the fins to connect the fins. The contact plug may be disposed (or formed) on the semiconductor pillar and electrically connected to top surfaces of the fins.Type: GrantFiled: October 31, 2007Date of Patent: November 9, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Seung-hwan Song, Suk-pil Kim, Yoon-dong Park, Won-joo Kim, June-mo Koo, Kyoung-Iae Cho, Jae-woong Hyun, Sung-jae Byun
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Patent number: 7813185Abstract: Provided is a method of reliably operating a highly integratable nonvolatile memory device. The nonvolatile memory device may include a string selection transistor, a plurality of memory transistors, and a ground selection transistor between a bit line and a common source line. In the nonvolatile memory device, data may be erased from the memory transistors by applying an erasing voltage to the bit line or the common source line.Type: GrantFiled: January 29, 2008Date of Patent: October 12, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Ki-ha Hong, Sung-hoon Lee, Jae-woong Hyun, Jai-kwang Shin, Young-gu Jin, Sung-il Park, Jong-seob Kim
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Patent number: 7791942Abstract: Methods of operating nonvolatile memory devices are provided. In a method of operating a nonvolatile memory device including a plurality of memory cells, recorded data is stabilized by inducing a boosting voltage on a channel of a memory cell in which the recorded data is recorded. The memory cell is selected from a plurality of memory cells and the boosting voltage on the channel of the selected memory cell is induced by a channel voltage of at least one memory cell connected to the selected memory cell.Type: GrantFiled: March 4, 2008Date of Patent: September 7, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Won-joo Kim, Tae-hee Lee, Jae-woong Hyun, Yoon-dong Park
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Patent number: 7729175Abstract: Provided are a method of writing/reading data into/from a memory cell and a page buffer using different codes for the writing and reading operations. The method of writing/reading data into/from a memory cell that has a plurality of threshold voltage distributions includes a data writing operation and a data reading operation. In the data writing operation, data having a plurality of bits is written into the memory cell by using a plurality of writing codes corresponding to threshold voltage distributions. In the data reading operation, the data having a plurality of bits is read from the memory cell by using reading codes corresponding to the threshold voltage distributions from among the threshold voltage distributions. In the method of writing/reading data into/from a memory cell, a part of the writing codes is different from a corresponding part of the reading codes.Type: GrantFiled: January 25, 2008Date of Patent: June 1, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Kyoung-lae Cho, Yoon-dong Park, Jun-jin Kong, Seung-hoon Lee, Jae-woong Hyun, Sung-jae Byun, Ju-hee Park, Seung-hwan Song