Patents by Inventor Jae Hyoung Lee
Jae Hyoung Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240118659Abstract: A hologram projection apparatus according to an embodiment of the present invention includes: a hologram image projector configured to project a hologram test image for testing a hologram image onto a projection plate through a plurality of projection modules projecting R, G, and B images, respectively; an optimal angle calculation configured to calculate optimal projection angles of each of the projection modules when quality of the hologram test image does not satisfy reference quality; and a projection module adjuster configured to adjust angles of each of the projection modules to the optimal projection angles.Type: ApplicationFiled: August 11, 2023Publication date: April 11, 2024Applicant: KIEL INSTITUTEInventors: Hong-Shik LEE, Jae Hyoung RYU, Sol Ah JEON
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Publication number: 20240120474Abstract: The present invention relates to a flexible electrode material and a preparation method therefor. An aspect of the present invention provides a flexible electrode material comprising a graphene film and a free-standing metal oxide formed on the graphene film.Type: ApplicationFiled: November 19, 2021Publication date: April 11, 2024Applicant: INDUSTRY-ACADEMIC COOPERATION FOUNDATION GYEONGSANG NATIONAL UNIVERSITYInventors: Geon Hyoung AN, Young Geun LEE, Jae Yeon LEE
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Patent number: 11943090Abstract: An apparatus and method for multiplexing signals using layered division multiplexing are disclosed. A signal multiplexing apparatus according to an embodiment of the present invention includes a combiner configured to combine a core layer signal and an enhanced layer signal at different power levels, and a time interleaver configured to perform interleaving applied to both the core layer signal and the enhanced layer signal.Type: GrantFiled: July 19, 2021Date of Patent: March 26, 2024Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Sung-Ik Park, Jae-Young Lee, Sun-Hyoung Kwon, Heung-Mook Kim, Nam-Ho Hur
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Publication number: 20240080011Abstract: A bulk-acoustic wave (BAW) resonator includes a central portion in which a first electrode, a piezoelectric layer, and a second electrode are sequentially stacked on a substrate, and an extension portion extending externally from the central portion, and an insertion layer and a loss prevention film are disposed in the extension portion between the substrate and the second electrode. The loss prevention film is formed to have a thickness of 50 ? to 500 ?. The insertion layer is stacked on the loss prevention film, and has a side surface opposing the central portion, the side surface is formed as a first inclined surface having a first inclination angle. The loss prevention film has a side surface opposing the central portion, the side surface is formed as a second inclined surface having a second inclination angle. The second inclination angle is formed to be greater than the first inclination angle.Type: ApplicationFiled: February 22, 2023Publication date: March 7, 2024Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Moon Chul LEE, Jae Hyoung GIL, Kwang Su KIM, Sung Jun LEE, Yong Suk KIM, Dong Hyun PARK, Tae Kyung LEE
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Patent number: 11923872Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 7/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for quadrature phase shift keying (QPSK) modulation.Type: GrantFiled: April 28, 2023Date of Patent: March 5, 2024Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Sung-Ik Park, Sun-Hyoung Kwon, Jae-Young Lee, Heung-Mook Kim, Nam-Ho Hur
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Publication number: 20230422507Abstract: A method of manufacturing a semiconductor device includes forming a first stack, forming a sacrificial structure and a first contact passing through the first stack, forming a second stack on the first stack, forming a first hole through the second stack to expose the sacrificial structure, forming a second hole through the first stack by removing the sacrificial structure, forming a channel structure in the first and second holes, and forming a second contact passing through the second stack and coupled to the first contact.Type: ApplicationFiled: September 11, 2023Publication date: December 28, 2023Applicant: SK hynix Inc.Inventor: Jae Hyoung LEE
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Patent number: 11778822Abstract: A method of manufacturing a semiconductor device includes forming a first stack, forming a sacrificial structure and a first contact passing through the first stack, forming a second stack on the first stack, forming a first hole through the second stack to expose the sacrificial structure, forming a second hole through the first stack by removing the sacrificial structure, forming a channel structure in the first and second holes, and forming a second contact passing through the second stack and coupled to the first contact.Type: GrantFiled: October 19, 2020Date of Patent: October 3, 2023Assignee: SK hynix Inc.Inventor: Jae Hyoung Lee
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Publication number: 20230219908Abstract: Provided are a 2-arylthiazole derivative or pharmaceutically acceptable salt thereof having a specific carboxamide moiety, including a substituted aminoalkyl-carboxamide moiety, a N-containing heterocyclic-alkyl-carboxamide moiety, or a N-containing heterocyclic-carboxamide moiety, a process for the preparation thereof, and a pharmaceutical composition comprising the same.Type: ApplicationFiled: January 15, 2021Publication date: July 13, 2023Applicant: HEXAPHARMATEC CO., LTD.Inventors: Shin HAN, Jae-Hyoung LEE
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Publication number: 20210358943Abstract: A method of manufacturing a semiconductor device includes forming a first stack, forming a sacrificial structure and a first contact passing through the first stack, forming a second stack on the first stack, forming a first hole through the second stack to expose the sacrificial structure, forming a second hole through the first stack by removing the sacrificial structure, forming a channel structure in the first and second holes, and forming a second contact passing through the second stack and coupled to the first contact.Type: ApplicationFiled: October 19, 2020Publication date: November 18, 2021Applicant: SK hynix Inc.Inventor: Jae Hyoung LEE
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Publication number: 20210340119Abstract: Provided is a novel catechol derivative or pharmaceutically acceptable salt thereof having an alkyl moiety substituted with alkylamino and/or a N-alkyl-substituted thiophene-(thio)carboxamide moiety, a process for the preparation thereof, and a pharmaceutical composition including the same.Type: ApplicationFiled: July 17, 2019Publication date: November 4, 2021Applicant: HEXAPHARMATEC CO., LTD.Inventors: Shin HAN, Jae-Hyoung LEE
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Patent number: 10978637Abstract: A method for fabricating an electronic device including a semiconductor memory may include forming a buffer layer over a substrate, the buffer layer operable to aide in crystal growth of an under layer; forming the under layer over the buffer layer, the under layer operable to aide in crystal growth of a free layer; and forming a Magnetic Tunnel Junction (MTJ) structure including the free layer having a variable magnetization direction, a pinned layer having a pinned magnetization direction, and a tunnel barrier layer interposed between the free layer and the pinned layer over the under layer.Type: GrantFiled: February 2, 2018Date of Patent: April 13, 2021Assignee: SK hynix Inc.Inventors: Ku-Youl Jung, Guk-Cheon Kim, Jong-Koo Lim, Yang-Kon Kim, Jae-Hyoung Lee
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Patent number: 10923168Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a variable resistance element including a Magnetic Tunnel Junction (MTJ) structure including a free layer having a variable magnetization direction, a pinned layer having a fixed magnetization direction and a tunnel barrier layer interposed between the free layer and the pinned layer; a first protective layer disposed on a lower sidewall of the variable resistance element; and a second protective layer disposed on an upper sidewall of the variable resistance element, wherein any one layer of the first protective layer and the second protective layer may apply a compressive stress to the variable resistance element, and the other layer applies a tensile stress to the variable resistance element.Type: GrantFiled: February 18, 2020Date of Patent: February 16, 2021Assignee: SK hynix Inc.Inventors: Jong-Koo Lim, Ku-Youl Jung, Jae-Hyoung Lee, Jeong-Myeong Kim, Tae-Young Lee
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Patent number: 10873021Abstract: According to one embodiment, a magnetic device includes a magnetoresistive effect element including a first ferromagnet, a conductor, and an oxide provided between the first ferromagnet and the conductor, the oxide including a first oxide of a rare-earth element and a second oxide of an element of which a covalent radius is smaller than a covalent radius of the rare-earth element.Type: GrantFiled: September 6, 2018Date of Patent: December 22, 2020Assignees: TOSHIBA MEMORY CORPORATION, SK HYNIX INC.Inventors: Young Min Eeh, Daisuke Watanabe, Jae-Hyoung Lee, Toshihiko Nagase, Kazuya Sawada, Tadaaki Oikawa, Kenichi Yoshino, Taiga Isoda
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Publication number: 20200185017Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a variable resistance element including a Magnetic Tunnel Junction (MTJ) structure including a free layer having a variable magnetization direction, a pinned layer having a fixed magnetization direction and a tunnel barrier layer interposed between the free layer and the pinned layer; a first protective layer disposed on a lower sidewall of the variable resistance element; and a second protective layer disposed on an upper sidewall of the variable resistance element, wherein any one layer of the first protective layer and the second protective layer may apply a compressive stress to the variable resistance element, and the other layer applies a tensile stress to the variable resistance element.Type: ApplicationFiled: February 18, 2020Publication date: June 11, 2020Inventors: Jong-Koo Lim, Ku-Youl Jung, Jae-Hyoung Lee, Jeong-Myeong Kim, Tae-Young Lee
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Patent number: 10580969Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a first magnetic layer; a second magnetic layer; and a spacer layer interposed between the first magnetic layer and the second magnetic layer, wherein the spacer layer includes a first layer, a second layer and an intermediate layer interposed between the first layer and the second layer, and wherein each of the first layer and the second layer includes an oxide, or a nitride, or a combination of an oxide and a nitride, the intermediate layer includes a multilayer structure including [Ru/x]n or [x/Ru]n, x includes a metal, an oxide, or a nitride, or a combination of a metal, an oxide and a nitride, and n represents an integer of 1 or greater.Type: GrantFiled: December 4, 2018Date of Patent: March 3, 2020Assignees: SK hynix Inc., Toshiba Memory CorporationInventors: Tae-Young Lee, Jae-Hyoung Lee, Sung-Woong Chung, Eiji Kitagawa
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Patent number: 10566041Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a variable resistance element including a Magnetic Tunnel Junction (MTJ) structure including a free layer having a variable magnetization direction, a pinned layer having a fixed magnetization direction and a tunnel barrier layer interposed between the free layer and the pinned layer; a first protective layer disposed on a lower sidewall of the variable resistance element; and a second protective layer disposed on an upper sidewall of the variable resistance element, wherein any one layer of the first protective layer and the second protective layer may apply a compressive stress to the variable resistance element, and the other layer applies a tensile stress to the variable resistance element.Type: GrantFiled: August 6, 2018Date of Patent: February 18, 2020Assignee: SK hynix Inc.Inventors: Jong-Koo Lim, Ku-Youl Jung, Jae-Hyoung Lee, Jeong-Myeong Kim, Tae-Young Lee
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Publication number: 20190296226Abstract: According to one embodiment, a magnetic device includes a magnetoresistive effect element including a first ferromagnet, a conductor, and an oxide provided between the first ferromagnet and the conductor, the oxide including a first oxide of a rare-earth element and a second oxide of an element of which a covalent radius is smaller than a covalent radius of the rare-earth element.Type: ApplicationFiled: September 6, 2018Publication date: September 26, 2019Applicants: TOSHIBA MEMORY CORPORATION, SK HYNIX INC.Inventors: Young Min EEH, Daisuke WATANABE, Jae-Hyoung LEE, Toshihiko NAGASE, Kazuya SAWADA, Tadaaki OIKAWA, Kenichi YOSHINO, Taiga ISODA
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Patent number: 10408107Abstract: A power apparatus including a reducing agent supply control system includes: an engine configured to emit exhaust gas containing nitrogen oxide by burning air and fuel at a preset air-fuel ratio; an exhaust passage configured such that the exhaust gas emitted by the engine moves therethrough; a pressure sensor configured to actually measure the pressure of air which is supplied to the engine; a nitrogen oxide concentration sensor installed on the exhaust passage, and configured to measure the nitrogen oxide (NOx) concentration of the exhaust gas; a reducing agent supply unit configured to supply a reducing agent to the exhaust gas which moves along the exhaust passage; and a control unit configured to determine the amount of reducing agent to be supplied based on information received from the pressure sensor and the nitrogen oxide concentration sensor, and to control the reducing agent supply unit.Type: GrantFiled: April 21, 2016Date of Patent: September 10, 2019Assignee: DOOSAN INFRACORE CO., LTD.Inventors: Jae Hyoung Lee, Tae Sub Kim, Ki Bum Kim
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Patent number: 10395708Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a free layer having a variable magnetization direction; a pinned layer having a fixed magnetization direction; and a tunnel barrier layer interposed between the free layer and the pinned layer, wherein the free layer may include: a first sublayer having a damping constant of 0.1 or less; a second sublayer having a perpendicular magnetic anisotropy energy density ranging from 1.0×104 to 1.0×108 erg/cm3; and an insertion layer interposed between the first sublayer and the second sublayer.Type: GrantFiled: August 6, 2018Date of Patent: August 27, 2019Assignee: SK hynix Inc.Inventors: Ku-Youl Jung, Jong-Koo Lim, Yang-Kon Kim, Jae-Hyoung Lee
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Publication number: 20190173001Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a first magnetic layer; a second magnetic layer; and a spacer layer interposed between the first magnetic layer and the second magnetic layer, wherein the spacer layer includes a first layer, a second layer and an intermediate layer interposed between the first layer and the second layer, and wherein each of the first layer and the second layer includes an oxide, or a nitride, or a combination of an oxide and a nitride, the intermediate layer includes a multilayer structure including [Ru/x]n or [x/Ru]n, x includes a metal, an oxide, or a nitride, or a combination of a metal, an oxide and a nitride, and n represents an integer of 1 or greater.Type: ApplicationFiled: December 4, 2018Publication date: June 6, 2019Inventors: Tae-Young LEE, Jae-Hyoung LEE, Sung-Woong CHUNG, Eiji KITAGAWA