Patents by Inventor Jairus Legaspi Pisigan

Jairus Legaspi Pisigan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7777354
    Abstract: An integrated circuit package system includes: providing a frame; attaching a leaded package having leads adjacent the frame wherein the leads extend towards a side opposite the frame; and applying a package encapsulant over the leaded package having the leads partially exposed opposite the frame.
    Type: Grant
    Filed: June 3, 2008
    Date of Patent: August 17, 2010
    Assignee: STATS Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Jairus Legaspi Pisigan, Henry Descalzo Bathan, Lionel Chien Hui Tay
  • Publication number: 20100123229
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming an external interconnect; forming a first planar terminal adjacent to the external interconnect and non-planar to a portion the external interconnect; mounting a first integrated circuit over the first planar terminal; connecting the first integrated circuit with the external interconnect; and forming an encapsulation over the first planar terminal covering the first integrated circuit and with the external interconnect extending from a non-horizontal side of the encapsulation and with the first planar terminal coplanar with the adjacent portion of the encapsulation exposing the first planar terminal.
    Type: Application
    Filed: November 17, 2008
    Publication date: May 20, 2010
    Inventors: Henry Descalzo Bathan, Zigmund Ramirez Camacho, Jairus Legaspi Pisigan, Lionel Chien Hui Tay
  • Patent number: 7691674
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a first lead, having a first body and a first tip, and a paddle, having a protrusion at a side of the paddle, with the first body adjacent to the protrusion; forming a second lead having a second body and a second tip adjacent to the paddle; attaching a device, having a device active side, to the paddle and adjacent to the protrusion; mounting a component, having a component active side, to the device with the component active side facing the device active side and between the second body and the first tip; connecting the component and the second body; and forming an encapsulation covering the device, and partially covering the paddle, the component, the first lead, and the second lead.
    Type: Grant
    Filed: June 20, 2009
    Date of Patent: April 6, 2010
    Assignee: Stats Chippac Ltd.
    Inventors: Henry Descalzo Bathan, Zigmund Ramirez Camacho, Jairus Legaspi Pisigan
  • Publication number: 20100078831
    Abstract: An integrated circuit package system includes: providing a die attach pad; forming a package contact pad adjacent the die attach pad; attaching an integrated circuit over the die attach pad; attaching a die connector to the integrated circuit and the package contact pad; and forming an encapsulant over the die connector and the integrated circuit, the encapsulant having an encapsulant edge from a sawless singulation process.
    Type: Application
    Filed: September 26, 2008
    Publication date: April 1, 2010
    Inventors: Jairus Legaspi Pisigan, Zigmund Ramirez Camacho, Henry Descalzo Bathan
  • Publication number: 20100072591
    Abstract: An integrated circuit package system includes: forming an anti-peel pad having both a concave ring and an external terminal with the concave ring, having a peripheral wall, surrounding the external terminal; connecting an integrated circuit with the anti-peel pad; and forming an encapsulation over the integrated circuit, the concave ring, and the external terminal with the encapsulation under the peripheral wall.
    Type: Application
    Filed: September 22, 2008
    Publication date: March 25, 2010
    Inventors: Zigmund Ramirez Camacho, Jairus Legaspi Pisigan, Henry Descalzo Bathan
  • Publication number: 20100038761
    Abstract: An integrated circuit package system includes: mounting a first integrated circuit over a carrier; mounting an interposer, having an opening, over the first integrated circuit and the carrier with the interposer having an overhang over the carrier; connecting an internal interconnect, through the opening, between the carrier and the interposer; and forming an encapsulation over the first integrated circuit, the internal interconnect, and the carrier.
    Type: Application
    Filed: August 18, 2008
    Publication date: February 18, 2010
    Inventors: Lionel Chien Hui Tay, Jairus Legaspi Pisigan, Zigmund Ramirez Camacho
  • Publication number: 20100025836
    Abstract: A package-on-package system includes: providing a bottom package module incorporating a bottom package substrate; attaching a central internal stacking module, incorporating a central interposer, on top of the bottom package module; placing a spacer on the top surface of the central internal stacking module; mounting a first top package module, incorporating a first top interposer with an opening, on the spacer; and enclosing at least portions of the bottom package module, the central internal stacking module, and the first top package module with an encapsulant.
    Type: Application
    Filed: August 1, 2008
    Publication date: February 4, 2010
    Inventors: Lionel Chien Hui Tay, Jairus Legaspi Pisigan, Zigmund Ramirez Camacho
  • Publication number: 20100025834
    Abstract: An integrated circuit package on package system includes: providing a lead having a wire-bonded die with a bond wire connected thereto; mounting a fan-in interposer over the wire-bonded die and the bond wire; connecting the fan-in interposer to the lead with the bond wires; and encapsulating the wire-bonded die, bond wires, and the fan-in interposer with an encapsulation leaving a portion of the fan-in interposer exposed.
    Type: Application
    Filed: August 1, 2008
    Publication date: February 4, 2010
    Inventors: Zigmund Ramirez Camacho, Jairus Legaspi Pisigan, Lionel Chien Hui Tay, Henry Descalzo Bathan
  • Publication number: 20100025830
    Abstract: An integrated circuit package system includes: providing a die attach paddle with interconnection pads connected to a bottom surface of the die attach paddle; connecting a first device to the interconnection pads with a bond wire; connecting a lead to the interconnection pad or to the first device; encapsulating the first device and the die attach paddle with an encapsulation having a top surface; and etching the die attach paddle leaving a recess in the top surface of the encapsulation.
    Type: Application
    Filed: August 1, 2008
    Publication date: February 4, 2010
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Lionel Chien Hui Tay, Jairus Legaspi Pisigan
  • Publication number: 20090243064
    Abstract: A method of manufacturing a semiconductor package involves providing a substrate having a window. The substrate may include a leadframe having half-etched leads. First and second semiconductor devices are mounted to a top surface of the substrate on either side of the window using an adhesive. A third semiconductor device is mounted to the first and second semiconductor devices using an adhesive. The third semiconductor device is disposed over the window of the substrate. A wirebond or other electrical interconnect is formed between the third semiconductor device and a contact pad formed over a bottom surface of the substrate opposite the top surface of the substrate. The wirebond or other electrical interconnect passes through the window of the substrate. An encapsulant is deposited over the first, second, and third semiconductor devices.
    Type: Application
    Filed: March 31, 2008
    Publication date: October 1, 2009
    Applicant: STATS ChipPAC, Ltd.
    Inventors: Zigmund R. Camacho, Jairus Legaspi Pisigan, Lionel Chien Hui Tay, Henry D. Bathan
  • Publication number: 20090166845
    Abstract: An integrated circuit package system including: forming a die pad, wherein the die pad has a tiebar at a corner; forming a lead wherein the lead is connected to the tiebar; connecting an integrated circuit die to the die pad; and forming an encapsulation, having an edge, over the integrated circuit die with the lead extending from and beyond the edge.
    Type: Application
    Filed: December 27, 2007
    Publication date: July 2, 2009
    Inventors: Zigmund Ramirez Camacho, Lionel Chien Hui Tay, Jairus Legaspi Pisigan, Henry Descalzo Bathan
  • Publication number: 20090121335
    Abstract: An integrated circuit package system comprising: providing a substrate having a cavity; sealing a package over the cavity of the substrate; and forming an encapsulant over the package and a portion of the substrate substantially preventing the encapsulant from forming in the cavity.
    Type: Application
    Filed: November 12, 2007
    Publication date: May 14, 2009
    Inventors: Zigmund Ramirez Camacho, Jairus Legaspi Pisigan, Abelardo Jr. Advincula, Lionel Chien Hui Tay
  • Publication number: 20090115032
    Abstract: An integrated circuit package system includes: forming a lead having a both top contact portion and a bottom contact portion; connecting an integrated circuit die and the lead; and forming a package encapsulation, having a top side and a bottom side, over the integrated circuit die. The forming the package encapsulation includes partially exposing the top contact portion at the top side, and partially exposing the bottom contact portion along the bottom side with the bottom contact portion extending beyond a nonhorizontal portion of the package encapsulation.
    Type: Application
    Filed: November 7, 2007
    Publication date: May 7, 2009
    Inventors: Zigmund Ramirez Camacho, Jairus Legaspi Pisigan, Jose Alvin Caparas, Lionel Chien Hui Tay
  • Publication number: 20090085177
    Abstract: An integrated circuit package system includes providing an integrated circuit die; attaching the integrated circuit die over a lead grid having lead blocks; and connecting a die interconnect to the integrated circuit die and the lead blocks.
    Type: Application
    Filed: September 27, 2007
    Publication date: April 2, 2009
    Inventors: Jairus Legaspi Pisigan, Jeffrey D. Punzalan, Lionel Chien Hui Tay, Zigmund Ramirez Camacho
  • Publication number: 20090085181
    Abstract: An integrated circuit package system includes providing die; forming leads adjacent the die; forming a die paddle adjacent the leads with the die thereover; and forming a cavity for isolating one of the die and a die attach segment of the die paddle.
    Type: Application
    Filed: September 28, 2007
    Publication date: April 2, 2009
    Inventors: Abelardo Hadap Advincula, JR., Zigmund Ramirez Camacho, Henry Descalzo Bathan, Jairus Legaspi Pisigan
  • Publication number: 20090085178
    Abstract: An integrated circuit packaging system including: forming a base structure, having an opening; mounting a base structure device in the opening; attaching an integrated circuit device over the base structure device; and molding an encapsulant on the base structure, the base structure device, and the integrated circuit device.
    Type: Application
    Filed: September 28, 2007
    Publication date: April 2, 2009
    Inventors: Jong-Woo Ha, Koo Hong Lee, Soo Won Lee, JuHyun Park, Zigmund Ramirez Camacho, Jeffrey D. Punzalan, Lionel Chien Hui Tay, Jairus Legaspi Pisigan
  • Publication number: 20090072364
    Abstract: An integrated circuit package system is provided including forming a leadframe having a frame and a die paddle having leads thereon. The leads are held with respect to the die paddle. The leads are separated from the die paddle, and a die is attached to the die paddle. Bond wires are bonded between the leads and the die. The die and bond wires are encapsulated. The leadframe is singulated to separate the frame and the die paddle.
    Type: Application
    Filed: September 13, 2007
    Publication date: March 19, 2009
    Inventors: Jeffrey D. Punzalan, Jairus Legaspi Pisigan, Lionel Chien Hui Tay, Zigmund Ramirez Camacho
  • Publication number: 20090072412
    Abstract: An integrated circuit package system includes: forming an external interconnect; connecting an integrated circuit die and the external interconnect; forming a package encapsulation, having a recess, covering the integrated circuit die with a portion of the external interconnect exposed by the recess; and connecting an integrated circuit device and the external interconnect in the recess.
    Type: Application
    Filed: September 13, 2007
    Publication date: March 19, 2009
    Inventors: Zigmund Ramirez Camacho, Jeffrey D. Punzalan, Jairus Legaspi Pisigan, Abelardo Jr Advincula
  • Publication number: 20090008761
    Abstract: An integrated circuit package system includes: forming a flex bump over an integrated circuit device structure, the flex bump having both a base portion and an offset portion over the base portion; forming a first ball bond of a first internal interconnect over the offset portion; and encapsulating the integrated circuit device structure, the flex bump, and the first internal interconnect.
    Type: Application
    Filed: July 5, 2007
    Publication date: January 8, 2009
    Inventors: Jairus Legaspi Pisigan, Henry Descalzo Bathan, Arnel Trasporto, Jeffrey D. Punzalan
  • Publication number: 20080315380
    Abstract: An integrated circuit package system comprising: forming a paddle having a hole and an external interconnect; mounting an integrated circuit device having an active side to the paddle with the active side facing the paddle and the hole; connecting a first internal interconnect between the active side and the external interconnect through the hole; and encapsulating the integrated circuit device, the paddle, the first internal interconnect, and the external interconnect with the external interconnect partially exposed.
    Type: Application
    Filed: June 21, 2007
    Publication date: December 25, 2008
    Inventors: Lionel Chien Hui Tay, Zigmund Ramirez Camacho, Jairus Legaspi Pisigan