Patents by Inventor James Busby
James Busby has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180365946Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include a multi-layer stack having multiple discrete component layers stacked and electrically connected together via a plurality of electrical contacts in between the component layers. Further, the tamper-respondent assembly includes a tamper-respondent electronic circuit structure embedded within the multi-layer stack. The tamper-respondent electronic circuit structure includes at least one tamper-respondent sensor embedded, at least in part, within at least one component layer of the multiple discrete component layers of the multi-layer stack. The tamper-respondent electronic circuit structure defines a secure volume within the multi-layer stack. For instance, the tamper-respondent electronic circuit structure may be fully embedded within the multi-layer stack, with monitor circuitry of the tamper-respondent electronic circuit structure residing within the secure volume within the multi-layer stack.Type: ApplicationFiled: July 30, 2018Publication date: December 20, 2018Inventors: James A. BUSBY, Phillip Duane ISAACS, William SANTIAGO-FERNANDEZ
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Publication number: 20180358311Abstract: Tamper-proof electronic packages and fabrication methods are provided which include a glass substrate. The glass substrate is stressed glass with a compressively-stressed surface layer. Further, one or more electronic components are secured to the glass substrate within a secure volume of the tamper-proof electronic package. In operation, the glass substrate is configured to fragment with an attempted intrusion event into the electronic package, and the fragmenting of the glass substrate also fragments the electronic component(s) secured to the glass substrate, thereby destroying the electronic component(s). In certain implementations, the glass substrate has undergone ion-exchange processing to provide the stressed glass.Type: ApplicationFiled: July 26, 2018Publication date: December 13, 2018Inventors: James A. BUSBY, Silvio DRAGONE, Michael A. GAYNES, Kenneth P. RODBELL, William SANTIAGO-FERNANDEZ
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Publication number: 20180350757Abstract: Tamper-proof electronic packages and fabrication methods are provided which include a glass substrate. The glass substrate is stressed glass with a compressively-stressed surface layer. Further, one or more electronic components are secured to the glass substrate within a secure volume of the tamper-proof electronic package. In operation, the glass substrate is configured to fragment with an attempted intrusion event into the electronic package, and the fragmenting of the glass substrate also fragments the electronic component(s) secured to the glass substrate, thereby destroying the electronic component(s). In certain implementations, the glass substrate has undergone ion-exchange processing to provide the stressed glass.Type: ApplicationFiled: July 26, 2018Publication date: December 6, 2018Inventors: James A. BUSBY, Silvio DRAGONE, Michael A. GAYNES, Kenneth P. RODBELL, William SANTIAGO-FERNANDEZ
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Patent number: 10143090Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include a tamper-respondent electronic circuit structure. The tamper-respondent electronic circuit structure includes, for instance, a tamper-respondent sensor having at least one flexible layer and paired conductive lines disposed on the at least one flexible layer. The paired conductive lines form, at least in part, at least one tamper-detect network of the tamper-respondent sensor. The tamper-respondent electronic circuit structure further includes monitor circuitry electrically connected to the paired conductive lines to differentially monitor the paired conductive lines for a tamper event. In enhanced embodiments, multiple interconnect vias electrically connect to two or more layers of paired conductive lines and are disposed in an unfolded interconnect area of the tamper-respondent sensor when the sensor is operatively positioned about an electronic component or assembly to be protected.Type: GrantFiled: October 19, 2015Date of Patent: November 27, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: William L. Brodsky, James A. Busby, Edward N. Cohen, Phillip Duane Isaacs
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Patent number: 10136519Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include a tamper-respondent electronic circuit structure. The tamper-respondent electronic circuit structure includes, for instance, a tamper-respondent sensor having at least one flexible layer and paired conductive lines disposed on the at least one flexible layer. The paired conductive lines form, at least in part, at least one tamper-detect network of the tamper-respondent sensor. The tamper-respondent electronic circuit structure further includes monitor circuitry electrically connected to the paired conductive lines to differentially monitor the paired conductive lines for a tamper event. In enhanced embodiments, multiple interconnect vias electrically connect to two or more layers of paired conductive lines and are disposed in an unfolded interconnect area of the tamper-respondent sensor when the sensor is operatively positioned about an electronic component or assembly to be protected.Type: GrantFiled: June 20, 2016Date of Patent: November 20, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: William L. Brodsky, James A. Busby, Edward N. Cohen, Phillip Duane Isaacs
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Patent number: 10115275Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include a multi-layer stack having multiple discrete component layers stacked and electrically connected together via a plurality of electrical contacts in between the component layers. Further, the tamper-respondent assembly includes a tamper-respondent electronic circuit structure embedded within the multi-layer stack. The tamper-respondent electronic circuit structure includes at least one tamper-respondent sensor embedded, at least in part, within at least one component layer of the multiple discrete component layers of the multi-layer stack. The tamper-respondent electronic circuit structure defines a secure volume within the multi-layer stack. For instance, the tamper-respondent electronic circuit structure may be fully embedded within the multi-layer stack, with monitor circuitry of the tamper-respondent electronic circuit structure residing within the secure volume within the multi-layer stack.Type: GrantFiled: October 24, 2017Date of Patent: October 30, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: James A. Busby, Phillip Duane Isaacs, William Santiago-Fernandez
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Publication number: 20180235081Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include an enclosure, an in-situ-formed tamper-detect sensor, and one or more flexible tamper-detect sensors. The enclosure encloses, at least in part, one or more electronic components to be protected, and the in-situ-formed tamper-detect sensor is formed in place over an inner surface of the enclosure. The flexible tamper-detect sensor(s) is disposed over the in-situ-formed tamper-detect sensor, such that the in-situ-formed tamper-detect sensor is between the inner surface of the enclosure and the flexible tamper-detect sensor(s). Together the in-situ-formed tamper-detect sensor and flexible tamper-detect sensor(s) facilitate defining, at least in part, a secure volume about the one or more electronic components.Type: ApplicationFiled: February 13, 2017Publication date: August 16, 2018Inventors: William L. BRODSKY, James A. BUSBY, John R. DANGLER, Silvio DRAGONE, Michael J. FISHER, David C. LONG
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Patent number: 9999124Abstract: Tamper-respondent assemblies with regions of increased susceptibility to a tamper event are provided, which include one or more tamper-detect sensors, one or more conductive traces, and an adhesive. The tamper-detect sensor(s) facilitates defining a secure volume about one or more electronic components to be protected, and the conductive trace(s) forms, at least in part, a tamper-detect network of the tamper-respondent assembly. The conductive trace(s) is disposed, at least in part, on the tamper-detect sensor(s). The adhesive contacts the conductive trace(s) on the tamper-detect sensor(s), and is disposed, at least in part, between and couples a surface of the tamper-detect sensor(s) to another surface of the assembly. Together, the tamper-detect sensor(s), conductive trace(s), and adhesive are a subassembly, with the subassembly being configured with multiple regions of increased susceptibility to breaking of the conductive trace(s) with a tamper event through the subassembly.Type: GrantFiled: November 2, 2016Date of Patent: June 12, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: James A. Busby, Michael J. Fisher, Michael A. Gaynes, David C. Long, Thomas Weiss
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Publication number: 20180124915Abstract: Tamper-respondent assemblies with regions of increased susceptibility to a tamper event are provided, which include one or more tamper-detect sensors, one or more conductive traces, and an adhesive. The tamper-detect sensor(s) facilitates defining a secure volume about one or more electronic components to be protected, and the conductive trace(s) forms, at least in part, a tamper-detect network of the tamper-respondent assembly. The conductive trace(s) is disposed, at least in part, on the tamper-detect sensor(s). The adhesive contacts the conductive trace(s) on the tamper-detect sensor(s), and is disposed, at least in part, between and couples a surface of the tamper-detect sensor(s) to another surface of the assembly. Together, the tamper-detect sensor(s), conductive trace(s), and adhesive are a subassembly, with the subassembly being configured with multiple regions of increased susceptibility to breaking of the conductive trace(s) with a tamper event through the subassembly.Type: ApplicationFiled: November 2, 2016Publication date: May 3, 2018Inventors: James A. BUSBY, Michael J. FISHER, Michael A. GAYNES, David C. LONG, Thomas WEISS
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Publication number: 20180108229Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include at least one tamper-respondent sensor and a detector. The at least one tamper-respondent sensor includes conductive lines which form, at least in part, at least one tamper-detect network of the tamper-respondent sensor(s). The detector monitors the tamper-respondent sensor(s) by applying an electrical signal to the conductive lines of the at least one tamper-respondent sensor to monitor over time for a non-linear conductivity change indicative of a tamper event at the tamper-respondent sensor(s). For instance, the detector may monitor a second harmonic of the electrical signal applied to the conductive lines for the non-linear conductivity change indicative of the tamper event, such as an attempted shunt of one or more conductive lines of the tamper-respondent sensor(s).Type: ApplicationFiled: November 22, 2017Publication date: April 19, 2018Inventors: James A. BUSBY, Phillip Duane ISAACS
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Publication number: 20180103538Abstract: Methods of fabricating tamper-respondent assemblies with bond protection are provided which include at least one tamper-respondent sensor having unexposed circuit lines forming, at least in part, one or more tamper-detect network(s), and the tamper-respondent sensor having at least one external bond region. The tamper-respondent assembly further includes at least one conductive trace and an adhesive. The conductive trace(s) forms, at least in part, the one or more tamper-detect network(s), and is exposed, at least in part, on the tamper-respondent sensor(s) within the external bond region(s). The adhesive contacts the conductive trace(s) within the external bond region(s) of the tamper-respondent sensor(s), and the adhesive, in part, facilitates securing the at least one tamper-respondent sensor within the tamper-respondent assembly.Type: ApplicationFiled: December 8, 2017Publication date: April 12, 2018Inventors: William L. Brodsky, James A. Busby, Zachary T. Dreiss, Michael J. Fisher, David C. Long, William Santiago-Fernandez, Thomas Weiss
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Publication number: 20180103537Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include at least one tamper-respondent sensor having unexposed circuit lines forming, at least in part, one or more tamper-detect network(s), and the tamper-respondent sensor having at least one external bond region. The tamper-respondent assembly further includes at least one conductive trace and an adhesive. The conductive trace(s) forms, at least in part, the one or more tamper-detect network(s), and is exposed, at least in part, on the tamper-respondent sensor(s) within the external bond region(s). The adhesive contacts the conductive trace(s) within the external bond region(s) of the tamper-respondent sensor(s), and the adhesive, in part, facilitates securing the at least one tamper-respondent sensor within the tamper-respondent assembly. In enhanced embodiments, the conductive trace(s) is a chemically compromisable conductor susceptible to damage during a chemical attack on the adhesive within the external bond region(s).Type: ApplicationFiled: December 8, 2017Publication date: April 12, 2018Inventors: William L. BRODSKY, James A. BUSBY, Zachary T. DREISS, Michael J. FISHER, David C. LONG, William SANTIAGO-FERNANDEZ, Thomas WEISS
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Publication number: 20180102329Abstract: Tamper-proof electronic packages and fabrication methods are provided which include a glass substrate. The glass substrate is stressed glass with a compressively-stressed surface layer. Further, one or more electronic components are secured to the glass substrate within a secure volume of the tamper-proof electronic package. In operation, the glass substrate is configured to fragment with an attempted intrusion event into the electronic package, and the fragmenting of the glass substrate also fragments the electronic component(s) secured to the glass substrate, thereby destroying the electronic component(s). In certain implementations, the glass substrate has undergone ion-exchange processing to provide the stressed glass.Type: ApplicationFiled: December 5, 2017Publication date: April 12, 2018Inventors: James A. BUSBY, Silvio DRAGONE, Michael A. GAYNES, Kenneth P. RODBELL, William SANTIAGO-FERNANDEZ
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Publication number: 20180098423Abstract: Tamper-respondent assemblies and fabrication methods are provided which incorporate enclosure to circuit board protection. The tamper-respondent assemblies include a circuit board, and an electronic enclosure mounted to the circuit board and facilitating enclosing at least one electronic component within a secure volume. A tamper-respondent electronic circuit structure facilitates defining the secure volume, and the tamper-respondent electronic circuit structure includes a tamper-respondent circuit. An adhesive is provided to secure, in part, the electronic enclosure to the circuit board. The adhesive contacts, at least in part, the tamper-respondent circuit so that an attempted separation of the electronic enclosure from the circuit board causes the adhesive to break the tamper-respondent circuit, facilitating detection of the separation by a monitor circuit of the tamper-respondent electronic circuit structure.Type: ApplicationFiled: November 30, 2017Publication date: April 5, 2018Inventors: William L. Brodsky, James A. Busby, Edward N. Cohen, Silvio Dragone, Michael J. Fisher, David C. Long, Michael T. Peets, William Santiago-Fernandez, Thomas Weiss
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Publication number: 20180098424Abstract: Tamper-proof electronic packages and fabrication methods are provided which include a glass enclosure enclosing, at least in part, at least one electronic component within a secure volume, and a tamper-respondent detector. The glass enclosure includes stressed glass with a compressively-stressed surface layer, and the tamper-respondent detector monitors, at least in part, the stressed glass to facilitate defining the secure volume. The stressed glass fragments with an attempted intrusion event through the stressed glass, and the tamper-respondent detector detects the fragmenting of the stressed glass. In certain embodiments, the stressed glass may be a machined glass enclosure that has undergone ion-exchange processing, and the compressively-stressed surface layer of the stressed glass may be compressively-stressed to ensure that the stressed glass fragments into glass particles of fragmentation size less than 1000 ?m with the intrusion event.Type: ApplicationFiled: December 5, 2017Publication date: April 5, 2018Inventors: James A. BUSBY, Silvio DRAGONE, Michael J. FISHER, Michael A. GAYNES, David C. LONG, Kenneth P. RODBELL, William SANTIAGO-FERNANDEZ, Thomas WEISS
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Patent number: 9936573Abstract: Methods of fabricating tamper-respondent assemblies are provided which include a tamper-respondent electronic circuit structure. The tamper-respondent electronic circuit structure includes a tamper-respondent sensor. The tamper-respondent sensor includes, for instance, at least one flexible layer having opposite first and second sides, and circuit lines forming at least one resistive network. The circuit lines are disposed on at least one of the first or second side of the at least one flexible layer, and have a line width Wl?200 ?m, as well as a line-to-line spacing width Ws?200 ?m. In certain enhanced embodiments, the tamper-respondent sensor includes multiple flexible layers, with a first flexible layer having first circuit lines, and a second flexible layer having second circuit lines, where the first and second circuit lines may have different line widths, different line-to-line spacings, and/or be formed of different materials.Type: GrantFiled: November 16, 2015Date of Patent: April 3, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: William L. Brodsky, James A. Busby, Phillip Duane Isaacs, David C. Long
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Patent number: 9924591Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include a tamper-respondent electronic circuit structure. The tamper-respondent electronic circuit structure includes a tamper-respondent sensor. The tamper-respondent sensor includes, for instance, at least one flexible layer having opposite first and second sides, and circuit lines forming at least one resistive network. The circuit lines are disposed on at least one of the first or second side of the at least one flexible layer, and have a line width Wl?200 ?m, as well as a line-to-line spacing width Ws?200 ?m. In certain enhanced embodiments, the tamper-respondent sensor includes multiple flexible layers, with a first flexible layer having first circuit lines, and a second flexible layer having second circuit lines, where the first and second circuit lines may have different line widths, different line-to-line spacings, and/or be formed of different materials.Type: GrantFiled: September 25, 2015Date of Patent: March 20, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: William L. Brodsky, James A. Busby, Phillip Duane Isaacs, David C. Long
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Patent number: 9916744Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include a multi-layer stack having multiple discrete component layers stacked and electrically connected together via a plurality of electrical contacts in between the component layers. Further, the tamper-respondent assembly includes a tamper-respondent electronic circuit structure embedded within the multi-layer stack. The tamper-respondent electronic circuit structure includes at least one tamper-respondent sensor embedded, at least in part, within at least one component layer of the multiple discrete component layers of the multi-layer stack. The tamper-respondent electronic circuit structure defines a secure volume within the multi-layer stack. For instance, the tamper-respondent electronic circuit structure may be fully embedded within the multi-layer stack, with monitor circuitry of the tamper-respondent electronic circuit structure residing within the secure volume within the multi-layer stack.Type: GrantFiled: February 25, 2016Date of Patent: March 13, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: James A. Busby, Phillip Duane Isaacs, William Santiago-Fernandez
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Publication number: 20180070444Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include a tamper-respondent electronic circuit structure. The tamper-respondent electronic circuit structure includes a tamper-respondent sensor. The tamper-respondent sensor includes, for instance, at least one flexible layer having opposite first and second sides, and circuit lines forming at least one resistive network. The circuit lines are disposed on at least one of the first or second side of the at least one flexible layer, and have a line width Wl?200 ?m, as well as a line-to-line spacing width Ws?200 ?m. In certain enhanced embodiments, the tamper-respondent sensor includes multiple flexible layers, with a first flexible layer having first circuit lines, and a second flexible layer having second circuit lines, where the first and second circuit lines may have different line widths, different line-to-line spacings, and/or be formed of different materials.Type: ApplicationFiled: November 1, 2017Publication date: March 8, 2018Inventors: William L. BRODSKY, James A. BUSBY, Phillip Duane ISAACS, David C. LONG
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Patent number: 9913362Abstract: Methods of fabricating tamper-respondent assemblies with bond protection are provided which include at least one tamper-respondent sensor having unexposed circuit lines forming, at least in part, one or more tamper-detect network(s), and the tamper-respondent sensor having at least one external bond region. The tamper-respondent assembly further includes at least one conductive trace and an adhesive. The conductive trace(s) forms, at least in part, the one or more tamper-detect network(s), and is exposed, at least in part, on the tamper-respondent sensor(s) within the external bond region(s). The adhesive contacts the conductive trace(s) within the external bond region(s) of the tamper-respondent sensor(s), and the adhesive, in part, facilitates securing the at least one tamper-respondent sensor within the tamper-respondent assembly.Type: GrantFiled: November 16, 2015Date of Patent: March 6, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: William L. Brodsky, James A. Busby, Zachary T. Dreiss, Michael J. Fisher, David C. Long, William Santiago-Fernandez, Thomas Weiss