Abstract: A radar device is provided that includes a timing control component operable to generate, for each chirp of a sequence of chirps according to a set of chirp configuration parameters and a chirp profile for the chirp, chirp control signals to cause the radar device to transmit the chirp, the timing control component having chirp configuration parameter inputs, chirp profile parameter inputs, a chirp address output, and chirp control signal outputs, a chirp configuration storage component having chirp configuration parameter outputs coupled to corresponding inputs of the configuration parameter inputs of the timing control component, a chirp profile address output, and a chirp address input coupled to the chirp address output, and a chirp profile storage component having chirp profile parameter outputs coupled to the chirp profile parameter inputs of the timing control component; and a chirp profile address input coupled to the chirp profile address output.

Abstract: A cascaded radar system is provided that includes a first radar system-on-a-chip (SOC) operable to perform an initial portion of signal processing for object detection on digital beat signals generated by multiple receive channels of the radar SOC, a second radar SOC operable to perform the initial portion of signal processing for object detection on digital beat signals generated by multiple receive channels in the radar SOC, and a processing unit coupled to the first radar SOC and the second radar SOC to receive results of the initial portion of signal processing from each radar SOC, the processing unit operable to perform a remaining portion of the signal processing for object detection using these results.

Abstract: A GNSS receiver includes at least one buffer and at least one correlator block. The at least one buffer stores a plurality of samples corresponding to a received signal. The at least one correlator block includes a Doppler derotation block configured to perform Doppler derotation corresponding to at least one Doppler frequency on the plurality of samples, a register array configured to be loaded with the plurality of samples on Doppler derotation corresponding to a Doppler frequency of the at least one Doppler frequency, and a correlator engine configured to generate correlation results by correlating the plurality of samples in the register array with a plurality of code phases for at least one GNSS satellite. A presence of at least one GNSS satellite signal may be detected based on coherent accumulation and a non-coherent accumulation of the correlation results.

Abstract: Several methods and circuits configured to mitigate signal interference of at least one aggressor circuit operable on a first clock signal within an interfering frequency range of at least one victim circuit in an IC are disclosed. In an embodiment, a signal interference mitigation circuit is configured to be associated with the aggressor circuit and includes a clock divider circuit and a control circuit. The clock divider circuit is configured to generate the first clock signal based on a second clock signal and a division factor pattern. The control circuit is coupled with the clock divider circuit and configured to determine the division factor pattern and provide the division factor pattern to the clock divider circuit. The division factor pattern comprises a plurality of division factors selected randomly based on a plurality of random numbers, and is configured to control a throughput frequency associated with the signal interference mitigation circuit.

Abstract: Several methods and circuits configured to mitigate signal interference of at least one aggressor circuit operable on a first clock signal within an interfering frequency range of at least one victim circuit in an IC are disclosed. In an embodiment, a signal interference mitigation circuit is configured to be associated with the aggressor circuit and includes a clock divider circuit and a control circuit. The clock divider circuit is configured to generate the first clock signal based on a second clock signal and a division factor pattern. The control circuit is coupled with the clock divider circuit and configured to determine the division factor pattern and provide the division factor pattern to the clock divider circuit. The division factor pattern comprises a plurality of division factors selected randomly based on a plurality of random numbers, and is configured to control a throughput frequency associated with the signal interference mitigation circuit.

Abstract: A clock generation circuit in an IC is provided for mitigating signal interferences caused by an aggressor block operable on a first clock signal with a frequency range of a victim block. The clock generation circuit includes a gating circuit configured to perform gating of a second clock signal to generate a third clock signal based on control signal. An average frequency of the third clock signal is substantially matched to a frequency of the first clock signal, and harmonics of the third clock signal do not interfere with the frequency range of the victim block. The clock generation circuit further includes a FIFO buffer circuit configured to receive the first clock signal as a write clock and the third clock signal as read clock, and a control circuit for generating the control signal based on an occupancy level of FIFO buffer circuit and a plurality of random numbers.

Abstract: A GNSS receiver configured to detect a presence of at least one GNSS satellite signal in a received signal is provided. The GNSS receiver includes a buffer loaded with sample sets corresponding to the received signal and a Doppler derotation block configured to perform a Doppler derotation corresponding to at least one Doppler frequency on a sample set received from the buffer. The GNSS receiver further includes an accumulator block configured to perform a coherent accumulation of a plurality of sample sets upon or subsequent to the Doppler derotation corresponding to a Doppler frequency, and, a first memory configured to store the results of the coherent accumulation. A register array is configured to be loaded with the results stored in the first memory and a correlator engine is configured to generate correlation results by correlating the results in the register array with a plurality of code phases of GNSS satellites.

Abstract: A GNSS receiver includes at least one buffer and at least one correlator block. The at least one buffer stores a plurality of samples corresponding to a received signal. The at least one correlator block includes a Doppler derotation block configured to perform Doppler derotation corresponding to at least one Doppler frequency on the plurality of samples, a register array configured to be loaded with the plurality of samples on Doppler derotation corresponding to a Doppler frequency of the at least one Doppler frequency, and a correlator engine configured to generate correlation results by correlating the plurality of samples in the register array with a plurality of code phases for at least one GNSS satellite. A presence of at least one GNSS satellite signal may be detected based on coherent accumulation and a non-coherent accumulation of the correlation results.

Abstract: According to an aspect of the present invention, each correlation block in a Global Navigation Satellite System (GNSS) receiver is designed to examine a certain number of consecutive samples of an input signal and a buffer is designed to store more than such number of samples. Due to such storing, each correlator may perform multiple correlations for the same set of received samples. According to another aspect, such searches may be performed without rotating a local code by controlling the specific samples provided as window samples. Thus, while performing Doppler searches, different frequencies can be searched using the same local code without rotation. While performing code phase searches, the window samples may start from different positions with the position determining the specific phase being searched.

Abstract: A Global Navigation Satellite System (GNSS) receiver provided according to an aspect of the present invention contains a buffer to store less than a number of samples spanning a code period of a received GNSS signal, with the samples being used by a correlator and a processor to perform various searches in the receiver. Due to the use of such smaller memory space in the buffer, the overall size of receivers may be reduced. According to another aspect of the present invention, the amount of storage provided for storing local code and carrier samples (used during correlation) is also reduced by dynamically generating the local code and carrier sample as required for generating partial correlation results.

Abstract: According to an aspect of the present invention, each correlation block in a Global Navigation Satellite System (GNSS) receiver is designed to examine a certain number of consecutive samples of an input signal and a buffer is designed to store more than such number of samples. Due to such storing, each correlator may perform multiple correlations for the same set of received samples. According to another aspect, such searches may be performed without rotating a local code by controlling the specific samples provided as window samples. Thus, while performing Doppler searches, different frequencies can be searched using the same local code without rotation. While performing code phase searches, the window samples may start from different positions with the position determining the specific phase being searched.

Abstract: A Global Navigation Satellite System (GNSS) receiver provided according to an aspect of the present invention contains a buffer to store less than a number of samples spanning a code period of a received GNSS signal, with the samples being used by a correlator and a processor to perform various searches in the receiver. Due to the use of such smaller memory space in the buffer, the overall size of receivers may be reduced. According to another aspect of the present invention, the amount of storage provided for storing local code and carrier samples (used during correlation) is also reduced by dynamically generating the local code and carrier sample as required for generating partial correlation results.