Abstract: A plasma processing apparatus includes a chamber including a space for processing a substrate, a substrate stage supporting the substrate within the chamber and including a lower electrode, an upper electrode within the chamber facing the lower electrode, a first power supply including a sinusoidal wave power source configured to apply a sinusoidal wave power to the lower electrode to form plasma within the chamber, and a second power supply configured to apply a nonsinusoidal wave power to the upper electrode to generate an electron beam.

Abstract: Provided is a method of fabricating a semiconductor device. The method includes forming an oxide film on a target layer, forming a first mask film on the oxide film, wherein the first mask film contains a semiconductor material and has a first thickness and a first etch selectivity with respect to the oxide film, forming a second mask film on the first mask film, wherein the second mask film contains a metal and has a second thickness smaller than the first thickness and a second etch selectivity larger than the first etch selectivity with respect to the oxide film, forming a second mask film pattern by patterning the second mask film, forming a first mask film pattern by patterning the first mask film, etching some portions of the oxide film by using the second mask film pattern as an etch mask film, and etching the rest of the oxide film by using the first mask film pattern as an etch mask film to form a hole, wherein the target layer is exposed via the hole.

Abstract: A method of fabricating a semiconductor device is disclosed. The method may include forming an target layer on a substrate, forming a mask pattern on a target layer, performing a first process to etch the target layer and form a first sub-trench, and performing a second process to further etch the target layer and form a second sub-trench. First and second sidewall patterns may be formed on a sidewall of the mask pattern to be used as an etch mask in the first and second processes, respectively. Outer sidewalls of the first and second sidewall patterns may be formed to have different angles with respect to a top surface of the substrate.

Abstract: A method for fabricating a semiconductor device is disclosed.

Abstract: Semiconductor devices are provided. Each of the semiconductor devices may include a plurality of electrodes. Moreover, each of the semiconductor devices may include a supporting pattern connected to sidewalls of the plurality of electrodes. Related methods of forming semiconductor devices are also provided. For example, the methods may include forming the supporting pattern before forming the plurality of electrodes.

Abstract: A patterning method using a metal mask includes sequentially forming a lower metal layer and an upper metal layer on an etching object layer, forming an upper metal mask, forming the upper metal mask including patterning the upper metal layer, forming a lower metal mask, forming the lower metal mask including patterning the lower metal layer using the upper metal mask, and patterning the etching object layer using the upper metal mask.

Abstract: A method for fabricating a semiconductor device is disclosed.

Abstract: A method for forming a vertical pattern includes forming a tungsten layer on a lower layer and performing a cyclic process including an etch process and an oxidation process on the tungsten layer to form a vertical pattern. Performing the cyclic process includes oxidizing the tungsten layer by an oxidation process using oxygen plasma to form a tungsten oxide layer and selectively etching the tungsten oxide layer by an etch process using a chlorine-based gas.

Abstract: A method of manufacturing a semiconductor device, the method including forming an insulating layer on a substrate; forming a metallic hardmask pattern on the insulating layer; forming a recess by partially etching the insulating layer; forming a metallic protection layer on an inner side wall of the recess; etching the insulating layer to form a hole that penetrates the insulating layer by using the metallic hardmask pattern and the metallic protection layer as etching masks; and removing the metallic hardmask pattern and the metallic protection layer.

Abstract: A method of fabricating a semiconductor device is disclosed. The method may include forming an target layer on a substrate, forming a mask pattern on a target layer, performing a first process to etch the target layer and form a first sub-trench, and performing a second process to further etch the target layer and form a second sub-trench. First and second sidewall patterns may be formed on a sidewall of the mask pattern to be used as an etch mask in the first and second processes, respectively. Outer sidewalls of the first and second sidewall patterns may be formed to have different angles with respect to a top surface of the substrate.

Abstract: Semiconductor devices are provided. Each of the semiconductor devices may include a plurality of electrodes. Moreover, each of the semiconductor devices may include a supporting pattern connected to sidewalls of the plurality of electrodes. Related methods of forming semiconductor devices are also provided. For example, the methods may include forming the supporting pattern before forming the plurality of electrodes.

Abstract: Semiconductor devices are provided. Each of the semiconductor devices may include a plurality of electrodes. Moreover, each of the semiconductor devices may include a supporting pattern connected to sidewalls of the plurality of electrodes. Related methods of forming semiconductor devices are also provided. For example, the methods may include forming the supporting pattern before forming the plurality of electrodes.

Abstract: A patterning method using a metal mask includes sequentially forming a lower metal layer and an upper metal layer on an etching object layer, forming an upper metal mask, forming the upper metal mask including patterning the upper metal layer, forming a lower metal mask, forming the lower metal mask including patterning the lower metal layer using the upper metal mask, and patterning the etching object layer using the upper metal mask.

Abstract: A method of fabricating a semiconductor device includes providing a substrate that is divided into a first region on which a pattern layer is formed and a second region on which a photo key is formed. A silicon layer is formed on the first region and second region of the substrate. The silicon layer is patterned to form a hole exposing a photo key portion of the second region on which the photo key is formed. A buried oxide layer is formed to fill the hole exposing the photo key portion. The silicon layer is patterned by using the photo key formed under the buried oxide layer to form a silicon pattern layer.

Abstract: In a method of removing a hard mask, a hard mask is formed on a substrate. A first plasma treatment is performed on the hard mask at a first temperature. A second plasma treatment is performed on the hard mask at a second temperature higher than the first temperature.

Abstract: A method of fabricating a semiconductor device is provided. The method may include forming an interlayer insulating layer on a structure with a cell region and a peripheral circuit region, forming a first mask layer on the interlayer insulating layer, forming trenches in the first mask layer exposing the interlayer insulating layer by patterning the first mask layer on the peripheral circuit region, and forming key mask patterns in the trenches. An etch selectivity of the first mask patterns with respect to the interlayer insulating layer may be greater than that of the key mask patterns with respect to the interlayer insulating layer.

Abstract: A bowing control pattern is formed on an intermediate layer. A hardmask pattern is formed on the bowing control layer. The hardmask pattern has a first opening, and the bowing control pattern has a second opening. A third opening passes through the intermediate layer and is connected to the second opening. The bowing control pattern includes first and second edges on a lower end of the second opening, and a third edge on an upper end of the second opening. When a first point on the first edge, a second point on the second edge, and a third point on a horizontal line passing through the third edge are defined, an intersecting angle between a first side from the first point to the second point, and a second side from the second point to the third point is from about 50° to about 80°.

Abstract: A method of fabricating a semiconductor device is provided. The method may include forming an interlayered insulating layer on a structure with a cell region and a peripheral circuit region, forming a first mask layer on the interlayered insulating layer, forming trenches in the first mask layer exposing the interlayered insulating layer by patterning the first mask layer on the peripheral circuit region, and forming key mask patterns in the trenches. An etch selectivity of the first mask patterns with respect to the interlayered insulating layer may be greater than that of the key mask patterns with respect to the interlayered insulating layer.

Abstract: A method of fabricating a semiconductor device with capacitors may include forming a mold structure on a lower structure, patterning the mold structure to form a plurality of holes exposing the lower structure, forming a protection layer on sidewalls of the mold structure exposed by the holes, forming lower electrodes in the holes provided with the protection layer, removing the mold structure to expose the protection layer, removing the protection layer to expose sidewalls of the lower electrodes, and sequentially forming a dielectric film and an upper electrode on the lower electrodes.

Abstract: A bowing control pattern is formed on an intermediate layer. A hardmask pattern is formed on the bowing control layer. The hardmask pattern has a first opening, and the bowing control pattern has a second opening. A third opening passes through the intermediate layer and is connected to the second opening. The bowing control pattern includes first and second edges on a lower end of the second opening, and a third edge on an upper end of the second opening. When a first point on the first edge, a second point on the second edge, and a third point on a horizontal line passing through the third edge are defined, an intersecting angle between a first side from the first point to the second point, and a second side from the second point to the third point is from about 50° to about 80°.