Abstract: Disclosed herein are a method, apparatus, system, and computer-readable recording medium for image compression. An encoding apparatus performs preprocessing of feature map information, frame packing, frame classification, and encoding. A decoding apparatus performs decoding, frame depacking, and postprocessing in order to reconstruct feature map information. By encoding the feature map information, inter-prediction and intra-block prediction for a frame are performed. The encoding apparatus provides the decoding apparatus with a feature map information bitstream for reconstructing the feature map information along with an image information bitstream.

Abstract: There are provided a method, apparatus, system, and computer-readable recording medium for image compression. An encoding apparatus performs domain transformation and quantization on feature map information and image information. The encoding apparatus rearranges the result of domain transformation and quantization so as to have a form advantageous to the encoding procedure and encodes the result of rearrangement, thereby generating a bitstream. A decoding apparatus receives the bitstream, decodes the received bitstream, and performs inverse transformation, dequantization, and inverse rearrangement using information transmitted through the bitstream. The result of inverse transformation, dequantization, and inverse rearrangement is used for the machine-learning task of a neural network.

Abstract: An apparatus for processing a substrate is provided. The apparatus comprises a processing chamber and a showerhead. The showerhead is in the processing chamber and has a plurality of first holes with a first size in a first zone of the showerhead and a plurality of second holes with a second hole size in a second zone of the showerhead. The first hole size is different from the second hole size. The first zone is surrounded by the second zone. An area of the first zone is larger than an area of the second zone.

Abstract: There are provided an apparatus, method, system, and recording medium for performing selective encoding/decoding on feature information. An encoding apparatus generates residual feature information. The encoding apparatus transmits the residual feature information to a decoding apparatus through a residual feature map bitstream. The residual feature information is the difference between feature information extracted from an original image and feature information extracted from a reconstructed image. Feature information of the reconstructed image is generated using the reconstructed image. Reconstructed feature information is generated using the feature information of the reconstructed image and reconstructed residual feature information.

Abstract: A hover touch controller device includes a touch sensor having a touch surface and a proximity sensor. The touch sensor provides two-dimensional position information on when and where a user's finger touches the touch surface. The proximity sensor provides three-dimensional position information on pre-touch events. The pre-touch events corresponding to the user's finger hovering over the touch surface within some maximum depth. The hover touch controller device further includes a processor. The processor determines from the three-dimensional information a hover point projected on the touch surface and determines from the two-dimensional information a touch point on the touch surface. The processor communicates the hover point and the contact point to a display device. This can include correcting for any perceived user interaction issues associated an offset between the hover point and the touch point.

Abstract: A semiconductor structure and a method of fabricating the same is disclosed. The structure comprises: a substrate having a device region; a contact plug arranged over the device region and enables electrical connection to a semiconductor device in the device region; a separation layer arranged above and exposing the contact plug; a cylindrical tubular metal feature arranged above the separation layer; and a dielectric layer laterally surrounding the cylindrical tubular conductive feature, having a substantially stepped dopant concentration distribution comprised of two distinct dopant species. The dopant concentration level decreases from a lower region nearest the separation layer toward an upper region farther from the separation layer. An inter-dopant ratio between the distinct dopant species increases from the lower region toward the upper region. The cylindrical tubular metal feature has a sidewall profile that is substantially perpendicular to a surface of the substrate.

Abstract: A display device includes a first conductive pattern on a substrate, a first insulating layer on the first conductive pattern, a semiconductor pattern on the first insulating layer, a second insulating layer on the first insulating layer and the semiconductor pattern, and a second conductive pattern on the second insulating layer. A first edge of the first conductive pattern faces a second edge of the second conductive pattern, the first conductive pattern does not overlap the second conductive pattern in an area where the first edge faces the second edge, the semiconductor pattern is in the area where the first edge faces the second edge, the second conductive pattern overlaps the second insulating layer, and the second insulating layer includes a third edge protruding from the second edge of the second conductive pattern.

Abstract: A semiconductor device is disclosed, which comprises a capacitor structure formed over a device region of a substrate, and a buffer layer. The capacitor structure comprises a lower electrode having a U-shaped profile that opens away from the substrate, the U-shaped profile defines an interior surface and an opposing exterior surface; a dielectric liner extending into the U-shaped profile and conformally covering the interior surface of the lower electrode; and an upper electrode formed over the dielectric liner, extending into and filling the U-shaped profile, the upper electrode) includes a top conductive layer. The buffer layer formed on the top conductive layer of the upper electrode, wherein the lattice constant of the buffer layer is greater than that of the top conductive layer.

Abstract: A semiconductor structure and a method of fabricating the same is disclosed. The structure comprises: a substrate having a device region; a contact plug arranged over the device region and enables electrical connection to a semiconductor device in the device region; a separation layer arranged above and exposing the contact plug; a cylindrical tubular metal feature arranged above the separation layer; and a dielectric layer laterally surrounding the cylindrical tubular conductive feature, having a substantially stepped dopant concentration distribution comprised of two distinct dopant species. The dopant concentration level decreases from a lower region nearest the separation layer toward an upper region farther from the separation layer. An inter-dopant ratio between the distinct dopant species increases from the lower region toward the upper region. The cylindrical tubular metal feature has a sidewall profile that is substantially perpendicular to a surface of the substrate.

Abstract: A method for inducing an activity of a user's autonomic nervous system is provided. The method includes steps of: (a) on condition that each of the user's reference heart rate information corresponding to each of active states of the user's autonomic nervous system is obtained, an inducing device, if a specific active state of the autonomic nervous system is selected by the user, acquiring first reference heart rate information of the user corresponding to the specific active state of the autonomic nervous system; and (b) the inducing device supporting a first vibration stimulus with a first period corresponding to the first reference heart rate information to be applied to the user, to thereby allow the user's real-time average cardiac interval to be synchronized with the first vibration stimulus.

Abstract: A display device includes a substrate; a semiconductor layer disposed on the substrate; a gate insulating film disposed on the semiconductor layer; a gate layer disposed on the gate insulating film and insulated from the semiconductor layer; an insulating film disposed on the semiconductor layer and the gate layer; and a metal layer disposed on the insulating film, wherein the semiconductor layer and the gate layer are electrically connected through the metal layer, and the semiconductor layer overlaps the gate layer in a plan view.

Abstract: An organic light emitting display device includes a substrate, a buffer layer, an active layer, a gate insulation layer, a protective insulating layer, a gate electrode, an insulating interlayer, source and drain electrodes, and a sub-pixel structure. The buffer layer is disposed on the substrate. The active layer is disposed on the buffer layer, and has a source region, a drain region, and a channel region. The gate insulation layer is disposed in the channel region on the active layer. The protective insulating layer is disposed on the buffer layer, the source and drain regions of the active layer, and the gate insulation layer. The gate electrode is disposed in the channel region on the protective insulating layer. The insulating interlayer is disposed on the gate electrode. The source and drain electrodes are disposed on the insulating interlayer.

Abstract: A display device includes a substrate which includes a display area and a non-display area, a transistor disposed in the display area, a pad disposed in the non-display area, and an insulating layer which is disposed on the transistor and defines an opening which overlaps the pad in a plan view. The pad includes a main layer, a first auxiliary layer on the main layer, and a second auxiliary layer on the first auxiliary layer, and the second auxiliary layer defines the opening.

Abstract: An organic light emitting display device includes a substrate, a buffer layer, an active layer, a gate insulation layer, a protective insulating layer, a gate electrode, an insulating interlayer, source and drain electrodes, and a sub-pixel structure. The buffer layer is disposed on the substrate. The active layer is disposed on the buffer layer, and has a source region, a drain region, and a channel region. The gate insulation layer is disposed in the channel region on the active layer. The protective insulating layer is disposed on the buffer layer, the source and drain regions of the active layer, and the gate insulation layer. The gate electrode is disposed in the channel region on the protective insulating layer. The insulating interlayer is disposed on the gate electrode. The source and drain electrodes are disposed on the insulating interlayer.

Abstract: A hover touch controller device includes a touch sensor having a touch surface and a proximity sensor. The touch sensor provides two-dimensional position information on when and where a user's finger touches the touch surface. The proximity sensor provides three-dimensional position information on pre-touch events. The pre-touch events corresponding to the user's finger hovering over the touch surface within some maximum depth. The hover touch controller device further includes a processor. The processor determines from the three-dimensional information a hover point projected on the touch surface and determines from the two-dimensional information a touch point on the touch surface. The processor communicates the hover point and the contact point to a display device. This can include correcting for any perceived user interaction issues associated an offset between the hover point and the touch point.

Abstract: A transistor panel includes a channel region including an oxide of a first metal, a source region and a drain region, each including the first metal, wherein the channel region is disposed between the source and drain regions, and wherein the channel region is connected to the source and drain regions, an insulation layer disposed on the channel region, an upper electrode disposed on the insulation layer, an interlayer insulation layer disposed on the upper electrode, the source region and the drain region, and a barrier layer including a first portion disposed between the interlayer insulation layer and each of the source and drain regions, wherein the first portion of the barrier layer contacts each of the source and drain regions. The upper electrode and the barrier layer each comprise a second metal.

Abstract: An apparatus for processing a substrate is provided. The apparatus comprises a processing chamber and a showerhead. The showerhead is in the processing chamber and has a plurality of first holes with a first size in a first zone of the showerhead and a plurality of second holes with a second hole size in a second zone of the showerhead. The first hole size is different from the second hole size. The first zone is surrounded by the second zone. An area of the first zone is larger than an area of the second zone.

Abstract: An apparatus for processing a substrate is provided. The apparatus comprises a processing chamber and a showerhead. The showerhead is in the processing chamber and has a plurality of first holes with a first size in a first zone of the showerhead, a plurality of second holes with a second hole size in a second zone of the showerhead, and a plurality of third holes with a third hole size in a third zone of the showerhead. The first hole size is different from the second hole size. The first zone is surrounded by the second zone. An area of the first zone is larger than an area of the second zone. The first hole size is different from the third hole size. The first zone is surrounded by the third zone, and an area of the first zone is larger than an area of the third zone.

Abstract: The instant disclosure includes a semiconductor processing chamber. The semiconductor processing chamber includes a lid, a body, and a gasket. The gasket has a sealing portion and at least one handle portion protruding from the sealing portion. The at least one handle portion is used for applying force to the gasket during replacement process.

Abstract: A semiconductor structure is disclosed. The semiconductor structure includes a base layer, an anti-reflection layer having a plurality of elements and in physical contact with the base layer, and a photoresist layer disposed on the anti-reflection layer. The anti-reflection layer has a refractive index (n) ranging between about 2.2 to about 5.0 and an extinction coefficient (k) ranging between about 2.0 to about 3.0. In this way, deformation during etching of the semiconductor structure cause by light reflection is prevented.