Abstract: A system and method for decoding command signals that includes a command decoder configured to generate internal control signals to perform an operation based on the command signals and an operating state. The same combination of command signals can request different commands depending on the operating state. A command is selected from a first set of operations according to the command signals when the memory system is in a first operating state and a command is selected from a second set of operations according to the command signals when the memory system is in a second operating state.

Abstract: Techniques are disclosed for reading operating parameters from programmable elements on memory devices to configure a memory system. More specifically, programmable elements, such as antifuses, located on a memory device are programmed during fabrication with measured operating parameters corresponding to the memory device. Operating parameters may include, for example, operating current values, operating voltages, or timing parameters. The memory device may be incorporated into a memory module that is incorporated into a system. Once the memory module is incorporated into a system, the programmable elements may be accessed such that the memory system can be configured to optimally operate in accordance with the operating parameters measured for each memory device in the system.

Abstract: Systems, memory modules and methods of configuring systems including memory modules are provided. The memory modules include device parameters specifically corresponding to memory devices of the memory module. The device parameters may be retrieved from a database, and the system may be configured in accordance with the device parameters retrieved from the database.

Abstract: Techniques are disclosed for reading operating parameters from programmable elements on memory devices to configure a memory system. More specifically, programmable elements, such as antifuses, located on a memory device are programmed during fabrication with measured operating parameters corresponding to the memory device. Operating parameters may include, for example, operating current values, or voltage and timing parameters. The memory device may be incorporated into a memory module that is incorporated into a system. Once the memory module is incorporated into a system, the programmable elements may be accessed such that the memory system can be configured to optimally operate in accordance with the operating parameters measured for each memory device in the system.

Abstract: Memory modules and methods for fabricating and implementing memory modules wherein unique device parameters corresponding to specific memory devices on the memory modules are accessed from a database such that the device parameters may be implemented to improve system performance. The device parameters may include sizes, speeds, operating voltages, or timing parameters of the memory modules. Memory modules comprising a number of volatile memory devices may be fabricated. Device parameters corresponding to the specific memory devices on the memory module may be stored in a database and accessed during fabrication or during implementation of the memory modules in a system. System performance may be optimized by implementing the unique device parameters corresponding to the specific memory devices on the memory modules.

Abstract: Embodiments of the present invention relate to configurable inputs and/or outputs for memory and memory stacking applications. More specifically, embodiments of the present invention include memory devices that include a die having a circuit configured for enablement by a particular signal, an input pin configured to receive the particular signal, and a path selector configured to selectively designate a signal path to the circuit from the input pin.

Abstract: Pass-through 3D interconnects and microelectronic dies and systems of stacked dies that include such interconnects to disable electrical connections are disclosed herein. In one embodiment, a system of stacked dies includes a first microelectronic die having a backside, an interconnect extending through the first die to the backside, an integrated circuit electrically coupled to the interconnect, and a first electrostatic discharge (ESD) device electrically isolated from the interconnect. A second microelectronic die has a front side coupled to the backside of the first die, a metal contact at the front side electrically coupled to the interconnect, and a second ESD device electrically coupled to the metal contact. In another embodiment, the first die further includes a substrate carrying the integrated circuit and the first ESD device, and the interconnect is positioned in the substrate to disable an electrical connection between the first ESD device and the interconnect.

Abstract: Methods of operating an apparatus allow a memory to generate a test mode signal to trigger a test, in response to the memory detecting a predetermined command from a system bus.

Abstract: Embodiments of the present invention relate to configurable inputs and/or outputs for memory and memory stacking applications. More specifically, embodiments of the present invention include memory devices that include a die having a circuit configured for enablement by a particular signal, an input pin configured to receive the particular signal, and a path selector configured to selectively designate a signal path to the circuit from the input pin.

Abstract: An apparatus and method couples memory devices in a memory module to a memory hub on the module such that signals traveling from the hub to the devices have approximately the same propagation time regardless of which device is involved. Specifically, the devices are arranged around the hub in pairs, with each pair of devices being oriented such that a functional group of signals for each device in the pair, such as the data bus signals, are positioned adjacent each other on a circuit board of the module. This allows for a data and control-address busses having approximately the same electrical characteristics to be routed between the hub and each of the devices. This physical arrangement of devices allows high speed operation of the module. In one example, the hub is located in the center of the module and eight devices, four pairs, are positioned around the hub.

Abstract: Techniques are disclosed for reading operating parameters from programmable elements on memory devices to configure a memory system. More specifically, programmable elements, such as antifuses, located on a memory device are programmed during fabrication with measured operating parameters corresponding to the memory device. Operating parameters may include, for example, operating current values, or voltage and timing parameters. The memory device may be incorporated into a memory module that is incorporated into a system. Once the memory module is incorporated into a system, the programmable elements may be accessed such that the memory system can be configured to optimally operate in accordance with the operating parameters measured for each memory device in the system.

Abstract: Apparatus and methods of forming and operating the apparatus provide an instrumentality for a memory to generate a test mode signal to trigger a test in response to the memory detecting a predetermined command from a system bus. In an embodiment, a mode register in the memory includes an indicator to enable or disable issuance of a test mode signal from the memory. The mode register may contain information identifying the predetermined command.

Abstract: A technique for storing accurate operating current values using programmable elements on memory devices. More specifically, programmable elements, such as antifuses, located on a memory device are programmed with measured operating current values corresponding to the memory device, during fabrication. The memory device may be incorporated into a memory module that is incorporated into a system. Once the memory module is incorporated into a system, the programmable elements may be accessed such that the system can be configured to optimally operate in accordance with the operating current values measured for each memory device in the system.

Abstract: Memory modules and methods for fabricating and implementing memory modules wherein unique operating current values corresponding to specific memory devices on the memory modules are accessed from a database such that the operating current values may be implemented to improve system performance. Memory modules comprising a number of volatile memory devices may be fabricated. Operating current values corresponding to the specific memory devices on the memory module may be stored in a database and accessed during fabrication or during implementation of the memory modules in a system. System performance may be optimized by implementing the unique operating current values corresponding to the specific memory devices on the memory modules.

Abstract: Memory modules having accurate operating parameters stored thereon and methods for fabricating and implementing such devices to improve system performance. Memory modules comprising a number of volatile memory devices may be fabricated. Operating parameters for specific memory devices on the memory module or a specific lot in which the memory devices are fabricated may be stored on a non-volatile memory device on the memory module. A system may be configured in accordance with the operating parameters stored on the non-volatile memory device such that corresponding thresholds are not exceeded.

Abstract: Memory modules having accurate operating current values stored thereon and methods for fabricating and implementing such devices to improve system performance. Memory modules comprising a number of volatile memory devices may be fabricated. Operating current values for specific memory devices on the memory module or a specific lot in which the memory devices are fabricated may be stored on a non-volatile memory device on the memory module. A system may be configured in accordance with the operating current values stored on the non-volatile memory device such that operating current thresholds are not exceeded.

Abstract: A method and apparatus are provided for active termination control in a memory by a module register providing an active termination control signal to the memory. The memory turns on active termination based on information programmed into one or more mode registers of the memory. The memory maintains the active termination in an on state for a predetermined time based on information programmed into one or more mode registers of the memory.

Abstract: A method and apparatus are provided for active termination control in a memory. In an embodiment, the memory turns on active termination based on information programmed into one or more mode registers of the memory. In an embodiment, the memory maintains the active termination in an on state for a predetermined time based on information programmed into one or more mode registers of the memory.

Abstract: Embodiments of the present invention relate to configurable inputs and/or outputs for memory and memory stacking applications. More specifically, embodiments of the present invention include memory devices that include a die having a circuit configured for enablement by a particular signal, an input pin configured to receive the particular signal, and a path selector configured to selectively designate a signal path to the circuit from the input pin.

Abstract: Memory modules and methods for fabricating and implementing memory modules wherein unique device parameters corresponding to specific memory devices on the memory modules are accessed from a database such that the device parameters may be implemented to improve system performance. The device parameters may include sizes, speeds, operating voltages, or timing parameters of the memory modules. Memory modules comprising a number of volatile memory devices may be fabricated. Device parameters corresponding to the specific memory devices on the memory module may be stored in a database and accessed during fabrication or during implementation of the memory modules in a system. System performance may be optimized by implementing the unique device parameters corresponding to the specific memory devices on the memory modules.