Patents by Inventor Jerrell P. Hein

Jerrell P. Hein has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6975723
    Abstract: A communication system is provided which draws virtually no loop current during a ringing burst and only draws on-hook loop current during the caller ID field. More particularly, ringer burst circuitry may be powered from the user powered circuitry by the transmission of power across the isolation barrier rather than being powered from the phone line. Thus, loop current need not be drawn from the TIP/RING lines during ringer bursts. The isolation barrier may be a capacitive isolation barrier which allows bidirectional communication and extraction of power from signals transmitted across the barrier.
    Type: Grant
    Filed: May 5, 2003
    Date of Patent: December 13, 2005
    Assignee: Silicon Laboratories Inc.
    Inventors: Jeffrey W. Scott, Navdeep S. Sooch, David R. Welland, Jerrell P. Hein, Andrew W. Krone
  • Patent number: 6934384
    Abstract: A subscriber line interface circuit apparatus includes a signal processor having sense inputs for sensed tip and ring signals of a subscriber loop. The signal processor generates linefeed driver control signals in response to the sensed signals. The signal processor resides on an integrated circuit die. In another embodiment, a subscriber line interface circuit apparatus includes a signal processor generating subscriber loop control signals in response to sensed tip and ring signals from the subscriber loop. A linefeed driver portion drives the subscriber loop in accordance with the subscriber loop control signals. The linefeed driver portion provides the sensed tip and ring signals. Each of the linefeed driver portion and the signal processor resides on an integrated circuit die. In one packaging implementation, the signal processor and the linefeed driver portion reside on separate integrated circuit die within separate integrated circuit packages.
    Type: Grant
    Filed: February 10, 2000
    Date of Patent: August 23, 2005
    Assignee: Silicon Laboratories, Inc.
    Inventors: Jerrell P. Hein, Navdeep S. Sooch
  • Patent number: 6922469
    Abstract: A communication system of the present invention utilizes ring detection circuitry on both sides of an isolation barrier. More particularly, the ring detection circuitry may include ring burst circuitry on the phone line side of the isolation barrier and ringer timing circuits on the powered side of the isolation barrier. The digital burst peak signal may be transmitted through the isolation banier to the finger timing circuits. By splitting the ring detection circuitry so that the ringer timing circuits are placed on the powered side of the isolation barriers, a significant reduction in the power usage on the phone line side of the barrier related to the ring detection function may occur. The outputs of the ringing timing circuits may be provided to circuits on either side of the isolation barrier. Thus, the ring detection function may be accomplished in a system utilizing an efficient bidirectional capacitive barrier while still minimizing power usage on the line side of the barrier.
    Type: Grant
    Filed: May 5, 2003
    Date of Patent: July 26, 2005
    Assignee: Silicon Laboratories, Inc.
    Inventors: Jeffrey W. Scott, Navdeep S. Sooch, David R. Welland, Jerrell P. Hein
  • Publication number: 20040232997
    Abstract: Temperature compensation is achieved by adjusting a divide ratio of a multi-modulus divider circuit in a feedback path of a phase-locked loop based on the detected temperature. The divide ratio is adjusted based on stored adjustment values stored in non-volatile memory. Interpolation may be used to interpolate between the stored adjustment values.
    Type: Application
    Filed: June 28, 2004
    Publication date: November 25, 2004
    Applicant: Silicon Laboratories Inc.
    Inventors: Jerrell P. Hein, Axel Thomsen
  • Publication number: 20040232995
    Abstract: A first phase-locked loop (PLL) circuit includes an input for receiving a timing reference signal from an oscillator, a controllable oscillator circuit supplying an oscillator output signal, and a multi-modulus feedback divider circuit. A second control loop circuit is selectably coupled through a select circuit to supply a digital control value (M) to the multi-modulus feedback divider circuit of the first loop circuit to thereby control the oscillator output signal. While the second control loop is coupled to supply the control value to the feedback divider circuit, the control value is determined according to a detected difference between the oscillator output signal and a reference signal coupled to the second control loop circuit at a divider circuit.
    Type: Application
    Filed: June 28, 2004
    Publication date: November 25, 2004
    Applicant: Silicon Laboratories Inc.
    Inventors: Axel Thomsen, Yunteng Huang, Jerrell P. Hein
  • Patent number: 6724891
    Abstract: An improved modem architecture and associated method are disclosed that integrate modem and line-isolation circuitry so as to achieve modem functionality and system-side isolation functionality on a single integrated circuit. The combined modem and line isolation system includes a line-side line-isolation integrated circuit which contains caller ID circuitry. The caller ID circuitry includes a caller ID analog to digital converter for processing caller ID data. The caller ID analog to digital converter may be powered by a power supply generated from power provided across a capacitive isolation barrier. The caller ID circuitry may be coupled to the ringer inputs of the line-side line-isolation integrated circuit. The ringer inputs may be capacitively coupled to the phone line.
    Type: Grant
    Filed: June 26, 2000
    Date of Patent: April 20, 2004
    Assignee: Silicon Laboratories Inc.
    Inventors: Yunteng Huang, George T. Tuttle, Timothy J. Dupuis, Jerrell P. Hein
  • Patent number: 6686803
    Abstract: An internal frequency reference, such as a VCO used in a PLL, having a free-running frequency fairly well controlled within a predictable range, is used as a rough frequency reference to determine, for an externally-provided frequency reference signal, which of a finite number of discrete frequencies is currently received. The VCO has a frequency range which varies less, as a percentage, than the ratio between possible reference frequency values. Consequently, the VCO is used as a frequency reference to measure the frequency reference signal. An internal signal is generated to indicate to remaining circuitry which of the possible reference frequencies is actually being provided, without requiring use of any dedicated input pins to receive a select signal. An integrated circuit device may be configured for different modes of operation as a function of which reference frequency is provided to the device.
    Type: Grant
    Filed: July 10, 2001
    Date of Patent: February 3, 2004
    Assignee: Silicon Laboratories, Inc.
    Inventors: Michael H. Perrott, Jerrell P. Hein, Rex T. Baird
  • Publication number: 20030206626
    Abstract: A communication system is provided with a power supply budget such that portions of a phone line side circuit may be powered from the TIP and RING phone lines while using standard electronic devices for the hookswitch circuits and the diode bridge circuit. For example, low voltage converters in the phone line side circuit may be powered from the phone line. The low voltage converters may operate off a low voltage power supply of approximately 2.5 V or less, more preferably may operate off a low voltage power supply of approximately 2.0 V or less, and in one embodiment 1.9 V converters may be utilized. The communication system may further include a capacitive isolation barrier system for isolating the phone line side circuitry.
    Type: Application
    Filed: May 5, 2003
    Publication date: November 6, 2003
    Inventors: Jeffrey W. Scott, Navdeep S. Sooch, David R. Welland, Jerrell P. Hein, Andrew W. Krone
  • Publication number: 20030194083
    Abstract: A communication system is provided with a power supply budget such that portions of a phone line side circuit may be powered from the TIP and RING phone lines while using standard electronic devices for the hookswitch circuits and the diode bridge circuit. For example, low voltage converters in the phone line side circuit may be powered from the phone line. The low voltage converters may operate off a low voltage power supply of approximately 2.5 V or less, more preferably may operate off a low voltage power supply of approximately 2.0 V or less, and in one embodiment 1.9 V converters may be utilized. The communication system may further include a capacitive isolation barrier system for isolating the phone line side circuitry.
    Type: Application
    Filed: May 5, 2003
    Publication date: October 16, 2003
    Inventors: Jeffrey W. Scott, Navdeep S. Sooch, David R. Welland, Jerrell P. Hein
  • Patent number: 6567521
    Abstract: A subscriber loop interface circuit having bifurcated common mode control loops includes a DC common mode control for controlling tip and ring DC common mode characteristics, and an AC common mode control for controlling tip and ring AC common mode characteristics, wherein the AC and DC common mode controls are independent. In one embodiment, the DC common mode control includes a tip current source for generating a tip current, idt, and a ring current source for generating a ring current, idr, Each of idt and idr is proportional to a difference between a DC tip voltage (TIPDC) and a control voltage (Vcmcontrol). Thus, in one embodiment, idt=gdt(TIPDC−Vcmcontrol), and idr=gdr(TIPDC−Vcmcontrol). In one embodiment, the AC common mode control includes a tip current source for generating a tip current, iat, and a ring current source for generating a ring current, iar. Each of iat and iar is a function of an AC tip voltage (TIPAC) and an AC ring voltage (RINGAC).
    Type: Grant
    Filed: August 17, 1999
    Date of Patent: May 20, 2003
    Assignee: Silicon Laboratories, Inc.
    Inventor: Jerrell P. Hein
  • Patent number: 6456712
    Abstract: A communication system of the present invention utilizes ring detection circuitry on both sides of an isolation barrier. More particularly, the ring detection circuitry may include ring burst circuitry on the phone line side of the isolation barrier and ringer timing circuits on the powered side of the isolation barrier. The digital burst peak signal may be transmitted through the isolation barrier to the ringer timing circuits. By splitting the ring detection circuitry so that the ringer timing circuits are placed on the powered side of the isolation barriers, a significant reduction in the power usage on the phone line side of the barrier related to the ring detection function may occur. The outputs of the ringing timing circuits may be provided to circuits on either side of the isolation barrier. Thus, the ring detection function may be accomplished in a system utilizing an efficient bidirectional capacitive barrier while still minimizing power usage on the line side of the barrier.
    Type: Grant
    Filed: March 4, 1998
    Date of Patent: September 24, 2002
    Assignee: Silicon Laboratories Inc.
    Inventors: Jerrell P. Hein, Jeffrey W. Scott, Navdeep S. Sooch, David R. Welland
  • Patent number: 6442271
    Abstract: A method and apparatus are provided for maintaining communication across an isolation barrier even if the external circuitry to which it is connected enters a low-power mode. In normal operation the isolation barrier local clock is synchronized with a clock signal provided by the external circuitry. If the external circuitry enters a low-power mode, its clock signal often slows or stops. In that case, the local clock in the isolation barrier switches to a free-running mode, wherein a VCO voltage input is provided by a bias voltage generator instead of by a PLL circuit. The VCO thus continues to provide a local clock signal in order to allow communication of information across the isolation barrier even if the external circuitry is not active. This enables the isolation barrier to receive and process an external signal, such as a ring signal, in low-power mode.
    Type: Grant
    Filed: March 4, 1998
    Date of Patent: August 27, 2002
    Assignee: Silicon Laboratories, Inc.
    Inventors: George Tyson Tuttle, Jerrell P. Hein, Timothy J. Dupuis, Jeffrey W. Scott, Navdeep S. Sooch, David R. Welland
  • Patent number: 6408034
    Abstract: A communication system having a framing pattern to frame data to be transmitted to a phone line is provided. The data may be framed on one side of an isolation barrier and a clock signal may be extracted from the framed data stream on the other side of the barrier. The data to be framed is provided from an output of a delta-sigma modulator and the framing pattern utilized is a pattern that is unlikely to match the data stream output of the modulator. Thus, an erroneous detection of the framing pattern is unlikely to occur. The framing pattern is chosen to correspond to the expected modulator output for a full scale input signal that is at a frequency higher than the maximum actual frequency of the input data provided to the modulator.
    Type: Grant
    Filed: March 4, 1998
    Date of Patent: June 18, 2002
    Assignee: Silicon Laboratories, Inc.
    Inventors: Andrew W. Krone, Jerrell P. Hein, Jeffrey W. Scott, Navdeep S. Sooch, David R. Welland
  • Patent number: 6307891
    Abstract: A method and apparatus are provided for suspending or freezing outputs from an isolation barrier system, which may be a digital capacitive isolation barrier system, during the occurrence of events that may disrupt proper operation of the system. Examples of such disruptive events are data rate changes during modem baud rate negotiations, transition to low-power mode, and going off-hook in a telephony system. In each of these cases, the master circuit anticipates the disruption and sends a freeze signal to the isolated circuit. The freeze signal instructs the isolated circuit to enter freeze mode, and no data is sent through the isolation system. Internal control signals are generated and used to establish synchronization and framing after the disruption, and to restore normal operation of the isolation system. In preferred embodiments, the duration of the freeze period may be determined by a timer or by circuitry that detects framing lock or the presence of transients in the system.
    Type: Grant
    Filed: March 4, 1998
    Date of Patent: October 23, 2001
    Assignee: Silicon Laboratories, Inc.
    Inventors: Jerrell P. Hein, Timothy J. Dupuis, George Tyson Tuttle, Jeffrey W. Scott, Navdeep S. Sooch, David R. Welland
  • Patent number: 6298133
    Abstract: A capacitive interface may be utilized to provide a linear output from the TIP and RING phone lines to ringer circuitry. Because the interface provides a linear signal, the input provided to the ringer circuitry may also be utilized for other functions in addition to ringer detection functions. More particularly, the outputs of the capacitive interface may also be connected to caller ID circuitry input lines so as to also provide caller ID data. The use of common inputs for the ringer circuitry and the caller ID circuitry eliminates the need for a separate caller ID interface.
    Type: Grant
    Filed: March 4, 1998
    Date of Patent: October 2, 2001
    Assignee: Silicon Laboratories, Inc.
    Inventors: Jerrell P. Hein, Jeffrey W. Scott, Navdeep S. Sooch, David R. Welland
  • Patent number: 6198816
    Abstract: A communication system is provided with a capacitive isolation barrier in which at least a portion of the ring detection circuits may be integrated into the line side circuitry. Moreover the ring detection circuits on the phone line side of the isolation barrier may be powered at least in part by power transmitted from the powered side of the isolation barrier to the phone line side of the isolation barrier through the barrier capacitors. A capacitive interface may directly connect the ringer circuitry on the phone line side of the barrier to the TIP/RING lines. The capacitive interface operates to linearly attenuate the TIP/RING signal voltage levels from the high phone line levels to levels within integrated circuit technology limitations.
    Type: Grant
    Filed: March 4, 1998
    Date of Patent: March 6, 2001
    Assignee: Silicon Laboratories, Inc.
    Inventors: Jerrell P. Hein, Jeffrey W. Scott, Navdeep S. Sooch, David R. Welland
  • Patent number: 6141169
    Abstract: A system and method for an amplifier control circuit is provided which does not require the use of a large off-chip or on-chip capacitor for achieving a low frequency coupling corner, while still effectively allowing AC coupling the data detection circuit. In addition, the input offset voltage to the amplifier may be compensated and the inherent random low frequency input voltages provided to the amplifier may be controlled or canceled. Further, the amplifier control circuitry includes a freeze capability which allows the control circuitry to halt all updates to the input offset/low frequency control circuit when the voltage input signal is interrupted. In addition low frequency control and offset compensation updates may be performed without causing large output signal glitches so that the integrity of the received signal will not be compromised. In a preferred embodiment the system and method may be utilized for data detection circuits utilized in conjunction with optical disks.
    Type: Grant
    Filed: October 23, 1997
    Date of Patent: October 31, 2000
    Assignee: Cirrus Logic, Inc.
    Inventors: David M. Pietruszynski, Jerrell P. Hein, William G. Bliss, German S. Feyh
  • Patent number: 6111712
    Abstract: A system and method is provided to improve the jitter performance of high frequency synthesizers used in read/write channel circuits. The frequency synthesizer is implemented with multiple phase locked loops arranged in a cascaded fashion to increase the update rates at which the cascaded loops operate at for a given frequency resolution of the synthesizer. The cascaded or staged phase locked loops may be utilized for generating read, write, and servo clocks for a read/write channel circuit. The cascaded phase locked loops may also be arranged such that one or more stages are shared to generate the read, write or servo clocks.
    Type: Grant
    Filed: March 6, 1998
    Date of Patent: August 29, 2000
    Assignee: Cirrus Logic, Inc.
    Inventors: G. Diwakar Vishakhadatta, Jerrell P. Hein
  • Patent number: 6104794
    Abstract: A communication system is provided which draws virtually no loop current during a ringing burst and only draws on-hook loop current during the caller ID field. More particularly, ringer burst circuitry may be powered from the user powered circuitry by the transmission of power across the isolation barrier rather than being powered from the phone line. Thus, loop current need not be drawn from the TIP/RING lines during ringer bursts. The isolation barrier may be a capacitive isolation barrier which allows bidirectional communication and extraction of power from signals transmitted across the barrier.
    Type: Grant
    Filed: March 4, 1998
    Date of Patent: August 15, 2000
    Assignee: Silicon Laboratories, Inc.
    Inventors: Jerrell P. Hein, Andrew W. Krone, Jeffrey W. Scott, Navdeep S. Sooch, David R. Welland
  • Patent number: 6078444
    Abstract: A circuit is provided for use with analog to digital conversion techniques in sampled amplitude read channel integrated circuits. A common ADC may be utilized for conversion of both high frequency disk data such as user data and servo data, for example, and for low frequency auxiliary data such as, for example, motor back-EMF current signals. The ADC may utilize the relatively low bit accuracy required for the read channel disk data and through oversampling techniques obtain sufficient conversion accuracy to meet the relatively higher precision requirements for the auxiliary data conversion. The auxiliary data is modified by a ramp signal and the ADC is run on a clock generated from a dithered frequency source so that ADC quantization errors may be randomized.
    Type: Grant
    Filed: April 18, 1996
    Date of Patent: June 20, 2000
    Assignee: Cirrus Logic, Inc.
    Inventors: G. Diwakar Vishakhadatta, David E. Reed, Jerrell P. Hein, G. Tyson Tuttle