Abstract: Generally, this disclosure provides devices, methods, and computer readable media for packet processing with reduced latency. The device may include a data queue to store data descriptors associated with data packets, the data packets to be transferred between a network and a driver circuit. The device may also include an interrupt generation circuit to generate an interrupt to the driver circuit. The interrupt may be generated in response to a combination of an expiration of a delay timer and a non-empty condition of the data queue. The device may further include an interrupt delay register to enable the driver circuit to reset the delay timer, the reset postponing the interrupt generation.

Abstract: Generally, this disclosure provides devices, methods, and computer readable media for packet processing with reduced latency. The device may include a data queue to store data descriptors associated with data packets, the data packets to be transferred between a network and a driver circuit. The device may also include an interrupt generation circuit to generate an interrupt to the driver circuit. The interrupt may be generated in response to a combination of an expiration of a delay timer and a non-empty condition of the data queue. The device may further include an interrupt delay register to enable the driver circuit to reset the delay timer, the reset postponing the interrupt generation.

Abstract: Generally, this disclosure provides devices, methods, and computer readable media for packet processing with reduced latency. The device may include a data queue to store data descriptors associated with data packets, the data packets to be transferred between a network and a driver circuit. The device may also include an interrupt generation circuit to generate an interrupt to the driver circuit. The interrupt may be generated in response to a combination of an expiration of a delay timer and a non-empty condition of the data queue. The device may further include an interrupt delay register to enable the driver circuit to reset the delay timer, the reset postponing the interrupt generation.

Abstract: Generally, this disclosure provides devices, methods, and computer readable media for packet processing with reduced latency. The device may include a data queue to store data descriptors associated with data packets, the data packets to be transferred between a network and a driver circuit. The device may also include an interrupt generation circuit to generate an interrupt to the driver circuit. The interrupt may be generated in response to a combination of an expiration of a delay timer and a non-empty condition of the data queue. The device may further include an interrupt delay register to enable the driver circuit to reset the delay timer, the reset postponing the interrupt generation.

Abstract: Technologies for monitoring service level agreement (SLA) performance in an end-to-end SLA monitoring architecture include a network functions virtualization (NFV) SLA controller configured to manage SLA agents initialized in various network processing components of the end-to-end SLA monitoring architecture. To do so, the NFV SLA controller is configured to provide instruction to the SLA agents indicating which types of telemetry data to monitor and receive the requested telemetry data, as securely collected and securely packaged by the SLA agents. The NFV SLA controller is further configured to securely analyze the received telemetry data to determine one or more performance metrics and compare performance benchmarks against the performance metrics to generate an SLA report that includes the results of the comparison. Other embodiments are described and claimed.

Abstract: Generally, this disclosure provides devices, methods, and computer readable media for packet processing with reduced latency. The device may include a data queue to store data descriptors associated with data packets, the data packets to be transferred between a network and a driver circuit. The device may also include an interrupt generation circuit to generate an interrupt to the driver circuit. The interrupt may be generated in response to a combination of an expiration of a delay timer and a non-empty condition of the data queue. The device may further include an interrupt delay register to enable the driver circuit to reset the delay timer, the reset postponing the interrupt generation.

Abstract: Generally, this disclosure provides devices, methods and computer readable media for packet processing with reduced latency. The device may include a data queue to store data descriptors associated with data packets, the data packets to be transferred between a network and a driver circuit. The device may also include an interrupt generation circuit to generate an interrupt to the driver circuit. The interrupt may be generated in response to a combination of an expiration of a delay timer and a non-empty condition of the data queue. The device may further include an interrupt delay register to enable the driver circuit to reset the delay timer, the reset postponing the interrupt generation.

Abstract: Methods and apparatus for accelerating VM-to-VM Network Traffic using CPU cache. A virtual queue manager (VQM) manages data that is to be kept in VM-VM shared data buffers in CPU cache. The VQM stores a list of VM-VM allow entries identifying data transfers between VMs that may use VM-VM cache “fast-path” forwarding. Packets are sent from VMs to the VQM for forwarding to destination VMs. Indicia in the packets (e.g., in a tag or header) is inspected to determine whether a packet is to be forwarded via a VM-VM cache fast path or be forwarded via a virtual switch. The VQM determines the VM data already in the CPU cache domain while concurrently coordinating with the data to and from the external shared memory, and also ensures data coherency between data kept in cache and that which is kept in shared memory.

Abstract: Generally, this disclosure provides devices, methods and computer readable media for packet processing with reduced latency. The device may include a data queue to store data descriptors associated with data packets, the data packets to be transferred between a network and a driver circuit. The device may also include an interrupt generation circuit to generate an interrupt to the driver circuit. The interrupt may be generated in response to a combination of an expiration of a delay timer and a non-empty condition of the data queue. The device may further include an interrupt delay register to enable the driver circuit to reset the delay timer, the reset postponing the interrupt generation.

Abstract: The present disclosure is directed to enhanced virtual function capabilities in a virtualized network environment. In general, devices may comprise physical and virtualized resources. The physical resources may comprise at least a network adaptor that may handle incoming data from a network and outgoing data to the network. The virtualized resources may comprise at least one virtual machine (VM) and a corresponding interface. The corresponding interface may be one of a physical interface, a virtual interface or a “super” virtual interface. The physical interface may provide a first set of capabilities allowing the VM to access (e.g., control) at least the network adaptor. The virtual interface may provide a second set of capabilities that is a subset of the first set. The super virtual interface may provide a third set of capabilities including the second set of capabilities and at least one additional capability from the first set of capabilities.

Abstract: Methods and Apparatus for Multi-Stage VM Virtual Network Function and Virtual Service Function Chain Acceleration for NFV and needs-based hardware acceleration. Compute platform hosting virtualized environments including virtual machines (VMs) running service applications performing network function virtualization (NFV) employ Field Programmable Gate Array (FPGA) to provide a hardware-based fast path for performing VM-to-VM and NFV-to-NFV transfers. The FPGAs, along with associated configuration data are also configured to support dynamic assignment and performance of hardware-acceleration to offload processing tasks from processors in virtualized environments, such as cloud data centers and the like.

Abstract: Technologies for pacing transmission of network packets by a computing device to a remote computing device include performing a segmentation offload operation to segment a payload of a network packet into a plurality of network packet segments in response to a determination that a size of the payload is greater than a maximum allowable payload size. The computing device additionally determines a packet pacing interval and transmits the plurality of network packet segments to the remote computing device at a transmission rate based on the packet pacing interval.

Abstract: The present disclosure is directed to enhanced virtual function capabilities in a virtualized network environment. In general, devices may comprise physical and virtualized resources. The physical resources may comprise at least a network adaptor that may handle incoming data from a network and outgoing data to the network. The virtualized resources may comprise at least one virtual machine (VM) and a corresponding interface. The corresponding interface may be one of a physical interface, a virtual interface or a “super” virtual interface. The physical interface may provide a first set of capabilities allowing the VM to access (e.g., control) at least the network adaptor. The virtual interface may provide a second set of capabilities that is a subset of the first set. The super virtual interface may provide a third set of capabilities including the second set of capabilities and at least one additional capability from the first set of capabilities.

Abstract: The present disclosure is directed to enhanced virtual function capabilities in a virtualized network environment. In general, devices may comprise physical and virtualized resources. The physical resources may comprise at least a network adaptor that may handle incoming data from a network and outgoing data to the network. The virtualized resources may comprise at least one virtual machine (VM) and a corresponding interface. The corresponding interface may be one of a physical interface, a virtual interface or a “super” virtual interface. The physical interface may provide a first set of capabilities allowing the VM to access (e.g., control) at least the network adaptor. The virtual interface may provide a second set of capabilities that is a subset of the first set. The super virtual interface may provide a third set of capabilities including the second set of capabilities and at least one additional capability from the first set of capabilities.

Abstract: Methods and apparatus for accelerating VM-to-VM Network Traffic using CPU cache. A virtual queue manager (VQM) manages data that is to be kept in VM-VM shared data buffers in CPU cache. The VQM stores a list of VM-VM allow entries identifying data transfers between VMs that may use VM-VM cache “fast-path” forwarding. Packets are sent from VMs to the VQM for forwarding to destination VMs. Indicia in the packets (e.g., in a tag or header) is inspected to determine whether a packet is to be forwarded via a VM-VM cache fast path or be forwarded via a virtual switch. The VQM determines the VM data already in the CPU cache domain while concurrently coordinating with the data to and from the external shared memory, and also ensures data coherency between data kept in cache and that which is kept in shared memory.

Abstract: Technologies for monitoring service level agreement (SLA) performance in an end-to-end SLA monitoring architecture include a network functions virtualization (NFV) SLA controller configured to manage SLA agents initialized in various network processing components of the end-to-end SLA monitoring architecture. To do so, the NFV SLA controller is configured to provide instruction to the SLA agents indicating which types of telemetry data to monitor and receive the requested telemetry data, as securely collected and securely packaged by the SLA agents. The NFV SLA controller is further configured to securely analyze the received telemetry data to determine one or more performance metrics and compare performance benchmarks against the performance metrics to generate an SLA report that includes the results of the comparison. Other embodiments are described and claimed.

Abstract: The present disclosure is directed to enhanced virtual function capabilities in a virtualized network environment. In general, devices may comprise physical and virtualized resources. The physical resources may comprise at least a network adaptor that may handle incoming data from a network and outgoing data to the network. The virtualized resources may comprise at least one virtual machine (VM) and a corresponding interface. The corresponding interface may be one of a physical interface, a virtual interface or a “super” virtual interface. The physical interface may provide a first set of capabilities allowing the VM to access (e.g., control) at least the network adaptor. The virtual interface may provide a second set of capabilities that is a subset of the first set. The super virtual interface may provide a third set of capabilities including the second set of capabilities and at least one additional capability from the first set of capabilities.

Abstract: Generally, this disclosure provides devices, methods and computer readable media for packet processing with reduced latency. The device may include a data queue to store data descriptors associated with data packets, the data packets to be transferred between a network and a driver circuit. The device may also include an interrupt generation circuit to generate an interrupt to the driver circuit. The interrupt may be generated in response to a combination of an expiration of a delay timer and a non-empty condition of the data queue. The device may further include an interrupt delay register to enable the driver circuit to reset the delay timer, the reset postponing the interrupt generation.

Abstract: Technologies for pacing transmission of network packets by a computing device to a remote computing device include performing a segmentation offload operation to segment a payload of a network packet into a plurality of network packet segments in response to a determination that a size of the payload is greater than a maximum allowable payload size. The computing device additionally determines a packet pacing interval and transmits the plurality of network packet segments to the remote computing device at a transmission rate based on the packet pacing interval.

Abstract: Technologies for ensuring data integrity for multi-packet operations include a computing device and a remote computing device communicatively coupled via a network. The computing device is configured to perform a segmentation offload operation on an original network packet, compute a hash value on the payload of each segmented payload of the original network packet, and store the hash value and an indication into the segmented network packet that indicates the hash value is stored in the segmented network packet. The remote computing device is configured to extract the indication and the hash value from a received network packet in response to determining the indication indicates the hash value is stored in the segmented network packet, compute a hash value on the payload of received network packet, and determine an integrity of the payload based on a comparison of the extracted hash value and the computed hash value.