Abstract: A nonvolatile memory device performs a program operation using an incremental pulse programming (ISPP) scheme in which a plurality of program loops alternate between a coarse-fine verify operation, and a fine verify operation according to a value of a program loop counter.

Abstract: A program verification circuit comprises a failed state counting unit and a failed bit counting unit. The failed state counting unit counts failed program states among a plurality of program states, and generates a first program mode signal indicating whether counting of failed bits is required. The failed bit counting unit selectively counts failed bits in response to the first program mode signal, and generates a second program mode signal indicating whether a program operation is completed.

Abstract: In one embodiment, the method includes receiving a request to read data stored in a first memory cell associated with a first word line, and performing a first read operation on at least one memory cell associated with a second word line in response to the request. The second word line follows the first word line in a word line programming order, and the first read operation is performed over a first time period. The method further includes performing a second read operation on the first memory cell based on output from the first read operation. The second read operation is performed for a second time period, and the first time period is shorter than the second time period if output from performing the first read operation indicates the first memory cell is not coupled.

Abstract: A method of reading a nonvolatile memory device comprises applying a read voltage to a memory cell array to read selected memory cells, counting a number of the selected memory cells that have a threshold voltage higher or lower than the read voltage, and comparing the counted number with a reference value to determine a number of bits stored in the selected memory cells.

Abstract: Methods of operating nonvolatile memory devices may include identifying one or more multi-bit nonvolatile memory cells in a nonvolatile memory device that have undergone unintentional programming from an erased state to an at least partially programmed state. Errors generated during an operation to program a first plurality of multi-bit nonvolatile memory cells may be detected by performing a plurality of reading operations to generate error detection data and then decoding the error detection data to identify specific cells having errors. A programmed first plurality of multi-bit nonvolatile memory cells and a force-bit data vector, which was modified during the program operation, may be read to support error detection. This data, along with data read from a page buffer associated with the first plurality of multi-bit nonvolatile memory cells, may then be decoded to identify which of the first plurality of multi-bit nonvolatile memory cells are unintentionally programmed cells.

Abstract: A method of programming a nonvolatile memory device comprises programming target memory cells among a plurality of memory cells connected to a wordline, performing a first sensing operation on the plurality of memory cells, and selectively performing a second sensing operation on the target memory cells based on a result of the first sensing operation.

Abstract: In one embodiment, the method includes receiving a request to read data stored in a first memory cell associated with a first word line, and performing a first read operation on at least one memory cell associated with a second word line in response to the request. The second word line follows the first word line in a word line programming order, and the first read operation is performed over a first time period. The method further includes performing a second read operation on the first memory cell based on output from the first read operation. The second read operation is performed for a second time period, and the first time period is shorter than the second time period if output from performing the first read operation indicates the first memory cell is not coupled.

Abstract: A method of programming a nonvolatile memory device comprises programming target memory cells among a plurality of memory cells connected to a wordline, performing a first sensing operation on the plurality of memory cells, and selectively performing a second sensing operation on the target memory cells based on a result of the first sensing operation.

Abstract: A non-volatile memory device, a data read method thereof and a recording medium are provided. The method includes receiving a data read command for a first word line in a memory cell array, reading data from a second word line adjacent to the first word line, and reading data from the first word line using a different voltage according to a state of the data read from the second word line. The number of read voltages used to distinguish an erased state and a first programmed state is greater than the number of read voltages used to distinguish a second programmed state and a third programmed state.

Abstract: Disclosed is a program method of a nonvolatile memory device including applying a first program voltage to a word line of a memory cell; verifying a variation of a threshold voltage of the memory cell; and applying a second program voltage to a memory cell having a threshold voltage higher than a reference level, the second program voltage being lower in level than the first voltage pulse.

Abstract: A method programming multi-bit data to multi-level non-volatile memory cells (MLC) includes; programming a first page of data to the MLC, programming a first page flag to an initial first flag state in response in the programming of the first page, programming a second page of data to the MLC, in response to programming the second page, determining whether the first page has been programmed and if the first page has been programmed, programming the first page flag to a final first flag state different from the initial first flag state in response to programming of the second page, and if the first page has not been programmed, inhibiting programming of the first page flag during programming of the second page.

Abstract: In one embodiment, the method includes receiving a request to read data stored in a first memory cell associated with a first word line, and performing a first read operation on at least one memory cell associated with a second word line in response to the request. The second word line follows the first word line in a word line programming order, and the first read operation is performed over a first time period. The method further includes performing a second read operation on the first memory cell based on output from the first read operation. The second read operation is performed for a second time period, and the first time period is shorter than the second time period if output from performing the first read operation indicates the first memory cell is not coupled.

Abstract: A nonvolatile memory device is programmed using an incremental step pulse programming method comprising a plurality of program loops. Some program loops use a one step verification operation, and other program loops use a two step verification operation.

Abstract: A nonvolatile memory device performs a program operation using an incremental pulse programming (ISPP) scheme in which a plurality of program loops alternate between a coarse-fine verify operation, and a fine verify operation according to a value of a program loop counter.

Abstract: A method of programming a nonvolatile memory device comprises programming target memory cells among a plurality of memory cells connected to a wordline, performing a first sensing operation on the plurality of memory cells, and selectively performing a second sensing operation on the target memory cells based on a result of the first sensing operation.

Abstract: A program verification circuit comprises a failed state counting unit and a failed bit counting unit. The failed state counting unit counts failed program states among a plurality of program states, and generates a first program mode signal indicating whether counting of failed bits is required. The failed bit counting unit selectively counts failed bits in response to the first program mode signal, and generates a second program mode signal indicating whether a program operation is completed.

Abstract: A method of programming a memory device includes comparing a first verify voltage and a distribution voltage of at least one memory cell, and if a result of the comparison is a pass, adjusting the distribution voltage until the distribution voltage is higher than a second verify voltage while comparing the distribution voltage and the second verify voltage.