Abstract: A data read operation method of a memory device includes applying a read voltage having a first preparation level and a first target level to a word line of a selected cell in the memory device to read a program state of the selected cell, applying a first read pass voltage having a second preparation level and a second target level to at least one word line of first non-selected cells not adjacent to the selected cell and in the same string as the selected cell, and applying a second read pass voltage having a third target level to a word line of at least one second non-selected cell adjacent to the selected cell.

Abstract: A programming method of a non-volatile memory device including a plurality of memory cells arranged in a plurality of cell strings includes sequentially applying a first pass voltage to unselected word lines of word lines connected to the plurality of memory cells during a first interval and a second pass voltage higher than the first pass voltage to the unselected word lines during a second interval; and applying a discharge voltage lower than a program voltage to a selected word line of the word lines connected to the plurality of memory cells after applying the program voltage to the selected word line in the first interval, and applying the program voltage to the selected word line during the second interval.

Abstract: A data read operation method of a memory device includes applying a read voltage having a first preparation level and a first target level to a word line of a selected cell in the memory device to read a program state of the selected cell, applying a first read pass voltage having a second preparation level and a second target level to at least one word line of first non-selected cells not adjacent to the selected cell and in the same string as the selected cell, and applying a second read pass voltage having a third target level to a word line of at least one second non-selected cell adjacent to the selected cell.

Abstract: A storage device includes a nonvolatile memory device and a controller configured to send first data, an address, and a first command to the nonvolatile memory device. The controller also sends at least one data to the nonvolatile memory device after sending the first command. The nonvolatile memory device is configured to initiate a program operation, which is based on the first data, in response to the first command. When receiving the at least one data from the controller, the nonvolatile memory device is configured to continue to perform the program operation based on the first data and the at least one data.

Abstract: A storage device includes a nonvolatile memory device and a controller. The controller provides the nonvolatile memory device with first data, an address, and a program start command and provides the nonvolatile memory device with second data after the program start command is provided the nonvolatile memory device. The nonvolatile memory device is configured to initiate a program operation, which is based on the first data, in response to the program start command and to continue to perform, based on the first data and the second data, the program operation when the second data is provided to the nonvolatile memory device. The nonvolatile memory device is configured to perform a program and a verification read of a first program loop based on the first data, the verification read of the first program loop being performed using one verification voltage.

Abstract: Disclosed is a variable-diameter wheel including a wheel having a folding pattern in which a unit cell is repeated and configured to be expanded or contracted so that a wheel diameter is varied; a spoke fixedly coupled to both longitudinal ends of the wheel and configured to be expanded or contracted according to a change in a distance between both sides, such that the wheel diameter is varied; and a variable induction shaft rotatably coupled with one of the both spokes to move the spoke in at least one lengthwise direction and configured to vary a distance between one spoke and the other spoke.

Abstract: A program verification method is for a nonvolatile memory device which programs a plurality of memory cells. The program verification method includes applying a plurality of verification voltages, and determining whether programming of memory cells, having different target threshold voltage distributions, from among the plurality of memory cells is completed based on one of the plurality of verification voltages.

Abstract: A method of programming a nonvolatile memory device is provided which includes applying a program voltage to selected ones of a plurality of memory cells; applying a selected one of a plurality of verification voltages after pre-charging bit lines connected to memory cells to which the program voltage is applied; sensing the memory cells to which the selected verification voltage is applied; selecting memory cells programmed to a target state referring to the sensing result and target state data; and determining whether programming of the selected memory cells is passed or failed.

Abstract: A program verification method is for a nonvolatile memory device which programs a plurality of memory cells. The program verification method includes applying a plurality of verification voltages, and determining whether programming of memory cells, having different target threshold voltage distributions, from among the plurality of memory cells is completed based on one of the plurality of verification voltages.

Abstract: A method of programming a nonvolatile memory device is provided which includes applying a program voltage to selected ones of a plurality of memory cells; applying a selected one of a plurality of verification voltages after pre-charging bit lines connected to memory cells to which the program voltage is applied; sensing the memory cells to which the selected verification voltage is applied; selecting memory cells programmed to a target state referring to the sensing result and target state data; and determining whether programming of the selected memory cells is passed or failed.

Abstract: Disclosed is a variable-diameter wheel including a wheel having a folding pattern in which a unit cell is repeated and configured to be expanded or contracted so that a wheel diameter is varied; a spoke fixedly coupled to both longitudinal ends of the wheel and configured to be expanded or contracted according to a change in a distance between both sides, such that the wheel diameter is varied; and a variable induction shaft rotatably coupled with one of the both spokes to move the spoke in at least one lengthwise direction and configured to vary a distance between one spoke and the other spoke.

Abstract: An array substrate for a liquid crystal display device and a fabrication method thereof, and a liquid crystal display device having the same are disclosed. The array substrate for a liquid crystal display device and a fabrication method thereof, and a liquid crystal display device having the same according to the present disclosure eliminate optical loss by use of a shielding film that can decrease the optic leakage current to minimize the optic leakage loss, thus it is possible to improve the picture quality.

Abstract: Disclosed herein are a tube continuum robot and a method for manufacturing a tube. More particularly, disclosed are a tube continuum robot and a method for manufacturing a tube, which is used in the tube continuum robot having a plurality of overlapping tubes and has anisotropic patterns for controlling the bending rigidity and torsional rigidity of the tube. In an embodiment, a tube continuum robot has a plurality of overlapping tubes, one or more of the plurality of overlapping tubes having a curved shape, wherein a plurality of anisotropic patterns are formed on the outer circumferential surface of the one or more tubes along the lengthwise or circumferential direction of the tubes.

Abstract: A method of programming selected memory cells to a plurality of target states comprises applying a first verification voltage to the selected memory cells to perform a verification read operation on memory cells programmed to at least one target state, applying a program voltage to the selected memory cells, and applying a second verification voltage lower than the first verification voltage to the selected memory cells to perform a verification read operation on memory cells programmed to the at least one target state, wherein the second verification voltage is provided in a specified program loop and subsequent program loops. The second verification voltage is set such that a number of slow bits in the at least one target state is different from the number of slow bits in another target state.

Abstract: A method of programming selected memory cells to a plurality of target states comprises applying a first verification voltage to the selected memory cells to perform a verification read operation on memory cells programmed to at least one target state, applying a program voltage to the selected memory cells, and applying a second verification voltage lower than the first verification voltage to the selected memory cells to perform a verification read operation on memory cells programmed to the at least one target state, wherein the second verification voltage is provided in a specified program loop and subsequent program loops. The second verification voltage is set such that a number of slow bits in the at least one target state is different from the number of slow bits in another target state.

Abstract: A plasma display panel is constructed with a first substrate on which images are displayed, a second substrate disposed facing and spaced apart from the first substrate by a certain distance, a plurality of barrier ribs disposed between the first substrate and the second substrate to define a plurality of discharge cells, a plurality of discharge electrodes extending along lines of the discharge cells, a plurality of phosphor layers formed on interior walls of the discharge cells, an optical reflective layer disposed between the phosphor layers and the second substrate, and a discharge gas filling the discharge cells. The optical reflective layer reflects the visible light that is radiated toward the second substrate, along the image display direction, i.e., towards the first substrate. In addition, the barrier ribs are made from a material having a high optical transmittance that does not absorb the visible light.

Abstract: A display apparatus includes a display and a display filter, wherein the display filter includes a base film, a plurality of reflective elements, and a plurality of light absorbing elements, wherein each of the light absorbing elements corresponds to a reflective element.

Abstract: An array substrate for a liquid crystal display device and a fabrication method thereof, and a liquid crystal display device having the same are disclosed. The array substrate for a liquid crystal display device and a fabrication method thereof, and a liquid crystal display device having the same according to the present disclosure eliminate optical loss by use of a shielding film that can decrease the optic leakage current to minimize the optic leakage loss, thus it is possible to improve the picture quality.

Abstract: An optical filter includes a support layer, absorption patterns on a first surface of the support layer, the absorption patterns having a predetermined interval therebetween, and adhesion members on the first surface of the support layer, the adhesion members being buried in the predetermined interval between the absorption patterns.

Abstract: Disclosed is a plasma display panel capable of reducing light reflection on screen. The present embodiments provide a plasma display panel provided with discharge spaces between a front panel, a rear panel and barrier ribs and including a phosphor layer formed in the discharge space, wherein the front panel includes a front substrate; a plurality of striped pattern regions provided in a first surface of the front substrate that faces the rear panel, and extended toward a first direction; a plurality of first pattern regions provided in a second surface of the front substrate and formed with a pattern in which the striped pattern regions are orthogonally projected to the second surface of the front substrate, and with the same pattern in a position that is overlapped with the pattern region; and a plurality of second pattern regions provided in the second surface of the front substrate and crossed with the first pattern regions.