Abstract: A domain level database containing domain user permission settings may contain local device permission settings for domain users. For each of the local devices attached to the domain, a client service may periodically query the domain database and receive local permission settings for individual domain users. The local permission settings may affect access and availability of certain local resources and actions to the domain users. The client service may update a locally maintained database that may be used by a local security management system to permit or deny access to local resources and local actions to individual users when those users are logged onto the local device.

Abstract: Devices in a network environment may have a local client application that may periodically update software components on a local device and may configure user access and other parameters to the software component for individual users. The client application may operate by querying a domain server and may receive a description of available software components. After identifying a component to install, the client application may download the component from a data store and install the component, then configure individual user access to the component.

Abstract: Methods and systems are provided for a flash memory device having a configurable sector size and a flexible protection scheme. A flash memory circuit includes: a memory array including a plurality of memory sectors, wherein at least one of the memory sectors includes a plurality of subsectors; a status register array including a plurality of protection bits defining a protection scheme for the memory array; a configuration register array defining a protection scheme for the plurality of subsectors, said configuration register including a subsector enable bit and a plurality of subsector protection bits; and control logic for controlling storage of data on the memory array.

Abstract: A memory device includes a memory array, a first protocol circuit, a second protocol circuit, an operation interface, and a protocol detection circuit. The first protocol circuit, which implements a first communication protocol, and the second protocol circuit, which implements a second communication protocol, are coupled in parallel between the memory array and the operation interface. The protocol detection circuit, which is coupled to the operation interface and to the first and second protocol circuits, monitors control signals provided to the operation interface by a host controller to determine which communication protocol the host controller employs. In response thereto, the protocol detection circuit selects one of the first and second protocol circuits to handles communication between the host controller and the memory device.

Abstract: A memory device includes a memory array, a first protocol circuit, a second protocol circuit, an operation interface, and a protocol detection circuit. The first protocol circuit, which implements a first communication protocol, and the second protocol circuit, which implements a second communication protocol, are coupled in parallel between the memory array and the operation interface. The protocol detection circuit, which is coupled to the operation interface and to the first and second protocol circuits, monitors control signals provided to the operation interface by a host controller to determine which communication protocol the host controller employs. In response thereto, the protocol detection circuit selects one of the first and second protocol circuits to handles communication between the host controller and the memory device.