Patents by Inventor Jin-Bum Kim

Jin-Bum Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230214202
    Abstract: The present invention relates to an installation technology of components of an edge cloud, and particularly, to a system and a method of edge cloud building for high-speed installation of components of an edge cloud, which can reduce generation and setting operation hours of individual components by automating installation of individual components of the edge cloud. To this end, in the edge cloud building system according to the present invention as a edge cloud building system for high-speed installation of components of an edge cloud, hierarchical components (IaaS, KaaS, PaaS) of an edge cloud are installed by using a server node image and a PaaS component image, and then detailed setting of the hierarchical components is performed by using a declarative script.
    Type: Application
    Filed: December 29, 2022
    Publication date: July 6, 2023
    Inventors: Jin Bum KIM, DONG MUK LEE
  • Publication number: 20230011153
    Abstract: A semiconductor device comprises an active pattern on a substrate; a plurality of nanosheets spaced apart from each other; a gate electrode surrounding each of the nanosheets; a field insulating layer surrounding side walls of the active pattern; an interlayer insulating layer on the field insulating layer; a source/drain region comprising a first doping layer on the active pattern, a second doping layer on the first doping layer, and a capping layer forming side walls adjacent to the interlayer insulating layer; a source/drain contact electrically connected to, and on, the source/drain region, and a silicide layer between the source/drain region and the source/drain contact which contacts contact with the second doping layer and extends to an upper surface of the source/drain region. The capping layer extends from an upper surface of the field insulating layer to the upper surface of the source/drain region along side walls of the silicide layer.
    Type: Application
    Filed: February 15, 2022
    Publication date: January 12, 2023
    Inventors: Dong Woo Kim, Gyeom Kim, Jin Bum Kim, Dong Suk Shin, Sang Moon Lee
  • Publication number: 20220415905
    Abstract: A semiconductor device may include a first active fin, a plurality of second active fins, a first source/drain layer structure, and a second source/drain layer structure. The first active fin may be on a first region of a substrate. The second active fins may be on a second region of the substrate. The first and second gate structures may be on the first and second active fins, respectively. The first source/drain layer structure may be on a portion of the first active fin that is adjacent to the first gate structure. The second source/drain layer structure may commonly contact upper surfaces of the second active fins adjacent to the second gate structure. A top surface of the second source/drain layer structure may be further from the surface of the substrate than a top surface of the first source/drain layer structure is to the surface of the substrate.
    Type: Application
    Filed: September 2, 2022
    Publication date: December 29, 2022
    Inventors: Jin-Bum KIM, Myung-Gil KANG, Kang-Hun MOON, Cho-Eun LEE, Su-Jin JUNG, Min-Hee CHOI, Yang XU, Dong-Suk SHIN, Kwan-Heum LEE, Hoi-Sung CHUNG
  • Publication number: 20220406892
    Abstract: A semiconductor device is provided.
    Type: Application
    Filed: March 31, 2022
    Publication date: December 22, 2022
    Inventors: SU JIN JUNG, JIN BUM KIM, DA HYE KIM, IN GYU JANG, DONG SUK SHIN
  • Publication number: 20220399330
    Abstract: A semiconductor device includes a semiconductor substrate having first and second regions therein, a first lower semiconductor pattern, which protrudes from the semiconductor substrate in the first region and extends in a first direction across the semiconductor substrate, and a first gate electrode, which extends across the first lower semiconductor pattern and the semiconductor substrate in a second direction. A plurality of semiconductor sheet patterns are provided, which are spaced apart from each other in a third direction to thereby define a vertical stack of semiconductor sheet patterns, on the first lower semiconductor pattern. A first gate insulating film is provided, which separates the plurality of semiconductor sheet patterns from the first gate electrode. A second lower semiconductor pattern is provided, which protrudes from the semiconductor substrate in the second region. A plurality of wire patterns are provided, which are spaced apart from each other on the second lower semiconductor pattern.
    Type: Application
    Filed: January 10, 2022
    Publication date: December 15, 2022
    Inventors: Kyung In Choi, Do Young Choi, Dong Myoung Kim, Jin Bum Kim, Hae Jun Yu
  • Patent number: 11469237
    Abstract: A semiconductor device may include a first active fin, a plurality of second active fins, a first source/drain layer structure, and a second source/drain layer structure. The first active fin may be on a first region of a substrate. The second active fins may be on a second region of the substrate. The first and second gate structures may be on the first and second active fins, respectively. The first source/drain layer structure may be on a portion of the first active fin that is adjacent to the first gate structure. The second source/drain layer structure may commonly contact upper surfaces of the second active fins adjacent to the second gate structure. A top surface of the second source/drain layer structure may be further from the surface of the substrate than a top surface of the first source/drain layer structure is to the surface of the substrate.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: October 11, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Bum Kim, Myung-Gil Kang, Kang-Hun Moon, Cho-Eun Lee, Su-Jin Jung, Min-Hee Choi, Yang Xu, Dong-Suk Shin, Kwan-Heum Lee, Hoi-Sung Chung
  • Patent number: 11421950
    Abstract: The present disclosure relates to a heat transfer tube having rare-earth oxide deposited on a surface thereof and a method for manufacturing the same, in which the rare-earth oxide can be deposited on the surface of the heat transfer tube to implement a superhydrophobic surface even under the high temperature environment and a plurality of assembled heat transfer tubes can be coated by coating a complex shape by depositing rare-earth oxide using a method for dipping a surface of the heat transfer tube and coating the same, thereby reducing or preventing the heat transfer tubes from being damaged during the assembling of the heat transfer tubes after the coating.
    Type: Grant
    Filed: January 3, 2020
    Date of Patent: August 23, 2022
    Assignee: Doosan Heavy Industries & Construction Co., Ltd
    Inventors: Hyun Sik Kim, Hyun Gee Kim, Jin Bum Kim, Young Suk Nam, Jae Hwan Shim
  • Publication number: 20220237017
    Abstract: Provided is a distributed and associative container platform system which has an advantage of providing flexible movement of services and infinite extension of computing resources by interconnecting regionally distributed multiple container platforms and enhancing security.
    Type: Application
    Filed: April 27, 2020
    Publication date: July 28, 2022
    Inventor: Jin Bum KIM
  • Publication number: 20220123145
    Abstract: Example semiconductor devices and methods for fabricating a semiconductor device are disclosed. An example device may include a substrate, a first semiconductor pattern spaced apart from the substrate, a first antioxidant pattern extending along a bottom surface of the first semiconductor pattern and spaced apart from the substrate, and a field insulating film on the substrate. The insulating film may cover at least a part of a side wall of the first semiconductor pattern. The first antioxidant pattern may include a first semiconductor material film doped with a first impurity.
    Type: Application
    Filed: December 30, 2021
    Publication date: April 21, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jin Bum KIM, Gyeom KIM, Da Hye KIM, Jae Mun KIM, Il Gyou SHIN, Seung Hun LEE, Kyung In CHOI
  • Patent number: 11251307
    Abstract: A device includes a substrate, a first electrode on the substrate, an insulating pattern on the substrate, a second electrode on an upper end of the insulating pattern, a two-dimensional (2D) material layer on a side surface of the insulating pattern, a gate insulating layer covering the 2D material layer, and a gate electrode contacting the gate insulting layer. The insulating pattern extends from the first electrode in a direction substantially vertical to the substrate. The 2D material layer includes at least one atomic layer of a 2D material that is substantially parallel to the side surface of the insulating pattern.
    Type: Grant
    Filed: September 4, 2018
    Date of Patent: February 15, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tae-jin Park, Jin-bum Kim, Bong-soo Kim, Kyu-pil Lee, Hyeong-sun Hong, Yoo-sang Hwang
  • Patent number: 11233150
    Abstract: Example semiconductor devices and methods for fabricating a semiconductor device are disclosed. An example device may include a substrate, a first semiconductor pattern spaced apart from the substrate, a first antioxidant pattern extending along a bottom surface of the first semiconductor pattern and spaced apart from the substrate, and a field insulating film on the substrate. The insulating film may cover at least a part of a side wall of the first semiconductor pattern. The first antioxidant pattern may include a first semiconductor material film doped with a first impurity.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: January 25, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin Bum Kim, Gyeom Kim, Da Hye Kim, Jae Mun Kim, Il Gyou Shin, Seung Hun Lee, Kyung In Choi
  • Publication number: 20210098626
    Abstract: Example semiconductor devices and methods for fabricating a semiconductor device are disclosed. An example device may include a substrate, a first semiconductor pattern spaced apart from the substrate, a first antioxidant pattern extending along a bottom surface of the first semiconductor pattern and spaced apart from the substrate, and a field insulating film on the substrate. The insulating film may cover at least a part of a side wall of the first semiconductor pattern. The first antioxidant pattern may include a first semiconductor material film doped with a first impurity.
    Type: Application
    Filed: June 24, 2020
    Publication date: April 1, 2021
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jin Bum KIM, Gyeom KIM, Da Hye KIM, Jae Mun KIM, Il Gyou SHIN, Seung Hun LEE, Kyung In CHOI
  • Publication number: 20210013324
    Abstract: A semiconductor device includes a substrate, a gate electrode on the substrate, a gate spacer on a sidewall of the gate electrode, an active pattern penetrating the gate electrode and the gate spacer, and an epitaxial pattern contacting the active pattern and the gate spacer. The gate electrode extends in a first direction. The gate spacer includes a semiconductor material layer. The active pattern extends in a second direction crossing the first direction.
    Type: Application
    Filed: September 30, 2020
    Publication date: January 14, 2021
    Inventors: Jin Bum KIM, MunHyeon KIM, Hyoung Sub KIM, Tae Jin PARK, Kwan Heum LEE, Chang Woo NOH, Maria TOLEDANO LU QUE, Hong Bae PARK, Si Hyung LEE, Sung Man WHANG
  • Patent number: 10864546
    Abstract: A system for coating a heat transfer tube for a condenser is disclosed. The system simplifies a process of coating the heat transfer tube, and is able to uniformly coat a plurality of heat transfer tubes. In addition, the system is economically feasible in that coating solution can be reused by collecting and circulating it. Due to super-hydrophobic coating, the size of a droplet condensed on the surfaces of the heat transfer tubes coated by the system can be reduced, and a condensation heat transfer coefficient can be increased.
    Type: Grant
    Filed: October 4, 2018
    Date of Patent: December 15, 2020
    Assignee: Doosan Heavy Industries Construction Co., Ltd
    Inventors: Jin Bum Kim, Hyun Sik Kim
  • Patent number: 10811541
    Abstract: A semiconductor device includes a gate electrode extending in a first direction on a substrate, a first active pattern extending in a second direction intersecting the first direction on the substrate to penetrate the gate electrode, the first active pattern including germanium, an epitaxial pattern on a side wall of the gate electrode, a first semiconductor oxide layer between the first active pattern and the gate electrode, and including a first semiconductor material, and a second semiconductor oxide layer between the gate electrode and the epitaxial pattern, and including a second semiconductor material. A concentration of germanium of the first semiconductor material may be less than a concentration of germanium of the first active pattern, and the concentration of germanium of the first semiconductor material may be different from a concentration of germanium of the second semiconductor material.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: October 20, 2020
    Assignees: Samsung Electronics Co., Ltd., Research & Business Foundation Sungkyunkwan University
    Inventors: Jin Bum Kim, Hyoung Sub Kim, Seong Heum Choi, Jin Yong Kim, Tae Jin Park, Seung Hun Lee
  • Patent number: 10672764
    Abstract: A semiconductor device includes a first region having a first active pattern with first protrusion portions and first recess portions, and a second region having a second active pattern with second protrusion portions and second recess portions. First gate patterns are on the first protrusion portions. Second gate patterns are on the second protrusion portions. A first source/drain region is on one of the first recess portion of the first active pattern between two of the first gate patterns. The first source/drain region has a first reinforcing epitaxial layer at an upper portion thereof. A second source/drain region is on one of the second recess portions of the second active pattern between two of the second gate patterns. The second source/drain region has a second reinforcing epitaxial layer having an epitaxial growth surface that is shaped differently than a first epitaxial growth surface of the first reinforcing epitaxial layer.
    Type: Grant
    Filed: October 30, 2018
    Date of Patent: June 2, 2020
    Assignee: Samsung Electroncis Co., Ltd.
    Inventors: Seok-hoon Kim, Dong-myoung Kim, Jin-bum Kim, Seung-hun Lee, Cho-eun Lee, Hyun-jung Lee, Sung-uk Jang, Edward Namkyu Cho, Min-hee Choi
  • Patent number: 10663237
    Abstract: The present disclosure relates to a heat transfer tube comprising nanostructures formed on the surface, and a method for manufacturing the same, and by forming nanostructures on a heat transfer tube surface, a superhydrophobic surface may be obtained under a high temperature environment as well. In addition, superhydrophobicity may be enhanced by further forming a hydrophobic coating layer on the nanostructure-formed heat transfer tube surface. By using a method of forming nanostructures by dipping the heat transfer tube surface, complex shapes may be coated, and therefore, a plurality of assembled heat transfer tubes may be coated, and damages occurring during a process of assembling the heat transfer tube after coating may be prevented.
    Type: Grant
    Filed: March 14, 2018
    Date of Patent: May 26, 2020
    Assignees: Doosan Heavy Industries Construction Co., Ltd., UNIVERSITY-INDUSTRY COOPERATION GROUP OF KYUNG HEE UNIVERSITY
    Inventors: Jin Bum Kim, Hyun Sik Kim, Young Suk Nam, Kyoung Hwan Song, Seung Tae Oh, Jae Hwan Shim, Dong Hyun Seo
  • Publication number: 20200149831
    Abstract: The present disclosure relates to a heat transfer tube having rare-earth oxide deposited on a surface thereof and a method for manufacturing the same, in which the rare-earth oxide can be deposited on the surface of the heat transfer tube to implement a superhydrophobic surface even under the high temperature environment and a plurality of assembled heat transfer tubes can be coated by coating a complex shape by depositing rare-earth oxide using a method for dipping a surface of the heat transfer tube and coating the same, thereby reducing or preventing the heat transfer tubes from being damaged during the assembling of the heat transfer tubes after the coating.
    Type: Application
    Filed: January 3, 2020
    Publication date: May 14, 2020
    Inventors: Hyun Sik Kim, Hyun Gee Kim, Jin Bum Kim, Young Suk Nam, Jae Hwan Shim
  • Patent number: 10600646
    Abstract: A method of fabricating a device including a two-dimensional (2D) material includes forming an amorphous transition metal oxide structure on a substrate and replacing the amorphous transition metal oxide structure by a transition metal dichalcogenide structure. The transition metal dichalcogenide structure includes atomic layers, that are substantially parallel to a surface of the transition metal dichalcogenide structure.
    Type: Grant
    Filed: September 4, 2018
    Date of Patent: March 24, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tae-jin Park, Bong-soo Kim, Jin-bum Kim, Yoo-sang Hwang
  • Patent number: 10557672
    Abstract: The present disclosure relates to a heat transfer tube having rare-earth oxide deposited on a surface thereof and a method for manufacturing the same, in which the rare-earth oxide can be deposited on the surface of the heat transfer tube to implement a superhydrophobic surface even under the high temperature environment and a plurality of assembled heat transfer tubes can be coated by coating a complex shape by depositing rare-earth oxide using a method for dipping a surface of the heat transfer tube and coating the same, thereby reducing or preventing the heat transfer tubes from being damaged during the assembling of the heat transfer tubes after the coating.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: February 11, 2020
    Assignee: Doosan Heavy Industries Construction Co., Ltd
    Inventors: Hyun Sik Kim, Hyun Gee Kim, Jin Bum Kim, Young Suk Nam, Jae Hwan Shim