Abstract: The present invention discloses a multi-stage cable equalizer, comprising a fixed gain device and an adjustable gain device. The fixed gain device compensates the loss caused by the cable at a major band, and the adjustable gain device further compensates the loss at adjusted bands. The multi-stage cable equalizer of the present invention exhibits advantages in design flexibility and reduced cost.

Abstract: A method and a device for equalizing mode selection are disclosed. The method comprises steps of: providing first sampling pulses in response to an equalized signal; providing second sampling pulses lagging behind the first sampling pulses for a pre-determined phase shift for sampling the equalized signal; establishing a first observing window and a second observing window according to the first sampling pulses and the second sampling pulses, so as to determine whether each of a plurality of equalizing modes is good or bad; and selecting one equalizing mode among the plurality of equalizing modes.

Abstract: An apparatus for generating quadrature phase signals in a half-rate data recovery circuit, which is adapted to generate a first and a second clock signals having the same frequency and being 90 degrees out of phase with each other. The apparatus for generating quadrature phase signals mainly comprises a base selector, a first phase interpolator and a second phase interpolator. The base selector generates, based on a region control signal, a pair of phase region boundaries for the first clock signal as well as a pair of phase region boundaries for the second clock signal by using a plurality of reference clock signals. The first and second phase interpolators perform, based on a position control signal, weighted average processes for the two pairs of phase region boundaries, respectively, to thereby obtain the first and the second clock signals.

Abstract: An apparatus for generating quadrature phase signals in a half-rate data recovery circuit, which is adapted to generate a first and a second clock signals having the same frequency and being 90 degrees out of phase with each other. The apparatus for generating quadrature phase signals mainly comprises a base selector, a first phase interpolator and a second phase interpolator. The base selector generates, based on a region control signal, a pair of phase region boundaries for the first clock signal as well as a pair of phase region boundaries for the second clock signal by using a plurality of reference clock signals. The first and second phase interpolators perform, based on a position control signal, weighted average processes for the two pairs of phase region boundaries, respectively, to thereby obtain the first and the second clock signals.

Abstract: Apparatus for converting input voltage to output current is disclosed herein. The apparatus mentioned above includes an input stage and a tuning stage. The input stage is used to generate a gate voltage corresponding to the input voltage, which is electrically coupled to the power source and ground. The input stage includes buffering means, a transistor, a resistor, and a first current repeating means. The first current repeating means generates the operational current responding to the current repeating transistor, and the input voltage is electrically coupled to the resistor by two input terminals of the buffering means. The gate of the transistor is connected to the output terminal of the buffering means, and the drain of the transistor is connected to the resistor and one of the two input terminals of the buffering means.