Patents by Inventor Jiushi WANG

Jiushi WANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136336
    Abstract: A driving substrate, a light-emitting apparatus and a manufacturing method thereof, a splicing display apparatus, the driving substrate includes: a device disposing area, a bending area and a bonding area, the bending area is located between the device disposing area and the bonding area; the driving substrates located in the device disposing area, the bending area, and the bonding area include a buffer layer, a first conductive layer and a flexible dielectric layer that are stacked in sequence; the driving substrates located in the device disposing area and the bonding area further include a base plate disposed at a side of the buffer layer away from the first conductive layer, and a second conductive layer disposed at a side of the flexible dielectric layer away from the first conductive layer; and the driving substrate located in the bending area is configured to be able to bend along a bending axis.
    Type: Application
    Filed: June 24, 2021
    Publication date: April 25, 2024
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xinhong Lu, Xiaoyan Zhu, Chao Liu, Shuilang Dong, Jiushi Wang, Liuqing Li
  • Patent number: 11943973
    Abstract: Disclosed are a preparation method of a display panel, a display panel and a displaying device. The display panel comprises a plurality of first-color subpixels, and each first-color subpixel comprises a base, the base comprising a first driving electrode and a second driving electrode; a flat layer disposed on the side, near the first driving electrode and the second driving electrode, of the base; a patterned passivation layer and at least one first electrode disposed on the side, away from the base, of the flat layer, the first electrode being connected with the first driving electrode through via holes penetrating the flat layer; and at least one second electrode disposed on the side, away from the base, of the passivation layer, the second electrode being connected with the second driving electrode through via holes penetrating the passivation layer and the flat layer.
    Type: Grant
    Filed: November 11, 2020
    Date of Patent: March 26, 2024
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Yongfeng Zhang, Xue Dong, Zhiqiang Jiao, Lei Zhao, Jiushi Wang
  • Patent number: 11728352
    Abstract: The present disclosure provides a driving substrate including: a flexible substrate base, a plurality of thin film transistors on the flexible substrate base and a first conductive pattern layer on a side of the thin film transistors distal to the flexible substrate base. The first conductive pattern layer includes: a plurality of first connection terminals in the display region and a plurality of signal supply lines in the bendable region. A first number of first connection terminals are electrically coupled to first electrodes of the plurality of thin film transistors. The plurality of signal supply lines are coupled to a second number of first connection terminals other than the first number of first connection terminals. At least one inorganic insulating layer including a hollowed-out pattern in the bendable region is between the first conductive pattern layer and the flexible substrate base.
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: August 15, 2023
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xinhong Lu, Fangzhen Zhang, Guangcai Yuan, Zhanfeng Cao, Jiushi Wang, Ke Wang, Xiaoyan Zhu, Qi Qi, Jingshang Zhou, Zhaohui Qiang, Zhiwei Liang
  • Publication number: 20230091604
    Abstract: The present disclosure relates to the field of display technologies, and in particular to a thin film transistor and a method for manufacturing the same, an array substrate and a display device. An active layer of the thin film transistor includes at least two metal oxide semi-conductor layers, the at least two metal oxide semi-conductor layers include a channel layer and a first protection layer, and metals in the channel layer include tin, and at least one of indium, gallium and zinc. The first protection layer includes praseodymium used to absorb photo-generated electrons from at least one of the channel layer and the first protection layer which is under light irradiation and reduce a photo-generated current caused by the light irradiation.
    Type: Application
    Filed: January 28, 2021
    Publication date: March 23, 2023
    Inventors: Jie Huang, Jiayu He, Ce Ning, Zhengliang Li, Hehe Hu, Fengjuan Liu, Nianqi Yao, Kun Zhao, Tianmin Zhou, Jiushi Wang, Zhongpeng Tian
  • Patent number: 11569406
    Abstract: A PIN device includes: a first doped layer, a second doped layer, and an intrinsic layer between the first doped layer and the second doped layer, where the second doped layer includes a body portion and an electric field isolating portion at least partially enclosing the body portion; and the electric field isolating portion is doped differently from the body portion.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: January 31, 2023
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Guoqiang Wang, Jiushi Wang, Qingzhao Liu
  • Publication number: 20220406749
    Abstract: Disclosed are an electrical connection method for an electronic element, and a backlight module, a display panel, and a display apparatus which include an electronic element to which the electrical connection method is applied. The electrical connection method comprises: providing a driving back plane, wherein the driving back plane comprises multiple contact electrodes; forming an anti-oxidation protection film on the contact electrodes; coating a position of the anti-oxidation protection film corresponding to each contact electrode with a binding material; and transferring multiple electronic elements to the positions of the corresponding contact electrodes, binding each electronic element to the corresponding contact electrode, and removing the anti-oxidation protection film at the position of each contact electrode before completing the binding of each electronic element to the corresponding contact electrode.
    Type: Application
    Filed: February 28, 2020
    Publication date: December 22, 2022
    Inventors: Zhanfeng CAO, Jiushi WANG, Ke WANG, Guocai ZHANG, Junwei YAN, Yingwei LIU, Haitao HUANG, Guangcai YUAN
  • Patent number: 11527676
    Abstract: A light-emitting unit and a method for manufacturing the same are provided. The light-emitting unit includes a first semiconductor layer, a light-emitting layer and a second semiconductor layer that are distributed in a stacking manner. At least one of the first semiconductor layer or the second semiconductor layer is at least in contact with a part of layer surfaces and a part of side of the light-emitting layer, the first semiconductor layer is insulated from the second semiconductor layer, and one of the first semiconductor layer and the second semiconductor layer is an N-type semiconductor layer, and the other is a P-type semiconductor layer. The present disclosure is conducive to increasing the light-emitting area and the light extraction efficiency of the light-emitting unit.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: December 13, 2022
    Assignee: BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.
    Inventors: Guoqiang Wang, Jiushi Wang, Qingzhao Liu
  • Patent number: 11520094
    Abstract: The present disclosure provides a polarizing device and a method for preparing the same, a display substrate, and a display device. The polarizing device includes: a base substrate, a metal wire grid, and an anti-reflection layer, in which the metal wire grid is arranged on the base substrate, the anti-reflection layer is arranged on the surface of the metal wire grid away from the base substrate, and the anti-reflection layer is a carbon film layer.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: December 6, 2022
    Assignee: Beijing BOE Technology Development Co., Ltd.
    Inventors: Shuilang Dong, Da Lu, Qingzhao Liu, Guoqiang Wang, Zhanfeng Cao, Jiushi Wang
  • Publication number: 20220384492
    Abstract: An array substrate having a light-emitting unit region, a bonding region, and a bending region located between the light-emitting unit region and the bonding region. The light-emitting unit region is configured to be provided with light-emitting units. The bonding region is configured to bond a control circuit. The array substrate includes a base substrate located in the light-emitting unit region and the bonding region, a first organic material layer, a metal intermediate layer, and a second organic material layer. The first organic material layer is disposed on a side of the base substrate. The metal intermediate layer is disposed on a side of the first to organic material layer away from the base substrate. The second organic material layer is disposed on a side of the metal intermediate layer away from the base substrate.
    Type: Application
    Filed: March 5, 2021
    Publication date: December 1, 2022
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xinhong LU, Zhanfeng CAO, Ke WANG, Jiushi WANG, Xiaoyan ZHU
  • Patent number: 11495623
    Abstract: The present disclosure provides a display substrate and a manufacturing method thereof, and a display device. In the display substrate of the present disclosure, a first transistor comprises a first gate electrode, a first electrode, a second electrode, and a first active layer; and a second transistor comprises a second gate electrode, a third electrode, a fourth electrode, and a second active layers, wherein the first active layer comprises a silicon material, the second active layer comprises an oxide semiconductor material, and wherein the third electrode and the first gate electrode are disposed in the same layer, and the fourth electrode and the first electrode, the second electrodes are disposed in the same layer.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: November 8, 2022
    Assignee: BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.
    Inventors: Yanan Niu, Kuanjun Peng, Jiushi Wang, Zhanfeng Cao, Feng Zhang, Qi Yao, Wusheng Li, Feng Guan, Lei Chen, Jintao Peng, Tingting Zhou
  • Patent number: 11276739
    Abstract: A display substrate is provided. The display substrate includes a substrate (1), a first transistor (2) and a second transistor (3) on the substrate (1), directions of intrinsic threshold voltage shifts of the first transistor (2) and the second transistor (3) being opposite; and a shift adjustment structure (4) on the substrate (1). The shift adjustment structure (4) may be configured to input adjustment signals to the first transistor (2) and the second transistor (3) respectively to make threshold voltages of the first transistor (2) and the second transistor (3) shift in directions opposite to the directions of their intrinsic threshold voltage shifts respectively.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: March 15, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yanan Niu, Jiushi Wang, Zhanfeng Cao, Qi Yao, Feng Zhang, Wusheng Li, Feng Guan, Lei Chen, Hongwei Tian
  • Publication number: 20220059631
    Abstract: Disclosed are a preparation method of a display panel, a display panel and a displaying device. The display panel comprises a plurality of first-color subpixels, and each first-color subpixel comprises a base, the base comprising a first driving electrode and a second driving electrode; a flat layer disposed on the side, near the first driving electrode and the second driving electrode, of the base; a patterned passivation layer and at least one first electrode disposed on the side, away from the base, of the flat layer, the first electrode being connected with the first driving electrode through via holes penetrating the flat layer; and at least one second electrode disposed on the side, away from the base, of the passivation layer, the second electrode being connected with the second driving electrode through via holes penetrating the passivation layer and the flat layer.
    Type: Application
    Filed: November 11, 2020
    Publication date: February 24, 2022
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Yongfeng Zhang, Xue Dong, Zhiqiang Jiao, Lei Zhao, Jiushi Wang
  • Publication number: 20220028898
    Abstract: The present disclosure provides a driving substrate including: a flexible substrate base, a plurality of thin film transistors on the flexible substrate base and a first conductive pattern layer on a side of the thin film transistors distal to the flexible substrate base. The first conductive pattern layer includes: a plurality of first connection terminals in the display region and a plurality of signal supply lines in the bendable region. A first number of first connection terminals are electrically coupled to first electrodes of the plurality of thin film transistors. The plurality of signal supply lines are coupled to a second number of first connection terminals other than the first number of first connection terminals. At least one inorganic insulating layer including a hollowed-out pattern in the bendable region is between the first conductive pattern layer and the flexible substrate base.
    Type: Application
    Filed: June 22, 2021
    Publication date: January 27, 2022
    Inventors: Xinhong LU, Fangzhen ZHANG, Guangcai YUAN, Zhanfeng CAO, Jiushi WANG, Ke WANG, Xiaoyan ZHU, Qi QI, Jingshang ZHOU, Zhaohui QIANG, Zhiwei LIANG
  • Patent number: 11201120
    Abstract: In embodiments of the present disclosure, there is provided a display substrate assembly including: a base substrate; a light shielding layer on the base substrate; and an active layer of a thin film transistor, above the base substrate. An orthographic projection of the active layer on the base substrate in a thickness direction of the base substrate is within an orthographic projection of the light shielding layer on the base substrate in the thickness direction of the base substrate, and the light shielding layer includes an ion-doped amorphous silicon layer. In embodiments of the present disclosure, there is also provided a method of manufacturing a display substrate assembly and a display apparatus including the display substrate assembly.
    Type: Grant
    Filed: December 14, 2017
    Date of Patent: December 14, 2021
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Qi Yao, Zhanfeng Cao, Feng Zhang, Jiushi Wang
  • Patent number: 11189679
    Abstract: An array substrate includes a base substrate and a plurality of pixel units disposed on a base substrate, and at least one pixel unit includes a plurality of thin film transistors, a first electrode, and a second electrode. The plurality of thin film transistors include at least one first thin film transistor including a first active pattern, a first gate, a first source and a first drain. The first electrode is disposed in a same layer as the first active pattern, the first electrode is coupled to the first drain, and the second electrode is disposed in a same layer as the first gate. Orthographic projections of any two in a group consisting of the first electrode, the second electrode, and the first drain on the base substrate have an overlapping region.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: November 30, 2021
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jing Feng, Dongsheng Yin, Ce Ning, Jiushi Wang
  • Patent number: 11171159
    Abstract: The present disclosure provides a display backplane and a method for manufacturing the same, a display panel, and a display device. The display backplane includes: a substrate; a first thin film transistor located on one side of the substrate; and a second thin film transistor located on the one side of the substrate, wherein: the first thin film transistor comprises a first active layer, the second thin film transistor comprises a second active layer, wherein the first active layer and the second active layer are located in a same layer, and a material of the first active layer is different from that of the second active layer.
    Type: Grant
    Filed: January 3, 2019
    Date of Patent: November 9, 2021
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Yanan Niu, Jiushi Wang, Lei Chen, Hongwei Tian, Zhanfeng Cao, Feng Guan, Feng Zhang, Shi Shu, Kuanjun Peng, Yichi Zhang, Qi Qi
  • Publication number: 20210225975
    Abstract: A display substrate is provided. The display substrate includes a substrate (1), a first transistor (2) and a second transistor (3) on the substrate (1), directions of intrinsic threshold voltage shifts of the first transistor (2) and the second transistor (3) being opposite; and a shift adjustment structure (4) on the substrate (1). The shift adjustment structure (4) may be configured to input adjustment signals to the first transistor (2) and the second transistor (3) respectively to make threshold voltages of the first transistor (2) and the second transistor (3) shift in directions opposite to the directions of their intrinsic threshold voltage shifts respectively.
    Type: Application
    Filed: November 26, 2019
    Publication date: July 22, 2021
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yanan Niu, Jiushi Wang, Zhanfeng Cao, Qi Yao, Feng Zhang, Wusheng Li, Feng Guan, Lei Chen, Hongwei Tian
  • Publication number: 20210225877
    Abstract: The present disclosure provides a display substrate and a manufacturing method thereof, and a display device. In the display substrate of the present disclosure, a first transistor comprises a first gate electrode, a first electrode, a second electrode, and a first active layer; and a second transistor comprises a second gate electrode, a third electrode, a fourth electrode, and a second active layers, wherein the first active layer comprises a silicon material, the second active layer comprises an oxide semiconductor material, and wherein the third electrode and the first gate electrode are disposed in the same layer, and the fourth electrode and the first electrode, the second electrodes are disposed in the same layer.
    Type: Application
    Filed: December 19, 2019
    Publication date: July 22, 2021
    Inventors: Yanan NIU, Kuanjun PENG, Jiushi WANG, Zhanfeng CAO, Feng ZHANG, Qi YAO, Wusheng LI, Feng GUAN, Lei CHEN, Jintao PENG, Tingting ZHOU
  • Publication number: 20210226079
    Abstract: A PIN device includes: a first doped layer, a second doped layer, and an intrinsic layer between the first doped layer and the second doped layer, where the second doped layer includes a body portion and an electric field isolating portion at least partially enclosing the body portion; and the electric field isolating portion is doped differently from the body portion.
    Type: Application
    Filed: December 19, 2019
    Publication date: July 22, 2021
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Guoqiang WANG, Jiushi WANG, Qingzhao LIU
  • Publication number: 20210226091
    Abstract: A light-emitting unit and a method for manufacturing the same are provided. The light-emitting unit includes a first semiconductor layer, a light-emitting layer and a second semiconductor layer that are distributed in a stacking manner. At least one of the first semiconductor layer or the second semiconductor layer is at least in contact with a part of layer surfaces and a part of side of the light-emitting layer, the first semiconductor layer is insulated from the second semiconductor layer, and one of the first semiconductor layer and the second semiconductor layer is an N-type semiconductor layer, and the other is a P-type semiconductor layer. The present disclosure is conducive to increasing the light-emitting area and the light extraction efficiency of the light-emitting unit.
    Type: Application
    Filed: October 29, 2019
    Publication date: July 22, 2021
    Inventors: Guoqiang Wang, Jiushi Wang, Qingzhao Liu