Patents by Inventor Jiushi WANG

Jiushi WANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11022736
    Abstract: An embodiment of this disclosure discloses a metal wire grid comprising: a patterned metal layer and a patterned antireflective layer located on the patterned metal layer, wherein a surface of the antireflective layer distal to the patterned metal layer has a plurality of continuous pits. Embodiments of this disclosure further disclose a method of manufacturing a metal wire grid and a display panel.
    Type: Grant
    Filed: May 10, 2019
    Date of Patent: June 1, 2021
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Qingzhao Liu, Jiushi Wang, Shuilang Dong, Guoqiang Wang
  • Patent number: 10923512
    Abstract: The embodiments of the present disclosure provide an array substrate, a preparation method thereof, and a display device. The preparation method of an array substrate comprises: forming the active layer, a gate insulating layer, the gate metal layer and the patterned photoresist sequentially on a substrate; forming a gate electrode transition pattern by etching a gate metal layer via a patterned photoresist, using a wet etching process and a dry etching process sequentially; and doping an area of the active layer not sheltered by the gate electrode transition pattern with ions to form a heavily doped area of the active layer.
    Type: Grant
    Filed: April 18, 2018
    Date of Patent: February 16, 2021
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Qingzhao Liu, Jiushi Wang, Da Lu
  • Publication number: 20210013153
    Abstract: In embodiments of the present disclosure, there is provided a display substrate assembly including: a base substrate; a light shielding layer on the base substrate; and an active layer of a thin film transistor, above the base substrate. An orthographic projection of the active layer on the base substrate in a thickness direction of the base substrate is within an orthographic projection of the light shielding layer on the base substrate in the thickness direction of the base substrate, and the light shielding layer includes an ion-doped amorphous silicon layer. In embodiments of the present disclosure, there is also provided a method of manufacturing a display substrate assembly and a display apparatus including the display substrate assembly.
    Type: Application
    Filed: December 14, 2017
    Publication date: January 14, 2021
    Inventors: Qi Yao, Zhanfeng Cao, Feng Zhang, Jiushi Wang
  • Publication number: 20200286926
    Abstract: The present disclosure provides a display backplane and a method for manufacturing the same, a display panel, and a display device. The display backplane includes: a substrate; a first thin film transistor located on one side of the substrate; and a second thin film transistor located on the one side of the substrate, wherein: the first thin film transistor comprises a first active layer, the second thin film transistor comprises a second active layer, wherein the first active layer and the second active layer are located in a same layer, and a material of the first active layer is different from that of the second active layer.
    Type: Application
    Filed: January 3, 2019
    Publication date: September 10, 2020
    Inventors: Yanan NIU, Jiushi WANG, Lei CHEN, Hongwei TIAN, Zhanfeng CAO, Feng GUAN, Feng ZHANG, Shi SHU, Kuanjun PENG, Yichi ZHANG, Qi QI
  • Publication number: 20200174172
    Abstract: The present disclosure provides a polarizing device and a method for preparing the same, a display substrate, and a display device. The polarizing device includes: a base substrate, a metal wire grid, and an anti-reflection layer, in which the metal wire grid is arranged on the base substrate, the anti-reflection layer is arranged on the surface of the metal wire grid away from the base substrate, and the anti-reflection layer is a carbon film layer.
    Type: Application
    Filed: May 9, 2019
    Publication date: June 4, 2020
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Shuilang Dong, Da Lu, Qingzhao Liu, Guoqiang Wang, Zhanfeng Cao, Jiushi Wang
  • Publication number: 20200166683
    Abstract: An embodiment of this disclosure discloses a metal wire grid comprising: a patterned metal layer and a patterned antireflective layer located on the patterned metal layer, wherein a surface of the antireflective layer distal to the patterned metal layer has a plurality of continuous pits. Embodiments of this disclosure further disclose a method of manufacturing a metal wire grid and a display panel.
    Type: Application
    Filed: May 10, 2019
    Publication date: May 28, 2020
    Inventors: Qingzhao LIU, Jiushi WANG, Shuilang DONG, Guoqiang WANG
  • Publication number: 20200119120
    Abstract: An array substrate includes a base substrate and a plurality of pixel units disposed on a base substrate, and at least one pixel unit includes a plurality of thin film transistors, a first electrode, and a second electrode. The plurality of thin film transistors include at least one first thin film transistor including a first active pattern, a first gate, a first source and a first drain. The first electrode is disposed in a same layer as the first active pattern, the first electrode is coupled to the first drain, and the second electrode is disposed in a same layer as the first gate. Orthographic projections of any two in a group consisting of the first electrode, the second electrode, and the first drain on the base substrate have an overlapping region.
    Type: Application
    Filed: December 12, 2019
    Publication date: April 16, 2020
    Inventors: Jing FENG, Dongsheng YIN, Ce NING, Jiushi WANG
  • Patent number: 10483129
    Abstract: The disclosure discloses a method for roughening a surface of a metal layer, a thin film transistor, and a method for fabricating the same. The method for roughening the surface of a metal layer includes: forming a first photo-resist layer on the surface of the metal layer, and processing the first photo-resist layer at high temperature; and stripping the first photo-resist layer to roughen the surface of the metal layer.
    Type: Grant
    Filed: September 27, 2017
    Date of Patent: November 19, 2019
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Jing Feng, Seung Jin Choi, Fangzhen Zhang, Wusheng Li, Zhijun Lv, Ce Ning, Jiushi Wang
  • Patent number: 10468271
    Abstract: A dry etching method, including: etching a silicon-containing thin film with a first gas by a first preset thickness; etching the silicon-containing thin film with a second gas by a second preset thickness, to remove etching residues generated after etching the silicon-containing thin film by the first preset thickness; after the etching residues are removed, etching the silicon-containing thin film with the first gas by a third preset thickness, which is less than the first preset thickness; wherein the first gas includes chlorine gas, and the second gas includes fluoride gas.
    Type: Grant
    Filed: August 22, 2018
    Date of Patent: November 5, 2019
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Qingzhao Liu, Jiushi Wang, Lei Zhao
  • Patent number: 10461178
    Abstract: A method for manufacturing an array substrate, an array substrate and a display panel are provided. The method includes forming patterns of a gate metal layer and a gate insulating layer successively on a base plate, forming a pattern of a semiconductor layer, where the pattern of the semiconductor layer comprises a pattern of an active region and a pattern of a pixel electrode region, the semiconductor layer comprises an insulative oxide layer and a semiconductive oxide layer stacked on the insulative oxide layer, and the insulative oxide layer is located between the gate insulating layer and the semiconductive oxide layer, forming a pattern of a source and drain metal layer, and subjecting the semiconductive oxide layer in the pixel electrode region to plasma treatment, to convert the semiconductive oxide layer in the pixel electrode region into a conductor.
    Type: Grant
    Filed: July 25, 2016
    Date of Patent: October 29, 2019
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Shi Shu, Jing Feng, Chuanxiang Xu, Xiaolong He, Jiushi Wang
  • Publication number: 20190080928
    Abstract: A dry etching method, including: etching a silicon-containing thin film with a first gas by a first preset thickness; etching the silicon-containing thin film with a second gas by a second preset thickness, to remove etching residues generated after etching the silicon-containing thin film by the first preset thickness; after the etching residues are removed, etching the silicon-containing thin film with the first gas by a third preset thickness, which is less than the first preset thickness; wherein the first gas includes chlorine gas, and the second gas includes fluoride gas.
    Type: Application
    Filed: August 22, 2018
    Publication date: March 14, 2019
    Inventors: Qingzhao LIU, Jiushi WANG, Lei ZHAO
  • Publication number: 20190051677
    Abstract: The embodiments of the present disclosure provide an array substrate, a preparation method thereof, and a display device. The preparation method of an array substrate comprises: forming the active layer, a gate insulating layer, the gate metal layer and the patterned photoresist sequentially on a substrate; forming a gate electrode transition pattern by etching a gate metal layer via a patterned photoresist, using a wet etching process and a dry etching process sequentially; and doping an area of the active layer not sheltered by the gate electrode transition pattern with ions to form a heavily doped area of the active layer.
    Type: Application
    Filed: April 18, 2018
    Publication date: February 14, 2019
    Inventors: Qingzhao Liu, Jiushi Wang, Da Lu
  • Patent number: 10205029
    Abstract: A TFT, a manufacturing method thereof, and a display device are provided. The TFT includes a semiconductor layer and an etch-stop layer merely covering a channel region of the semiconductor layer. The semiconductor layer and the etch-stop layer are formed through a single patterning process.
    Type: Grant
    Filed: January 19, 2016
    Date of Patent: February 12, 2019
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jiushi Wang, Dalin Cui
  • Patent number: 10126544
    Abstract: A display panel includes a first substrate and a second substrate which are arranged opposed to each other. The space between the first substrate and the second substrate is separated into a plurality of sub-pixel regions. Within each sub pixel region, a first electrode, a first fluid layer, a second fluid layer, a hydrophobic dielectric layer and a second electrode are arranged in this order. The first fluid layer is made of hydrophilic liquid. The second fluid layer is made of ink. When no electric field is applied between the first electrode and the second electrode, the ink spreads over the surface of the hydrophobic dielectric layer. When an electric field is applied between the first electrode and the second electrode, the ink aggregates to expose the hydrophobic dielectric layer.
    Type: Grant
    Filed: July 22, 2016
    Date of Patent: November 13, 2018
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xiaolong He, Zhanfeng Cao, Qi Yao, Bin Zhang, Zhengliang Li, Wei Zhang, Tingting Zhou, Jincheng Gao, Jiushi Wang
  • Publication number: 20180308958
    Abstract: A method for manufacturing an array substrate, an array substrate and a display panel are provided. The method includes forming patterns of a gate metal layer and a gate insulating layer successively on a base plate, forming a pattern of a semiconductor layer, where the pattern of the semiconductor layer comprises a pattern of an active region and a pattern of a pixel electrode region, the semiconductor layer comprises an insulative oxide layer and a semiconductive oxide layer stacked on the insulative oxide layer, and the insulative oxide layer is located between the gate insulating layer and the semiconductive oxide layer, forming a pattern of a source and drain metal layer, and subjecting the semiconductive oxide layer in the pixel electrode region to plasma treatment, to convert the semiconductive oxide layer in the pixel electrode region into a conductor.
    Type: Application
    Filed: July 25, 2016
    Publication date: October 25, 2018
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Shi SHU, Jing FENG, Chuanxiang XU, Xiaolong HE, Jiushi WANG
  • Publication number: 20180239196
    Abstract: Provided are a color film, a substrate and a display device. The color film is used for transmitting a light with one color of three primary colors, and comprises a first absorbing pigment and a second absorbing pigment, wherein absorption spectrum ranges of the first and second absorbing pigments correspond to spectral bands of lights with the other two colors of the three primary colors respectively.
    Type: Application
    Filed: April 27, 2017
    Publication date: August 23, 2018
    Inventors: Tingting Zhou, Bin Zhang, Xiaolong He, Yonglian Qi, Jiushi Wang
  • Publication number: 20180226269
    Abstract: The disclosure discloses a method for roughening a surface of a metal layer, a thin film transistor, and a method for fabricating the same. The method for roughening the surface of a metal layer includes: forming a first photo-resist layer on the surface of the metal layer, and processing the first photo-resist layer at high temperature; and stripping the first photo-resist layer to roughen the surface of the metal layer.
    Type: Application
    Filed: September 27, 2017
    Publication date: August 9, 2018
    Inventors: Jing Feng, Seung Jin Choi, Fangzhen Zhang, Wusheng Li, Zhijun Lv, Ce Ning, Jiushi Wang
  • Publication number: 20180219105
    Abstract: A TFT, a manufacturing method thereof, and a display device are provided. The TFT includes a semiconductor layer and an etch-stop layer merely covering a channel region of the semiconductor layer. The semiconductor layer and the etch-stop layer are formed through a single patterning process.
    Type: Application
    Filed: January 19, 2016
    Publication date: August 2, 2018
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jiushi WANG, Dalin CUI
  • Publication number: 20180190681
    Abstract: The present disclosure provides an array substrate and a method for manufacturing the same and a display panel and a display device comprising the same. The method for manufacturing the array substrate provided in the present disclosure comprises: forming a first metal layer; forming an uneven structure on a surface of the first metal layer; providing a photoresist on the surface of the first metal layer where the uneven structure has been formed; and exposing and developing the photoresist and etching the first metal layer so as to form a first metal pattern.
    Type: Application
    Filed: August 29, 2017
    Publication date: July 5, 2018
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jiushi WANG, Zhanfeng CAO, Qi YAO, Jing FENG
  • Patent number: 9972643
    Abstract: An array substrate and a fabrication method thereof, and a display device are provided. The array substrate comprises: a thin film transistor (TFT 10) provided on a base substrate (01), a first passivation layer (200) provided on the thin film transistor (TFT 10), and a transparent electrode layer (300) provided on a surface of the first passivation layer (200). The first passivation layer (300) includes: a first sub-thin film layer (210), and a second sub-thin film layer (211) which is provided on a surface of the first sub-thin film layer (210) and in contact with the transparent electrode layer (300); and a film density of the second sub-thin film layer (211) is greater than that of the first sub-thin film layer (210).
    Type: Grant
    Filed: April 20, 2015
    Date of Patent: May 15, 2018
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Zhijun LV, Ke Wang, Jiushi Wang, Fangzhen Zhang