Patents by Inventor John Edmond

John Edmond has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9157608
    Abstract: A dampener configured to augment the mounting of a lamp in a socket by resisting displacement of the lamp relative to the socket. The dampener is made from a material able to absorb vibrations and to reduce or prevent vibrations in the lamp. The dampener is made in one piece or more pieces, wherein each piece is interposable in whole or in part between the socket and the lamp base to insulate the lamp in whole or part against the vibration translated through the socket or surrounding air.
    Type: Grant
    Filed: March 29, 2011
    Date of Patent: October 13, 2015
    Assignee: AURALIGHT INTERNATIONAL AB
    Inventor: Martin John Edmond Dieleman
  • Patent number: 9159888
    Abstract: Methods for fabricating light emitting diode (LED) chips comprising providing a plurality of LEDs typically on a substrate. Pedestals are deposited on the LEDs with each of the pedestals in electrical contact with one of the LEDs. A coating is formed over the LEDs with the coating burying at least some of the pedestals. The coating is then planarized to expose at least some of the buried pedestals while leaving at least some of said coating on said LEDs. The exposed pedestals can then be contacted such as by wire bonds. The present invention discloses similar methods used for fabricating LED chips having LEDs that are flip-chip bonded on a carrier substrate and for fabricating other semiconductor devices. LED chip wafers and LED chips are also disclosed that are fabricated using the disclosed methods.
    Type: Grant
    Filed: September 7, 2007
    Date of Patent: October 13, 2015
    Assignee: Cree, Inc.
    Inventors: Ashay Chitnis, James Ibbetson, Bernd Keller, David T. Emerson, John Edmond, Michael J. Bergmann, Jasper S. Cabalu, Jeffrey C. Britt, Arpan Chakraborty, Eric Tarsa, Yankun Fu
  • Patent number: 9133509
    Abstract: The present invention relates to methods and kits for nucleic acid detection in an assay system.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: September 15, 2015
    Assignee: LGC Genomics Limited
    Inventors: Philip Steven Robinson, John Edmond Holme, Nisha Jain
  • Patent number: 9062083
    Abstract: The invention relates to radiation curable compositions comprising a liquid 0/s(acyl)phosphine photo initiators of formula (I): wherein each of Ar1, Ar2 and Ar3 is independently a substituted or unsubstituted aryl group. The invention also relates to stabilized forms of liquid bis(acyl)phosphines of formula (I) and radiation curable composition comprising said stabilized photoinitiators. The radiation curable compositions are selected from the group consisting of an optical fiber coating composition and a coating composition capable of radiation cure on concrete and a coating composition capable of radiation cure on metal.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: June 23, 2015
    Assignee: DSM IP ASSETS B.V.
    Inventors: Timothy Edward Bishop, Edward Joseph Murphy, John Edmond Southwell, Satyendra Sarmah, TaiYeon Lee
  • Patent number: 9062082
    Abstract: The invention relates to radiation curable compositions comprising a liquid 0/s(acyl)phosphine photo initiators of formula (Ï): wherein each of Ar1, Ar2 and Ar3 is independently a substituted or unsubstituted aryl group. The invention also relates to stabilized forms of liquid bis(acyl)phosphines of formula (I) and radiation curable composition comprising said stabilized photoinitiators. The radiation curable compositions are selected from the group consisting of an optical fiber coating composition and a coating composition capable of radiation cure on concrete and a coating composition capable of radiation cure on metal.
    Type: Grant
    Filed: June 21, 2011
    Date of Patent: June 23, 2015
    Assignee: DSM IP ASSETS B.V.
    Inventors: Timothy Edward Bishop, Edward Joseph Murphy, John Edmond Southwell, Satyendra Sarmah, TaiYeon Lee, John Monroe Zimmerman
  • Patent number: 8907366
    Abstract: Semiconductor light emitting devices, such as light emitting diodes, include a substrate, an epitaxial region on the substrate that includes a light emitting region such as a light emitting diode region, and a multilayer conductive stack including a current spreading layer, on the epitaxial region. A barrier layer is provided on the current spreading layer and extending on a sidewall of the current spreading layer. The multilayer conductive stack can also include an ohmic layer between the reflector and the epitaxial region. The barrier layer further extends on a sidewall of the ohmic layer. The barrier layer can also extend onto the epitaxial region outside the multilayer conductive stack. The barrier layer can be fabricated as a series of alternating first and second sublayers.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: December 9, 2014
    Assignee: Cree, Inc.
    Inventors: David B. Slater, Jr., Bradley E. Williams, Peter S. Andrews, John A. Edmond, Scott T. Allen
  • Publication number: 20140353878
    Abstract: A method and apparatus for additive fabrication which provides a substrate which helps the newly hardened resin layer to separate from the substrate while providing a substrate of appropriate strength and durability. In an embodiment, the substrate is a multi-layer substrate comprising a transport layer and a structural layer, the transport layer comprising a polyolefin or a fluoropolymer, and the structural layer comprising a semi-crystal line thermoplastic polymer.
    Type: Application
    Filed: June 15, 2012
    Publication date: December 4, 2014
    Applicant: DSM IP ASSETS B.V.
    Inventors: Marco Marcus Matheus Driessen, Michelle Elizabeth Seitz, Paulus Antonius Maria Steeman, John Edmond Southwell, Jigeng Xu, Richard Thomas, Micha Sandor Nicolaas Hubert Mulders
  • Patent number: 8877524
    Abstract: A method for fabricating light emitting diode (LED) chips comprising providing a plurality of LEDs, typically on a wafer, and coating the LEDs with a conversion material so that at least some light from the LEDs passes through the conversion material and is converted. The light emission from the LED chips comprises light from the conversion material, typically in combination with LED light. The emission characteristics of at least some of the LED chips is measured and at least some of the conversion material over the LEDs is removed to alter the emission characteristics of the LED chips. The invention is particularly applicable to fabricating LED chips on a wafer where the LED chips have light emission characteristics that are within a range of target emission characteristics. This target range can fall within an emission region on a CIE curve to reduce the need for binning of the LEDs from the wafer.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: November 4, 2014
    Assignee: Cree, Inc.
    Inventors: Ashay Chitnis, John Edmond, Jeffrey Carl Britt, Bernd P. Keller, David Todd Emerson, Michael John Bergmann, Jasper S. Cabalu
  • Patent number: 8866169
    Abstract: A light emitter package having increased feature sizes for improved luminous flux and efficacy. An emitter chip is disposed on a submount with a lens that covers the emitter chip. In some cases, the ratio of the width of the light emitter chip to the width of said lens in a given direction is 0.5 or greater. Increased feature sizes allow the package to emit light more efficiently. Some packages include submounts having square dimensions greater than 3.5 mm used in conjunction with larger emitter chips. Materials having higher thermal conductivities are used to fabricate the submounts, providing the package with better thermal management.
    Type: Grant
    Filed: April 9, 2010
    Date of Patent: October 21, 2014
    Assignee: Cree, Inc.
    Inventors: David Emerson, Brian Collins, Michael Bergmann, John Edmond, Eric Tarsa, Peter Andrews, Bernd Keller, Christopher Hussell, Amber Salter
  • Publication number: 20140268728
    Abstract: Light emitter components, systems, and related methods having improved optical efficiency and a lower manufacturing cost are disclosed. In one aspect, a light emitter component can include a substrate having an elongated body and first and second ends. At least a first trace and a second trace can be provided on the substrate. In some aspects, the first trace can be disposed proximate the first end of the substrate and the second trace can be disposed proximate the second end of the substrate, with no other portion of the first trace or second trace being disposed between the first and second ends of the substrate. In some aspects, a string of LED chips can be provided on the substrate. The string of LED chips can be disposed between the first and second ends of the substrate. Angled traces, gaps and light emitter components can also be provided in some aspects.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Applicant: CREE, INC.
    Inventors: Christopher P. Hussell, Sung Chul Joo, Erin Welch, Peter Scott Andrews, Joseph G. Clark, John A. Edmond, Jesse C. Reiherzer
  • Publication number: 20140256072
    Abstract: A submount for a light emitting device package includes a substrate with a first bond pad and a second bond pad on a first surface. The first bond pad includes a die attach region offset toward a first end of the substrate and configured to receive a light emitting diode. The second bond pad includes a bonding region between the first bond pad and the second end of the substrate and a second bond pad extension that extends from the bonding region along a side of the substrate toward a corner of the substrate at the first end of the substrate. First and second solder pads are on the second surface of the substrate. The first solder pad is adjacent the first end of the substrate and contacts the second bond pad. The second solder pad is adjacent the second end of the substrate and contacts the first bond pad.
    Type: Application
    Filed: May 22, 2014
    Publication date: September 11, 2014
    Applicant: Cree, Inc.
    Inventors: Ban P. Loh, Nathaniel O. Cannon, Norbert Hiller, John Edmond, Mitch Jackson, Nicholas W. Medendorp, JR.
  • Publication number: 20140217443
    Abstract: This disclosure relates to light emitting devices and methods of manufacture thereof, including side and/or multi-surface light emitting devices. Embodiments according to the present disclosure include the use of a functional layer, which can comprise a stand-off distance with one or more portions of the light emitter to improve the functional layer's stability during further device processing. The functional layer can further comprise winged portions allowing for the coating of the lower side portions of the light emitter to further interact with emitted light and a reflective layer coating on the functional layer to further improve light extraction and light emission uniformity. Methods of manufacture including methods utilizing virtual wafer structures are also disclosed.
    Type: Application
    Filed: October 14, 2013
    Publication date: August 7, 2014
    Inventors: Sten Heikman, James Ibbetson, Zhimin Jamie Yao, Fan Zhang, Matthew Donofrio, Christopher P. Hussell, John A. Edmond
  • Patent number: 8791491
    Abstract: A submount for a light emitting device package includes a substrate. A first bond pad and a second bond pad are on a first surface of the substrate. The first bond pad includes a die attach region offset toward a first end of the substrate and configured to receive a light emitting diode thereon. The second bond pad includes a bonding region between the first bond pad and the second end of the substrate and a second bond pad extension that extends from the bonding region along a side of the substrate toward a corner of the substrate at the first end of the substrate. First and second solder pads are a the second surface of the substrate. The first solder pad is adjacent the first end of the substrate and contacts the second bond pad. The second solder pad is adjacent the second end of the substrate and contacts the first bond pad. Related LED packages and methods of forming LED packages are disclosed.
    Type: Grant
    Filed: June 20, 2011
    Date of Patent: July 29, 2014
    Assignee: Cree, Inc.
    Inventors: Ban P. Loh, Nathaniel O. Cannon, Norbert Hiller, John Edmond, Mitch Jackson, Nicholas W. Medendorp, Jr.
  • Publication number: 20140167065
    Abstract: Embodiments of the present invention are generally related to LED chips having improved overall emission by reducing the light-absorbing effects of barrier layers adjacent mirror contacts. In one embodiment, a LED chip comprises one or more LEDs, with each LED having an active region, a first contact under the active region having a highly reflective mirror, and a barrier layer adjacent the mirror. The barrier layer is smaller than the mirror, such that it does not extend beyond the periphery of the mirror. In another possible embodiment, an insulator is further provided, with the insulator adjacent the barrier layer and adjacent portions of the mirror not contacted by the active region or by the barrier layer. In yet another embodiment, a second contact is provided on the active region.
    Type: Application
    Filed: February 20, 2014
    Publication date: June 19, 2014
    Applicant: CREE, INC.
    Inventors: Michael Bergmann, Matthew Donofrio, Sten Heikman, Kevin S. Schneider, Kevin W. Haberern, John A. Edmond
  • Patent number: 8704240
    Abstract: A light emitting device includes a p-type semiconductor layer, an n-type semiconductor layer and an active region between the p-type semiconductor layer and the n-type semiconductor layer. A bond pad is provided on one of the p-type semiconductor layer or the n-type semiconductor layer, opposite the active region, the bond pad being electrically connected to the one of the p-type semiconductor layer or the n-type semiconductor layer. A conductive finger extends from and is electrically connected to the bond pad. A reduced conductivity region is provided in the light emitting device that is aligned with the conductive finger. A reflector may also be provided between the bond pad and the reduced conductivity region. A reduced conductivity region may also be provided in the light emitting device that is not aligned with the bond pad.
    Type: Grant
    Filed: April 4, 2013
    Date of Patent: April 22, 2014
    Assignee: Cree, Inc.
    Inventors: David Todd Emerson, Kevin Haberern, Michael John Bergmann, David B. Slater, Jr., Matthew Donofrio, John Edmond
  • Patent number: 8686429
    Abstract: Embodiments of the present invention are generally related to LED chips having improved overall emission by reducing the light-absorbing effects of barrier layers adjacent mirror contacts. In one embodiment, a LED chip comprises one or more LEDs, with each LED having an active region, a first contact under the active region having a highly reflective mirror, and a barrier layer adjacent the mirror. The barrier layer is smaller than the mirror such that it does not extend beyond the periphery of the mirror. In another possible embodiment, an insulator is further provided, with the insulator adjacent the barrier layer and adjacent portions of the mirror not contacted by the active region or by the barrier layer. In yet another embodiment, a second contact is provided on the active region.
    Type: Grant
    Filed: June 24, 2011
    Date of Patent: April 1, 2014
    Assignee: Cree, Inc.
    Inventors: Michael Bergmann, Matthew Donofrio, Sten Heikman, Kevin S. Schneider, Kevin W. Haberern, John A. Edmond
  • Publication number: 20140048822
    Abstract: Semiconductor light emitting devices, such as light emitting diodes, include a substrate, an epitaxial region on the substrate that includes a light emitting region such as a light emitting diode region, and a multilayer conductive stack including a current spreading layer, on the epitaxial region. A barrier layer is provided on the current spreading layer and extending on a sidewall of the current spreading layer. The multilayer conductive stack can also include an ohmic layer between the reflector and the epitaxial region. The barrier layer further extends on a sidewall of the ohmic layer. The barrier layer can also extend onto the epitaxial region outside the multilayer conductive stack. The barrier layer can be fabricated as a series of alternating first and second sublayers.
    Type: Application
    Filed: October 30, 2013
    Publication date: February 20, 2014
    Applicant: Cree, Inc.
    Inventors: David B. Slater, JR., Bradley E. Williams, Peter S. Andrews, John A. Edmond, Scott T. Allen
  • Patent number: D711840
    Type: Grant
    Filed: June 11, 2012
    Date of Patent: August 26, 2014
    Assignee: Cree, Inc.
    Inventors: Theodore Lowes, Eric J. Tarsa, Sten Heikman, Bernd Keller, John A. Edmond, Jesse Reiherzer, Hormoz Benjamin
  • Patent number: D718258
    Type: Grant
    Filed: September 2, 2012
    Date of Patent: November 25, 2014
    Assignee: Cree, Inc.
    Inventors: Theodore Lowes, Eric J. Tarsa, Sten Heikman, Bernd Keller, John A. Edmond, Jesse Reiherzer, Hormoz Benjamin, Christopher P. Hussell
  • Patent number: D725613
    Type: Grant
    Filed: June 15, 2012
    Date of Patent: March 31, 2015
    Assignee: Cree, Inc.
    Inventors: Theodore Lowes, Eric J. Tarsa, Sten Heikman, Bernd Keller, John A. Edmond, Jesse Reiherzer, Hormoz Benjamin