Patents by Inventor John S. Fitch

John S. Fitch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6484975
    Abstract: A system for improving the uniformity of ink droplets delivered from a plurality of droplet sources on a printhead is described. The system includes a cooling system that compensates for nonuniform heating effects in a printhead which results in nonuniform temperatures. The distribution of the cooling system, and the effectiveness of the cooling system is set to maintain an approximately uniform ink temperature across the printhead.
    Type: Grant
    Filed: October 28, 1999
    Date of Patent: November 26, 2002
    Assignee: Xerox Corporation
    Inventors: Scott A. Elrod, Joy Roy, Richard G. Stearns, John S. Fitch
  • Patent number: 6464337
    Abstract: This invention relates to a method and apparatus for acoustic ink printing using a bilayer configuration. More particularly, the invention concerns an acoustically actuated droplet emitter which is provided with a continuous, high velocity, laminar flow of cooling liquid in addition to a stagnant pool of liquid to be emitted as droplets.
    Type: Grant
    Filed: January 31, 2001
    Date of Patent: October 15, 2002
    Assignee: Xerox Corporation
    Inventors: Joy Roy, Scott A. Elrod, Donald L. Smith, Jerry Elkin, John S. Fitch
  • Publication number: 20020101478
    Abstract: This invention relates to a method and apparatus for acoustic ink printing using a bilayer configuration. More particularly, the invention concerns an acoustically actuated droplet emitter which is provided with a continuous, high velocity, laminar flow of cooling liquid in addition to a stagnant pool of liquid to be emitted as droplets.
    Type: Application
    Filed: January 31, 2001
    Publication date: August 1, 2002
    Applicant: XEROX CORPORATION
    Inventors: Joy Roy, Scott A. Elrod, Donald L. Smith, Jerry Elkin, John S. Fitch
  • Patent number: 6208513
    Abstract: In a semiconductor package, a die has electrical circuits formed on a first side surface. A lead frame for connecting the electrical circuits to a power source is connected to the electrical circuits of the die. A package body made of a dielectric material is formed around the die and the lead frame. One or more fins made of a thermally conductive material are independently attached to the die by a thermally conductive bond. The fins, receive heat directly from the die, and dissipate the heat by radiative or convection cooling into the surrounding environment.
    Type: Grant
    Filed: January 17, 1995
    Date of Patent: March 27, 2001
    Assignee: Compaq Computer Corporation
    Inventors: John S. Fitch, William R. Hamburgen
  • Patent number: 6149123
    Abstract: Integrated, electrically operable micro-valves are formed to control fluid flow and pressure. These valves convert electrical energy to mechanical energy through an energy conversion device having a sealed cavity with a flexible wall. The sealed cavity contains a fluid that expands and contracts as it is heated or cooled, thus causing the flexible wall to move. Movement of this wall or membrane is used to move a valve element and dynamically control the opening or closing of a valve port over a predetermined range.
    Type: Grant
    Filed: September 25, 1997
    Date of Patent: November 21, 2000
    Assignee: Redwood Microsystems, Inc.
    Inventors: James M. Harris, Bradford A. Cozad, Dean Allyn Hopkins, Jr., John S. Fitch
  • Patent number: 6138748
    Abstract: In order to provide a thermal coupling between a heat source and a heat sink, an interleaved-fin connector is provided. The connector comprises first and second substrates. The first substrate includes a first surface. A plurality of first channels are etched on the first surface to form a plurality of first fins and a first base. The first base can be thermally engaged with the heat source. The second substrate includes a second surface having a plurality of second channels etched therein. The second channels form a plurality of second fins and a second base. The second base can be thermally engaged with the heat sink. The first and second fins providing a thermally conductive path from the heat source to the heat sink when interleaved with each other.
    Type: Grant
    Filed: November 14, 1997
    Date of Patent: October 31, 2000
    Assignee: Digital Equipment Corporation
    Inventors: William R. Hamburgen, John S. Fitch, Robert A. Eustace
  • Patent number: 6034430
    Abstract: In order to provide a thermal coupling between a heat source and a heat sink, an integrated interleaved-fin connector is provided. A first substrate includes a first side surface and a second side surface. A plurality of heat generating devices are formed in the first side surface. A plurality of first channels are etched in the second side surface to form a plurality of first fins. A second substrate has a plurality of second channels etched therein to form a plurality of second fins and a base. The base is for thermally engaging with a heat sink. The first and second fins providing a thermally conductive path from the heat generating devices to the heat sink when interleaved with each other.
    Type: Grant
    Filed: November 14, 1997
    Date of Patent: March 7, 2000
    Assignee: Digital Equipment Corporation
    Inventors: William R. Hamburgen, John S. Fitch
  • Patent number: 5948689
    Abstract: In order to provide a thermal coupling between a heat source and a heat sink, an integrated interleaved-fin connector is provided. A first substrate includes a first side surface and a second side surface. A plurality of heat generating devices are formed in the first side surface. A plurality of first channels are etched in the second side surface to form a plurality of first fins. A second substrate has a plurality of second channels etched therein to form a plurality of second fins and a base. The base is for thermally engaging with a heat sink. The first and second fins providing a thermally conductive path from the heat generating devices to the heat sink when interleaved with each other.
    Type: Grant
    Filed: November 14, 1997
    Date of Patent: September 7, 1999
    Assignee: Digital Equipment Corporation
    Inventors: William R. Hamburgen, John S. Fitch
  • Patent number: 5865417
    Abstract: A genus of integrated valves having an integrated actuator with a thin, flexible membrane formed of silicon driven by pressure of a fluid trapped in a cavity formed by bonding a first and second die. The cavity has a resistor formed therein through which current is driven to cause the pressure to rise and the flexible membrane to flex. Movement of membrane is used to drive a valve element to a position where it unblocks a port to open the valve. This genus includes species such as ultra clean embodiments where a containment barrier keeps ultra clean processing gases confined to a wetted area having materials and bonding agents selected so as to be chemically compatible with the materials and conditions in the wetted area. Low leak species include a compliant material for a valve seat which is deformed by a ridge surrounding a port in the closed position. It is this port which is blocked and unblocked by movement of the valve element to close and open the valve.
    Type: Grant
    Filed: September 27, 1996
    Date of Patent: February 2, 1999
    Assignee: Redwood Microsystems, Inc.
    Inventors: James M. Harris, John S. Fitch, Bradford A. Cozad, Dean Allyn Hopkins, Jr.
  • Patent number: 5838065
    Abstract: In order to provide a thermal coupling between a heat source and a heat sink, an integrated interleaved-fin connector is provided. A first substrate includes a first side surface and a second side surface. A plurality of heat generating devices are formed in the first side surface. A plurality of first channels are etched in the second side surface to form a plurality of first fins. A second substrate has a plurality of second channels etched therein to form a plurality of second fins and a base. The base is for thermally engaging with a heat sink. The first and second fins providing a thermally conductive path from the heat generating devices to the heat sink when interleaved with each other.
    Type: Grant
    Filed: July 1, 1996
    Date of Patent: November 17, 1998
    Assignee: Digital Equipment Corporation
    Inventors: William R. Hamburgen, John S. Fitch
  • Patent number: 5787976
    Abstract: In order to provide a thermal coupling between a heat source and a heat sink, an interleaved-fin connector is provided. The connector comprises first and second substrates. The first substrate includes a first surface. A plurality of first channels are etched on the first surface to form a plurality of first fins and a first base. The first base can be thermally engaged with the heat source. The second substrate includes a second surface having a plurality of second channels etched therein. The second channels form a plurality of second fins and a second base. The second base can be thermally engaged with the heat sink. The first and second fins providing a thermally conductive path from the heat source to the heat sink when interleaved with each other.
    Type: Grant
    Filed: July 1, 1996
    Date of Patent: August 4, 1998
    Assignee: Digital Equipment Corporation
    Inventors: William R. Hamburgen, John S. Fitch, Robert A. Eustace
  • Patent number: 5629840
    Abstract: Power bus bars are provided for a semiconductor die. Power bus bars are thick electrical conductors that extend the length of the die in an electrically isolated array of stripes. The electrical stripes are divided into two or more interdigitated groups, each group connected to a power supply, or connected to a ground supply. This arrangement of alternate power and ground stripes minimizes inductance and resistance, and brings power and ground close to every transistor in the semiconductor die with minimized voltage variations.
    Type: Grant
    Filed: March 28, 1994
    Date of Patent: May 13, 1997
    Assignee: Digital Equipment Corporation
    Inventors: William R. Hamburgen, John S. Fitch, Norman P. Jouppi
  • Patent number: 5604376
    Abstract: Disclosed is a semiconductor package and method in which a semiconductor chip is mounted within the opening of a lead frame by bonding wires extending between the active front side of the chip and bonding pads of the lead frame, and the lead frame/chip assembly is encased. within a plastic molded body, with the inactive back side of the chip exposed and facing outside the package.
    Type: Grant
    Filed: June 30, 1994
    Date of Patent: February 18, 1997
    Assignee: Digital Equipment Corporation
    Inventors: William R. Hamburgen, John S. Fitch, Yezdi N. Dordi
  • Patent number: 5582242
    Abstract: A thermosiphon provides cooling for a high powered die. The thermosiphon includes a fuse for accommodating temperature fault conditions. The thermosiphon utilizes a water and alcohol mixture for improved boiling characteristics. Contaminants at the joint betweeen the thermosiphon and the package housing are reduced by the use of a shrink ring seal. Thermal interfaces between the die and the thermosiphon are eliminated by directly coupling the die to the thermosiphon.
    Type: Grant
    Filed: May 4, 1995
    Date of Patent: December 10, 1996
    Assignee: Digital Equipment Corporation
    Inventors: William R. Hamburgen, John S. Fitch, Norman P. Jouppi
  • Patent number: 5445697
    Abstract: A fixture (10) for bonding multiple components together includes a bottom plate (20), a middle plate (22) and a top plate (24). The plates (20), (22) and (24) are aligned by dowels (26) and clamps (30). Bottom plate (20) has a rectangular pocket (32) for holding heat sink (14) and alignment pins (34) for locating plastic pin grid array (PPGA) package (12) over the heat sink (14). An annular projection (40 ) covered with a conformal pad (42) extends from bottom surface (44) of the middle plate (22). Dowel (50) extends through openings (46) and (36) in the top and middle plates (24) and (22) to apply pressure to chip (16). A first spring (56) is mounted on the dowel (50) and compressed between the top plate (24) and a snap ring (58) to provide pressure from the dowel (50 ) on the chip (16). A second, larger diameter spring (60) is compressed between the middle plate (22) and the top plate (24) to provide pressure from the middle plate (22) on the PPGA (12).
    Type: Grant
    Filed: June 30, 1993
    Date of Patent: August 29, 1995
    Assignee: Digital Equipment Corporation
    Inventors: John S. Fitch, William R. Hamburgen
  • Patent number: 5386143
    Abstract: Integrated circuit package (10) includes a substrate (12) comprising a porous ceramic body (14). A non-porous covering (16) provides a hermetic seal around the porous ceramic body (14). A heat transfer liquid (18) partially fills pores (30) of the porous ceramic body (14). A plurality of integrated circuit chips (20) are attached to a surface of the substrate (12) by epoxy, solder or other bonds (22). On an opposite surface, the substrate (12) includes a plurality of heat transfer fins (24). In use, the heat transfer liquid (18) in the ceramic body (14) is vaporized to fill the balance of the pores (30) and condensed in a continuous heat pipe cycle to remove heat from the integrated circuits (20) mounted on the substrate.
    Type: Grant
    Filed: September 30, 1993
    Date of Patent: January 31, 1995
    Assignee: Digital Equipment Corporation
    Inventor: John S. Fitch
  • Patent number: 5247426
    Abstract: An apparatus for removing heat from a semiconductor is disclosed. The apparatus is a non-uniform thermal conductance structure which includes high thermal conductance regions and low thermal conductance regions. The apparatus is coupled to the semiconductor in such a manner that the high power density, and thus high temperature, regions on the semiconductor are aligned with the high thermal conductance regions of the apparatus, and low power density, and thus low temperature, regions on the semiconductor are aligned with the low thermal conductance regions of the apparatus. As a result, a desirable temperature profile may be established across the surface of the semiconductor.
    Type: Grant
    Filed: June 12, 1992
    Date of Patent: September 21, 1993
    Assignee: Digital Equipment Corporation
    Inventors: William R. Hamburgen, John S. Fitch
  • Patent number: 5243756
    Abstract: A device for hermetically protecting integrated circuits is disclosed. The device includes a plastic housing which has a cavity. The cavity forms an opening at the top of the housing and extends toward the bottom of the housing where a metallic slug is positioned. The cavity also includes one or more bond shelves descending from the top of the housing toward the bottom of the housing. The bond shelves support conducting bond pads which are coupled to connecting pins which extend from the housing. An integrated circuit with a number of integrated circuit bond pads is attached by an epoxy to the bottom of the cavity. Bond wires couple the integrated circuit bond pads and the bond shelf pads. A liquid is dispensed in the cavity such that the liquid extends from the bottom of the cavity to a position above the bond wires. A properly selected liquid provides protection for the integrated circuit and its electrical connections.
    Type: Grant
    Filed: April 2, 1992
    Date of Patent: September 14, 1993
    Assignee: Digital Equipment Corporation
    Inventors: William R. Hamburgen, John S. Fitch
  • Patent number: 5240549
    Abstract: A fixture (10) for bonding multiple components together includes a bottom plate (20), a middle plate (22) and a top plate (24). The plates (20), (22) and (24) are aligned by dowels (26) and clamps (30). Bottom plate (20) has a rectangular pocket (32) for holding heat sink (14) and alignment pins (34) for locating plastic pin grid array (PPGA) package (12) over the heat sink (14). An annular projection (40) covered with a conformal pad (42) extends from bottom surface (44) of the middle plate (22). Dowel (50) extends through openings (46) and (36) in the top and middle plates (24) and (22) to apply pressure to chip (16). A first spring (56) is mounted on the dowel (50) and compressed between the top plate (24) and a snap ring (58) to provide pressure from the dowel (50) on the chip (16). A second, larger diameter spring (60) is compressed between the middle plate (22) and the top plate (24) to provide pressure from the middle plate (22) on the PPGA (12).
    Type: Grant
    Filed: June 28, 1991
    Date of Patent: August 31, 1993
    Assignee: Digital Equipment Corporation
    Inventors: William Hamburgen, John S. Fitch
  • Patent number: 5203401
    Abstract: A wet micro-channel wafer chuck (10) holds a semiconductor wafer 12 having a plurality of high powered chips (14) held in place with vacuum provided in the chuck (10). The chuck (10) has a plurality of micro-channels (16), which extend along cooling fins (18), on which the semiconductor wafer (12) rests when it is held in place on the chuck. A water supply manifold (20) extends perpendicular to the micro-channels (16) across the chuck (10). Water supply slot (22) extends upward from the water supply manifold into the micro-channels (16). Similarly, water exit slots (24) extend upward from water exit manifolds (26) into the micro-channels (16). Water (28) is delivered from pump (30) of an external recirculator/chiller (32) to the supply manifold (20) and into the many micro-channels (16) that pass under the wafer (12) under test. The water (28) leaves the micro-channels (16), enters the exit slots (24) and then the exit manifolds (26), from which it is returned to the recirculator/chiller (32).
    Type: Grant
    Filed: May 22, 1992
    Date of Patent: April 20, 1993
    Assignee: Digital Equipment Corporation
    Inventors: William R. Hamburgen, John S. Fitch