Abstract: The present invention relates to an enzyme-containing polymer of 2-amino monosaccharide, preferably an enzyme-containing chitosan, comprising: a first repeating unit of the following Formula 1a: a second repeating unit of the following Formula 1b: and a third repeating unit of the following Formula 1c: or conjugate salts thereof, wherein all the substituents are as defined herein. There is also provided a redox polymer and the methods of preparing the enzyme-containing polymer and the redox polymer. The present invention also relates to a sensor, a method of manufacturing the sensor, a monitor, methods for monitoring failure of a tissue and uses of the sensor comprising the enzyme-containing polymer, and the monitor thereof.

Abstract: A method of imaging tissue of a subject using an electronic rolling shutter imager includes sequentially resetting rows of pixels of the rolling shutter imager from a first row to a last row, sequentially reading charge accumulated at the rows of pixels from the first row to the last row, wherein the first row is read after resetting the last row, illuminating the tissue of the subject with illumination light for an illumination period that lasts longer than a vertical blanking period, wherein the vertical blanking period is the period from the resetting of the last row to the reading of the first row, and generating an image frame from the readings of charge accumulated at the rows of pixels, wherein at least one reading of charge accumulated at a row of pixels is removed or replaced to generate the image frame.

Abstract: Anti-fogging system for an endoscope including an endoscope having an outer housing, an imaging arrangement, and a distal window. A filter lens is located at the distal window, with the filter lens allowing a first portion of electromagnetic light to pass therethrough while absorbing a second portion of electromagnetic light in order to heat the filter lens.

Abstract: A solid-state circuit breaker and method of use. The circuit breaker includes current and voltage sensors, a power converter, and a digital signal processor. The digital signal processor operates the power converter between three operation states: a first operation state being an on state, a second operation state being an off state, and a third operation state being a current limiting state. The circuit breaker includes an overcurrent detection circuit to detect overcurrent conditions, and turn off the power converter if a load current exceeds a preset threshold. The method of operation includes operating the circuit breaker with a limited amount of overcurrent, and returning the circuit breaker to the normal operation state from the third operation state if the overcurrent condition is removed, or returning the circuit breaker to an off state from the third operation state if the overcurrent condition is sustained.

Abstract: A system for displaying medical imaging data comprising one or more data inputs, one or more processors, and one or more displays, wherein the one or more data inputs are configured for receiving first image data generated by a first medical imaging device, wherein the first image data comprises a field of view (FOV) portion and a non-FOV portion, and the one or more processors are configured for identifying the non-FOV portion of the first image data and generating cropped first image data by removing at least a portion of the non-FOV portion of the first image data, and transmitting the cropped first image data for display in a first portion of the display and additional information for display in a second portion of the display.

Abstract: Anti-fogging system for an endoscope including an endoscope having an outer housing, an imaging arrangement, and a distal window. A filter lens is located at the distal window, with the filter lens allowing a first portion of electromagnetic light to pass therethrough while absorbing a second portion of electromagnetic light in order to heat the filter lens.

Abstract: In an embodiment, a method is provided. The method includes managing user-level threads on a first instruction sequencer in response to executing user-level instructions on a second instruction sequencer that is under control of an application level program. A first user-level thread is run on the second instruction sequencer and contains one or more user level instructions. A first user level instruction has at least 1) a field that makes reference to one or more instruction sequencers or 2) implicitly references with a pointer to code that specifically addresses one or more instruction sequencers when the code is executed.

Abstract: Embodiments of the invention provide a method of creating, based on an operating-system-scheduled thread running on an operating-system-visible sequencer and using an instruction set extension, a persistent user-level thread to run on an operating-system-sequestered sequencer independently of context switch activities on the operating-system-scheduled thread. The operating-system-scheduled thread and the persistent user-level thread may share a common virtual address space. Embodiments of the invention may also provide a method of causing a service thread running on an additional operating-system-visible sequencer to provide operating system services to the persistent user-level thread. Embodiments of the invention may further provide apparatus, system, and machine-readable medium thereof.

Abstract: Embodiments of the invention provide a method of creating, based on an operating-system-scheduled thread running on an operating-system-visible sequencer and using an instruction set extension, a persistent user-level thread to run on an operating-system-sequestered sequencer independently of context switch activities on the operating-system-scheduled thread. The operating-system-scheduled thread and the persistent user-level thread may share a common virtual address space. Embodiments of the invention may also provide a method of causing a service thread running on an additional operating-system-visible sequencer to provide operating system services to the persistent user-level thread. Embodiments of the invention may further provide apparatus, system, and machine-readable medium thereof.

Abstract: In an embodiment, a method is provided. The method includes managing user-level threads on a first instruction sequencer in response to executing user-level instructions on a second instruction sequencer that is under control of an application level program. A first user-level thread is run on the second instruction sequencer and contains one or more user level instructions. A first user level instruction has at least 1) a field that makes reference to one or more instruction sequencers or 2) implicitly references with a pointer to code that specifically addresses one or more instruction sequencers when the code is executed.

Abstract: A system connected to an AC power grid having an AC phase signal includes an inverter module including a first inverter coupled to a DC voltage, actuated based on the AC phase signal. The first inverter provides a first voltage signal having predetermined harmonic components. A second inverter includes second switch elements coupled to the DC voltage and actuated by a second set of control signals phase delayed with respect to the first control signals. A transformer module has first and second primary windings coupled to the first and second inverters. The transformer module further includes a secondary winding coupled to first primary winding, the second primary winding, and the AC power grid. The secondary winding is configured to provide a secondary output voltage to the AC power grid by combining the first voltage signal and the second voltage signal such that the predetermined harmonic components are substantially cancelled.

Abstract: Embodiments of the invention provide a method of creating, based on an operating-system-scheduled thread running on an operating-system-visible sequencer and using an instruction set extension, a persistent user-level thread to run on an operating-system-sequestered sequencer independently of context switch activities on the operating-system-scheduled thread. The operating-system-scheduled thread and the persistent user-level thread may share a common virtual address space. Embodiments of the invention may also provide a method of causing a service thread running on an additional operating-system-visible sequencer to provide operating system services to the persistent user-level thread. Embodiments of the invention may further provide apparatus, system, and machine-readable medium thereof.

Abstract: In one embodiment, the present invention includes a method for directly communicating between an accelerator and an instruction sequencer coupled thereto, where the accelerator is a heterogeneous resource with respect to the instruction sequencer. An interface may be used to provide the communication between these resources. Via such a communication mechanism a user-level application may directly communicate with the accelerator without operating system support. Further, the instruction sequencer and the accelerator may perform operations in parallel. Other embodiments are described and claimed.

Abstract: A solid-state circuit breaker for a DC power system which may operate unidirectional and bidirectional and does not require an external power supply to provide current interruption protection during an event of a short circuit fault.

Abstract: In one embodiment, the present invention includes a method for directly communicating between an accelerator and an instruction sequencer coupled thereto, where the accelerator is a heterogeneous resource with respect to the instruction sequencer. An interface may be used to provide the communication between these resources. Via such a communication mechanism a user-level application may directly communicate with the accelerator without operating system support. Further, the instruction sequencer and the accelerator may perform operations in parallel. Other embodiments are described and claimed.

Abstract: Embodiments of the invention provide a method of creating, based on an operating-system-scheduled thread running on an operating-system-visible sequencer and using an instruction set extension, a persistent user-level thread to run on an operating-system-sequestered sequencer independently of context switch activities on the operating-system-scheduled thread. The operating-system-scheduled thread and the persistent user-level thread may share a common virtual address space. Embodiments of the invention may also provide a method of causing a service thread running on an additional operating-system-visible sequencer to provide operating system services to the persistent user-level thread. Embodiments of the invention may further provide apparatus, system, and machine-readable medium thereof.

Abstract: Embodiments of the invention provide a method of creating, based on an operating-system-scheduled thread running on an operating-system-visible sequencer and using an instruction set extension, a persistent user-level thread to run on an operating-system-sequestered sequencer independently of context switch activities on the operating-system-scheduled thread. The operating-system-scheduled thread and the persistent user-level thread may share a common virtual address space. Embodiments of the invention may also provide a method of causing a service thread running on an additional operating-system-visible sequencer to provide operating system services to the persistent user-level thread. Embodiments of the invention may further provide apparatus, system, and machine-readable medium thereof.

Abstract: The present invention is directed to a system configured to be connected to an AC power grid having at least one AC phase signal. The system includes at least one inverter module comprising a first inverter having a plurality of first switch elements coupled to a direct current (DC) voltage and actuated in accordance with a first set of control signals based on the at least one AC phase signal. The first inverter provides a first voltage signal having predetermined harmonic components. The at least one inverter module further comprises a second inverter including a plurality of second switch elements coupled to the DC voltage and actuated in accordance with a second set of control signals phase delayed with respect to the first set of control signals. The second switching inverter providing a second voltage signal having the predetermined harmonic components.

Abstract: A solid-state circuit breaker for a DC power system which may operate unidirectional and bidirectional and does not require an external power supply to provide current interruption protection during an event of a short circuit fault.

Abstract: A multi-transformer LLC (resonant) power converter having at least two transformers including a first T1 and a second transformer T2 in series includes a switch network configured for receiving input power including a first and second switched node. Resonant circuitry is coupled between the first and second switched node including a series combination of an inductor, a capacitor, a primary winding of T1 and a primary winding of a T2. At least one switch is operable for providing a first mode that includes T2 in the resonant circuitry and a second mode that excludes T2 from the resonant circuitry. Secondary windings of T2 and T1 are connected electrically in parallel for driving an output capacitor (Co) through respective rectifiers which provide conversion from AC to DC.