Patents by Inventor John W. Smith

John W. Smith has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7350699
    Abstract: A financial transactions processing system includes a cradle to receive dispensed notes for dispensing cash to customers and/or tellers. The cradle may be rotatable for use with more than one user. The cradle may have end walls to provide security and privacy to each user. A rotatable shield may provide additional security and privacy. A lock may prevent the cradle and/or shield from rotating to prevent unauthorized access to cash in the cradle.
    Type: Grant
    Filed: June 22, 2005
    Date of Patent: April 1, 2008
    Assignee: De La Rue International Limited
    Inventors: Robert Edward Gunst, John W. Smith, Philip Michael William Ireland
  • Patent number: 7213745
    Abstract: A financial transactions processing system includes a teller display screen and a customer display screen, both of which can be coupled to a teller computer. The teller computer can be operably connected to a bank computer. The teller computer provides the teller display screen with a first set of information to be displayed on the teller display screen, and supplies the customer display screen with a second set of information to be displayed on the customer display screen, such that the customer display screen and the teller display screen display different sets of information.
    Type: Grant
    Filed: June 22, 2005
    Date of Patent: May 8, 2007
    Assignee: De la Rue International Limited
    Inventors: John W. Smith, Philip Michael William Ireland
  • Patent number: 7166914
    Abstract: A packaged semiconductor chip including the chip, and a package element such as a heat sink is made by connecting flexible leads between contacts on the chip and terminals on a dielectric element such as a sheet or plate and moving the sheet or plate away from the chip, and injecting a liquid material to form a compliant layer filling the space between the package element and the dielectric element, and surrounding the leads. The dielectric element and package element extend outwardly beyond the edges of the chip, and physically protect the chip. The assembly may be handled and mounted by conventional surface mounting techniques. The assembly may include additional circuit elements such as capacitors used in conjunction with the chip.
    Type: Grant
    Filed: June 25, 2004
    Date of Patent: January 23, 2007
    Assignee: Tessera, Inc.
    Inventors: Thomas H. DiStefano, John W. Smith, Tony Faraci
  • Patent number: 7152311
    Abstract: A flexible sheet used in manufacture of microelectronic components is held on a frame formed from a rigid material so that the frame maintains the sheet under tension during processing and thereby stabilizes the dimensions of the sheet. The frame may be formed from a rigid, light-transmissive material such as a glass, and the bond between the frame and sheet may be made or released by light transmitted through the frame. Preferred features of the framed sheet minimize entrapment of processing liquids such as etch solutions, thereby minimizing carryover of processing solutions between steps. The frame may have contact openings which permit engagement of a metallic layer on the sheet by an electrode carrying electroplating or etching current without disturbing the main portion of the sheet where features are to be formed or treated.
    Type: Grant
    Filed: December 26, 2001
    Date of Patent: December 26, 2006
    Assignee: Tessera, Inc.
    Inventors: Masud Beroz, Thomas H. DiStefano, Matthew T. Hendrickson, David Light, John W. Smith
  • Patent number: 7155515
    Abstract: A method and system for distributing work load in a cluster of at least two service resources. Depending upon the configuration, a service resource may be an individual process, such as a single instance of a computer game, or a node on which multiple processes are executing, such as a Server. Initial connection requests from new clients are directed to a single entry-point service resource in the cluster, called an intake. A separate intake is designated for each type of service provided by the cluster. The clients are processed in a group at the service resource currently designated as the intake to which clients initially connected, for the duration of the session. Based upon its loading, the current intake service resource determines that another service resource in the cluster should become a new intake for subsequent connection requests received from new clients. Selection of another service resource to become the new intake is based on the current work load of each resource in the cluster.
    Type: Grant
    Filed: February 6, 2001
    Date of Patent: December 26, 2006
    Assignee: Microsoft Corporation
    Inventors: Justin D. Brown, John W. Smith, Craig A. Link, Hoon Im, Charles H. Barry
  • Patent number: 7098074
    Abstract: A method is disclosed for making a microelectronic package. A material is applied to a first major surface of a microelectronic element to reduce the heights of protrusions projecting from the first major surface. The microelectronic element is assembled to a microelectronic component. A method of forming protrusions and an assembly incorporating the microelectronic element having protrusions is also disclosed.
    Type: Grant
    Filed: October 31, 2003
    Date of Patent: August 29, 2006
    Assignee: Tessera, Inc.
    Inventors: Michael Warner, Masud Beroz, David Light, Delin Li, Dennis Castillo, Hung-ming Wang, John W. Smith
  • Patent number: 7067742
    Abstract: A connection component for use in making microelectronic element assemblies which has peelable leads that are formed on a dielectric support structure. One end of each lead is permanently connected to the support structure and the opposite end of the lead is releasably connected to the support structure. When the releasable end of the lead is bonded to a contact on a semiconductor chip, the releasable end of the lead can be peeled from the support structure such that the chip may be moved away from the support structure. A compliant layer may be disposed between the chip and the support structure. If a compliant material is injected between the chip and the support structure to form the compliant layer, the compliant material will lift the chip away from the support structure and facilitate the peeling of the leads from the support structure.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: June 27, 2006
    Assignee: Tessera, Inc.
    Inventors: Thomas H. DiStefano, Joseph Fjelstad, Belgacem Haba, Owais Jamil, Konstantine Karavakis, David Light, John W. Smith
  • Patent number: 6965158
    Abstract: Multi-layer components such as circuit panels are fabricated by connecting conductive features such as traces one two or more superposed substrates using leads extending through an intermediate dielectric layer. The leads can be closely spaced to provide a high density vertical interconnection, and can be selectively connected to provide customization of the structure.
    Type: Grant
    Filed: June 11, 2002
    Date of Patent: November 15, 2005
    Assignee: Tessera, Inc.
    Inventors: John W. Smith, Belgacem Haba
  • Patent number: 6939735
    Abstract: A first microelectronic element is provided with leads having anchor ends connected to contacts and tip ends moveable with respect to the first microelectronic element. The leads can be provided on a carrier sheet that is assembled to the first microelectronic element, or may be formed in situ on the surface of the first element. The leads may be unitary strips of a conductive material, and the anchor ends of the leads may be bonded to the contacts of the first microelectronic element by processes such as thermosonic or ultrasonic bonding. Alternatively, stub leads may be provided on a separate carrier sheet or formed in situ on the front surface of the first microelectronic element, and these stub leads may be connected by wire bonds to the contacts of the first microelectronic element so as to form composite leads. The tip ends of the leads are joined to a second microelectronic element that is moved away from the first microelectronic element so as to deform the leads.
    Type: Grant
    Filed: September 5, 2002
    Date of Patent: September 6, 2005
    Assignee: Tessera Inc.
    Inventors: John W. Smith, Mitchell Koblis
  • Patent number: 6938338
    Abstract: Microelectronic contacts, such as flexible, tab-like, cantilever contacts, are provided with asperities disposed in a regular pattern. Each asperity has a sharp feature at its tip remote from the surface of the contact. As mating microelectronic elements are engaged with the contacts, a wiping action causes the sharp features of the asperities to scrape the mating element, so as to provide effective electrical interconnection and, optionally, effective metallurgical bonding between the contact and the mating element upon activation of a bonding material.
    Type: Grant
    Filed: April 17, 2003
    Date of Patent: September 6, 2005
    Assignee: Tessera, Inc.
    Inventors: Joseph Fjelstad, John W. Smith, Thomas H. DiStefano, James Zaccardi, A. Christian Walton
  • Patent number: 6927095
    Abstract: A method of making a compliant microelectronic package includes providing a first substrate having a top surface with conductive pads and an opening extending therethrough to the first substrate so that a bottom surface of the second substrate confronts a top surface of the first substrate. A microelectronic element is attached to the first substrate so that a back face of the microelectronic element confronts the top surface of the first substrate. The contacts of the microelectronic element are electrically interconnected with the conductive pads of the second substrate. A dielectric sheet having conductive leads is juxtaposed with the first substrate. The second ends of the leads are electrically interconnected with the conductive pads of the second substrate, and the dielectric sheet and the second substrate are moved away from one another so as to vertically extend the leads.
    Type: Grant
    Filed: September 9, 2003
    Date of Patent: August 9, 2005
    Assignee: Tessera, Inc.
    Inventor: John W. Smith
  • Patent number: 6921713
    Abstract: An active microelectronic element such as a semiconductor chip or wafer is bonded to an interconnect element having substantially the same coefficient of thermal expansion as the active element using small, rigid bonds, desirably made by a solid-phase bonding technique, which accommodate numerous closely-spaced interconnections. The assembly is provided with terminals movable with respect to the active element and interconnect element. The interconnect element desirably provides low-impedance conductive paths interconnecting active electronic devices within the active element.
    Type: Grant
    Filed: October 14, 2003
    Date of Patent: July 26, 2005
    Assignee: Tessera, Inc.
    Inventors: John W. Smith, Belgacem Haba
  • Patent number: 6897090
    Abstract: A component incorporating a dielectric element such as a polymeric film with leads and terminals thereon is assembled with a semiconductor chip and bond regions of the leads are connected to contacts of the chip. At least one lead incorporates a plural set of connecting regions connecting the bond region of that lead to a plurality of terminals. One or more of the connecting regions in each such plural set are severed so as to leave less than all of the terminals associated with each such plural set connected to the contacts of the chip.
    Type: Grant
    Filed: May 7, 2003
    Date of Patent: May 24, 2005
    Assignee: Tessera, Inc.
    Inventors: Thomas H. DiStefano, Konstantine Karavakis, Craig Mitchell, John W. Smith
  • Patent number: 6891255
    Abstract: A connection component including a flexible substrate having a top surface and a bottom surface, a layer of a compliant, dielectric material overlying the top surface of the substrate, the compliant material layer having a top surface remote from the substrate, an array of flexible, conductive leads having first ends attached to terminals accessible at the bottom surface of the substrate and second ends adjacent the top surface of the compliant layer, wherein each lead comprises a core of a first conductive material surrounded by a layer of a second conductive material, the second conductive material having a greater yield strength than the first conductive material.
    Type: Grant
    Filed: April 7, 2003
    Date of Patent: May 10, 2005
    Assignee: Tessera, Inc.
    Inventors: John W. Smith, Bruce McWilliams
  • Patent number: 6849953
    Abstract: A microelectronic assembly includes composite conductive elements, each incorporating a core and a coating of a low-melting conductive material. The composite conductive elements interconnect microelectronic elements. At the normal operating temperature of the assembly, the low-melting conductive material melts, allowing the cores and microelectronic elements to move relative to one another and relieve thermally-induced stress.
    Type: Grant
    Filed: August 29, 2001
    Date of Patent: February 1, 2005
    Assignee: Tessera, Inc.
    Inventor: John W. Smith
  • Patent number: 6848173
    Abstract: A method of making a microelectronic assembly includes juxtaposing a first element, such as a dielectric sheet having conductive leads thereon with a second element, such as a semiconductor chip, having contact thereon, and wire bonding the conductive leads on the first element to the contacts on the second element so that elongated bonding wires extend between the conductive leads and the contacts. After the wire bonding step, the first and second elements are moved through a pre-selected displacement relative to one another so as to deform the bonding wires. A flowable dielectric material may be introduced between the first and second elements and around the bonding wires during or after the moving step. The flowable material may be cured to form an encapsulant around at least a portion of the bonding wires.
    Type: Grant
    Filed: January 22, 2001
    Date of Patent: February 1, 2005
    Assignee: Tessera, Inc.
    Inventors: Joseph Fjelstad, Masud Beroz, John W. Smith, Belgacem Haba
  • Patent number: 6846700
    Abstract: A microelectronic assembly including elements such as a semiconductor chip and substrate has electrical connections between the elements incorporating fusible conductive metal masses. The fusible masses are surrounded and contained by a compliant material such as an elastomer or gel. The fusible material may melt during operation or processing of the device to relieve thermal cycling stress in the electrical connections.
    Type: Grant
    Filed: May 15, 2002
    Date of Patent: January 25, 2005
    Assignee: Tessera, Inc.
    Inventor: John W. Smith
  • Publication number: 20040262742
    Abstract: A packaged semiconductor chip including the chip, and a package element such as a heat sink is made by connecting flexible leads between contacts on the chip and terminals on a dielectric element such as a sheet or plate and moving the sheet or plate away from the chip, and injecting a liquid material to form a compliant layer filling the space between the package element and the dielectric element, and surrounding the leads. The dielectric element and package element extend outwardly beyond the edges of the chip, and physically protect the chip. The assembly may be handled and mounted by conventional surface mounting techniques. The assembly may include additional circuit elements such as capacitors used in conjunction with the chip.
    Type: Application
    Filed: June 25, 2004
    Publication date: December 30, 2004
    Applicant: Tessera, Inc.
    Inventors: Thomas H. DiStefano, John W. Smith, Tony Faraci
  • Patent number: 6828668
    Abstract: An interconnect component comprises a compliant layer having a first surface and a plurality of electrically conductive leads having first ends and extending through the compliant layer. The first ends extend generally parallel to said first surface.
    Type: Grant
    Filed: November 7, 2002
    Date of Patent: December 7, 2004
    Assignee: Tessera, Inc.
    Inventors: John W. Smith, Belgacem Haba
  • Patent number: D520355
    Type: Grant
    Filed: March 29, 2002
    Date of Patent: May 9, 2006
    Assignee: Steelcase Development Corporation
    Inventors: Thomas Overthun, James N. Ludwig, David M. Gresham, Karl Heinz Mueller, Monika Conway, Stephen Don Wahl, John W. Smith