Abstract: Waste streams from different chloromonosilane production processes are combined and reacted in a single recovery process. Useful monosilane species may be obtained with a single recovery process.

Abstract: Magnetic separator devices that are useful in separating finely divided solids in the presence of liquids, vapors, and gases that are hazardous, that is, they may be corrosive, flammable, toxic, or a combination of such hazards, and the use of such devices in processes for the manufacture of chlorosilanes.

Abstract: A side recovery system is disclosed that includes a base configured to be supported on a vehicle and a boom supported by the base and having a first end and a second end. The boom is rotatable relative to the base about a substantially horizontal axis between a first position and second position. The second end of the boom being positioned at a first side of the vehicle in the first position and at an opposite second side of the vehicle in the second position. The system also includes a first sheave supported at the second end of the boom and configured to receive a load bearing cable. The cable configured to remain received by the first sheave as the boom rotates between the first position and the second position.

Abstract: A pseudo-random bit interleaver and de-interleaver comprising a source for generating pseudo-random numbers and transformation logic that transforms each pseudo-random number generated by the source into a plurality of different pseudo-random numbers. Each of the transformed pseudo-random numbers identifying a parity equation to which an incoming bit will be assigned for computing parity.

Abstract: An embodiment of a read channel includes a filter, an interpolator, a recovery circuit, an error detector, a reverse interpolator, and a filter calibrator. The filter is operable to receive a raw sample of a signal and a coefficient-correction value, generate a filtered sample from the raw sample and a pre-established coefficient, and change the coefficient in response to the coefficient-correction value. The interpolator is operable to interpolate the filtered sample, and the recovery circuit is operable to generate a data symbol from the interpolated sample. The error detector is operable to generate an ideal sample from the data symbol and to generate a difference between the ideal sample and the interpolated sample, and the reverse interpolator is operable to reverse interpolate the difference. The filter calibrator is operable to receive the raw sample and to generate the coefficient-correction value from the raw sample and the reverse-interpolated difference.

Abstract: Disclosed herein is an apparatus and method of calibrating the parameters of a Viterbi detector 138 in which each branch metric is calculated based on noise statistics that depend on the signal hypothesis corresponding to the branch. An offline algorithm for calculating the parameters of data-dependent noise predictive filters 304A-D is presented which has two phases: a noise statistics estimation or training phase, and a filter calculation phase. During the training phase, products of pairs of noise samples are accumulated in order to estimate the noise correlations. Further, the results of the training phase are used to estimate how wide (in bits) the noise correlation accumulation registers need to be. The taps [t2[k], t1[k], t0[k]] of each FIR filter are calculated based on estimates of the entries of a 3-by-3 conditional noise correlation matrix C[k] defined by Cij[k]=E(ni-3nj-3|NRZ condition k).

Abstract: The present invention relates to a coding system characterized by various combinations of the following properties: 1) Even parity at the output of d of the precoder; 2) A coding rate of 32/34; 3) At least 9 ones per codeword; 4) No more than 13 consecutive zeros in the stream of encoded data (G=13); 5) No more than 13 consecutive zeros in any run of every-other-bit in the stream of codewords (I=13); 6) For closed error events in y or y? having squared-distance?(1 to 1.5)×dmfb2 in the detector, the decoder produces at most 4 corresponding erroneous data bytes; 7) Decoding of a 34 bit codeword may begin when 19 of its bits have been received; 8) If the Viterbi detector 108 outputs Non-Return to Zero (NRZ) symbols, then its output is filtered by (1?D^2) before being decoded, but if the Viterbi detector outputs NRZ Inverter (NRZI) symbols, then its output is decoded directly; and 9) The even parity is on NRZ symbols.

Abstract: Methods and apparatus are provided for a combined encoder/syndrome computer with a programmable parity level. In one embodiment, a circuit is disclosed that generates check symbols during an encoding operation and generates error syndromes during a decoding operation. The circuit comprises a plurality of subfilters grouped into a multiple degree polynomial filter, where the number of multiple degree subfilters is less than a maximum number of symbols of redundancy.

Abstract: Methods and apparatus are provided for performing SOVA detection at higher data rates than achievable with conventional designs. A received signal is processed by (i) determining at least three selection signals that define a plurality of paths through a multiple-step trellis into a given state, wherein a first of the plurality of paths is a winning path for each single-step-trellis period of a multiple-step-trellis cycle, a second path is a winning path for a first single-step-trellis period and is a losing path for a second single-step-trellis period of a multiple-step-trellis cycle and a third path is a losing path for a first single-step-trellis period and is a winning path for a second single-step-trellis period of a multiple-step-trellis cycle; and (ii) determining at least one reliability value (such as a reliability value for a bit decision associated with a maximum-likelihood path through the multiple-step trellis or a plurality of reliability values for each multiple-step-trellis cycle).

Abstract: A pseudo-random bit interleaver and de-interleaver comprising a source for generating pseudo-random numbers and transformation logic that transforms each pseudo-random number generated by the source into a plurality of different pseudo-random numbers. Each of the transformed pseudo-random numbers identifying a parity equation to which an incoming bit will be assigned for computing parity.

Abstract: A composite data detector having first and second data detectors. The second detector of the invention starts in a known state and only runs as long as is necessary before being switched off and handing control back over to the smaller detector. Therefore, the composite data detector of the invention consumes less power than the known composite data detector and estimates bits with higher accuracy.

Abstract: A reduced-state Viterbi detector is disclosed that precomputes branch metrics for a multiple-step trellis for speculative sequences of one or more channel symbols; selects one of said precomputed branch metrics for multi-step state transitions based on at least one multi-step decision from at least one corresponding state; and selects a path having a best path metric for a given state.

Abstract: A method and apparatus are provided for determining a plurality of filter tap weights or biases (or both) for a noise predictive filter used to generate one or more signal dependent branch metrics. A filter tap weight or filter bias (or both) are adaptively accumulated for each possible data condition. The data conditions may comprise, for example, each possible data pattern for a given data dependency length. The appropriate accumulated filter tap weight or bias to update can be selected based on a data condition associated with the current received data. The filter tap weights associated with a delay 0 tap can be adapted for each filter condition except for a single normalizing condition, whose corresponding delay 0 tap remains fixed.

Abstract: A method and apparatus are disclosed for detecting a synchronization mark in a received signal. The received signal is processed to compensate for a DC bias in the received signal, such as subtracting an average of a block of received samples from each sample in the block. A distance metric, such as a sum of square differences, is computed between the DC compensated received signal and an ideal version of the received signal expected when reading the synchronization mark. The synchronization mark is detected if the distance metric satisfies predefined criteria. The ideal version of the received signal can optionally be processed to compensate for a DC bias in the synchronization mark. A search for the synchronization mark search can be limited to time cycles that match a known phase.

Abstract: Disclosed herein is an apparatus and method of calibrating the parameters of a Viterbi detector 138 in which each branch metric is calculated based on noise statistics that depend on the signal hypothesis corresponding to the branch. An offline algorithm for calculating the parameters of data-dependent noise predictive filters 304A-D is presented which has two phases: a noise statistics estimation or training phase, and a filter calculation phase. During the training phase, products of pairs of noise samples are accumulated in order to estimate the noise correlations. Further, the results of the training phase are used to estimate how wide (in bits) the noise correlation accumulation registers need to be. The taps [t2[k], t1[k], t0[k]]of each FIR filter are calculated based on estimates of the entries of a 3-by-3 conditional noise correlation matrix C[k] defined by Cij[k]=E(ni-3nj-3|NRZ condition k).

Abstract: A system and method for acquisition signal error estimation is provided which uses one or more past values of the sequence to determine the nearest ideal sample value without comparing the received sample value to the potential sample values. According to one embodiment, the nearest ideal sample value is selected based on the received sample value and values of three consecutive samples. According to another embodiment, the nearest ideal sample value is selected based on the received sample value and a value of an immediately preceding sample. According yet to another embodiment, the nearest ideal sample value is selected based on the received sample value and a value of a previous sample. The acquisition signal error estimator maybe used in conjunction with gain, DC offset, or magneto-resistive asymmetry control loops in a sampled amplitude read channel.

Abstract: A phase error estimate value between an actual interpolated sample time and an ideal interpolated sample time of an analog signal is selected by circuitry based on a quotient (z2−z0)/(z3−z1), where z0, z1, z2, and z3 are four successive synchronous samples of the analog signal. A sign of the phase error estimate value is selected by circuitry based on a comparison of predetermined differences between the four successive synchronous samples. The phase error estimate value can be adjusted by circuitry when an absolute value of the phase error estimate value exceeds a predetermined threshold and a closest sampling phase according to a difference between (z2−z0) and (z3−z1) differs from a phase predicted by a hysteresis state.

Abstract: A system and method to modulate coding based on an ECC interleave structure include a first encoder encoding an input stream of bits comprising input blocks sorted into interleaves. A second encoder encodes a subset of the input blocks to produce output blocks, where the first encoder permutates a remainder of the input blocks and the output blocks to produce a codeword.

Abstract: A quotient (y2−y0)/(y3−y1) is generated by circuitry where Yk are asynchronous samples from a sequence of asynchronous samples, the quotient (y2−y0)/(y3−y1) is compared to a plurality of predetermined fractions with a comparator, and an initial interpolation interval value (&mgr;0) stored in a lookup table is selected by circuitry based on the comparison of the quotient to the plurality of predetermined fractions. The predetermined fractions can represent boundary points and the quotient can fall between an interval defined by two of the boundary points. The selected initial interpolation value (&mgr;0) can be the average of two calculated values of (&mgr;) using values of two predetermined fractions associated with the two boundary points between which the quotient falls.

Abstract: The present invention relates to a coding system characterized by various combinations of the following properties: 1) Even parity at the output of d of the precoder; 2) A coding rate of 32/34; 3) At least 9 ones per codeword; 4) No more than 13 consecutive zeros in the stream of encoded data (G=13); 5) No more than 13 consecutive zeros in any run of every-other-bit in the stream of codewords (I=13); 6) For closed error events in y or y′ having squared-distance≦(1 to 1.5)×dmfb2 in the detector, the decoder produces at most 4 corresponding erroneous data bytes; 7) Decoding of a 34 bit codeword may begin when 19 of its bits have been received; 8) If the Viterbi detector 108 outputs Non-Return to Zero (NRZ) symbols, then its output is filtered by (1⊕D{circumflex over ( )}2) before being decoded, but if the Viterbi detector outputs NRZ Inverter (NRZI) symbols, then its output is decoded directly; and 9) The even parity is on NRZ symbols.