Abstract: Computer memory subsystems are disclosed for enhancing signal quality that include: one or more memory modules; a memory bus; and a memory controller connected to the memory modules through the memory bus, the memory controller including a reception buffer connected to the memory bus, the reception buffer capable of receiving an input signal from one of the memory modules, the memory controller including a reception characteristics table capable of storing reception characteristics for each of the memory modules connected to the memory controller, the memory controller including an equalizer connected to the reception buffer and the reception characteristics table, the equalizer capable of equalizing the received input signal in dependence upon the reception characteristics for the memory module from which the input signal was received, and the memory controller including memory controller logic connected to the equalizer, the memory controller logic capable of processing the equalized input signal.

Abstract: A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules and/or SATA/SAS-compatible memory modules. In one example, the memory/storage module couples to a first bus (DDR3 compatible socket) to obtain voltage and/or other signals, but uses a second bus for data transfers. In another example, the memory module may repurpose/reuse electrical paths that typically carry non-data signals for data traffic to/from the memory/storage module. Such data traffic for the memory/storage module permits concurrent data traffic for other memory modules on the same memory bus.

Abstract: A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules and/or SATA/SAS-compatible memory modules. In one example, the memory/storage module couples to a first bus (DDR3 compatible socket) to obtain voltage and/or other signals, but uses a second bus for data transfers. In another example, the memory module may repurpose/reuse electrical paths that typically carry non-data signals for data traffic to/from the memory/storage module. Such data traffic for the memory/storage module permits concurrent data traffic for other memory modules on the same memory bus.

Abstract: A memory module is provided comprising a substrate having an interface to a host system, volatile memory, non-volatile memory, and a logic device. The logic device may receive the indicator of an external triggering event and copies data from the volatile memory devices to the non-volatile memory devices upon receipt of such indicator. When the indicator of the triggering event has cleared, the logic device restores the data from the non-volatile to the volatile memory devices. The memory module may include a passive backup power source (e.g., super-capacitor) that is charged by an external power source and temporarily provides power to the memory module to copy the data from volatile to non-volatile memory. A voltage detector within the memory module may monitor the voltage of an external power source and generates an indicator of a power loss event if voltage of the external power source falls below a threshold level.

Abstract: A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules and/or SATA/SAS-compatible memory modules. In one example, the memory/storage module couples to a first bus (DDR3 compatible socket) to obtain voltage and/or other signals, but uses a second bus for data transfers. In another example, the memory module may repurpose/reuse electrical paths that typically carry non-data signals for data traffic to/from the memory/storage module. Such data traffic for the memory/storage module permits concurrent data traffic for other memory modules on the same memory bus.

Abstract: A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules and/or SATA/SAS-compatible memory modules. In one example, the memory/storage module couples to a first bus (DDR3 compatible socket) to obtain voltage and/or other signals, but uses a second bus for data transfers. In another example, the memory module may repurpose/reuse electrical paths that typically carry non-data signals for data traffic to/from the memory/storage module. Such data traffic for the memory/storage module permits concurrent data traffic for other memory modules on the same memory bus.

Abstract: A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules and/or SATA/SAS-compatible memory modules. In one example, the memory/storage module couples to a first bus (DDR3 compatible socket) to obtain voltage and/or other signals, but uses a second bus for data transfers. In another example, the memory module may repurpose/reuse electrical paths that typically carry non-data signals for data traffic to/from the memory/storage module. Such data traffic for the memory/storage module permits concurrent data traffic for other memory modules on the same memory bus.

Abstract: A printed circuit board (‘PCB’) with a capacitor integrated within a via of the PCB, the PCB including layers of laminate; a via that includes a via hole traversing layers of the PCB, the via hole characterized by a generally tubular inner surface; a capacitor integrated within the via, the capacitor including two capacitor plates, an inner plate and an outer plate, the two plates composed of electrically conductive material disposed upon the inner surface of the via hole, both plates traversing layers of the laminate, the inner plate traversing more layers of the laminate than are traversed by the outer plate; and a layer of dielectric material disposed between the two plates.

Abstract: A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules and/or SATA/SAS-compatible memory modules. In one example, the memory/storage module couples to a first bus (DDR3 compatible socket) to obtain voltage and/or other signals, but uses a second bus for data transfers. In another example, the memory module may repurpose/reuse electrical paths that typically carry non-data signals for data traffic to/from the memory/storage module. Such data traffic for the memory/storage module permits concurrent data traffic for other memory modules on the same memory bus.

Abstract: An edge card connector includes: a substantially rigid, insulating housing having internal electrical contacts to engage the edge of a first circuit board inserted into the housing; solder balls arranged on an outer surface of the housing in a selected pattern to establish connections to corresponding conductive pads on a second circuit board when the solder balls are at least partially melted; and, electrical connections between the internal electrical contacts and the solder balls. The socket may contain additional features for added strength, ease of assembly, and other purposes. The system is assembled by placing the socket onto a circuit board, aligning the solder balls with respective contact pads, and fusing the solder balls to establish electrical connectivity. A standoff structure may be provided to avoid excessive compaction of the solder balls.

Abstract: A random number generating unit includes an external containment casing and a measurement cone within the external containment casing, to which liquid detection contacts are attached. One or more terminals on a random number generation integrated circuit, which terminals connect to the liquid detection contacts are included, as is a primary reservoir connected to a secondary reservoir containing a pump and a dropper to provide a bead of liquid from the pump, wherein the bead falls on the measurement cone to be detected by the liquid detection contacts and then fall into the primary reservoir.

Abstract: A printed circuit board (‘PCB’) with a capacitor integrated within a via of the PCB, the PCB including layers of laminate; a via that includes a via hole traversing layers of the PCB, the via hole characterized by a generally tubular inner surface; a capacitor integrated within the via, the capacitor including two capacitor plates, an inner plate and an outer plate, the two plates composed of electrically conductive material disposed upon the inner surface of the via hole, both plates traversing layers of the laminate, the inner plate traversing more layers of the laminate than are traversed by the outer plate; and a layer of dielectric material disposed between the two plates.

Abstract: A memory module is provided comprising a substrate having an interface to a host system, volatile memory, non-volatile memory, and a logic device. The logic device may receive the indicator of an external triggering event and copies data from the volatile memory devices to the non-volatile memory devices upon receipt of such indicator. When the indicator of the triggering event has cleared, the logic device restores the data from the non-volatile to the volatile memory devices. The memory module may include a passive backup power source (e.g., super-capacitor) that is charged by an external power source and temporarily provides power to the memory module to copy the data from volatile to non-volatile memory. A voltage detector within the memory module may monitor the voltage of an external power source and generates an indicator of a power loss event if voltage of the external power source falls below a threshold level.

Abstract: Memory systems and methods of forming memory modules. In one embodiment, a computer memory system includes a substantially tubular frame with an elongate card edge extending along the frame. A flexible circuit comprising a flexible substrate, a plurality of memory chips affixed to the flexible substrate, and a plurality of electrical terminals interconnected with the memory chips, is secured along a perimeter of the tubular frame with the electrical terminals arranged along the card edge.

Abstract: Computer memory subsystems are disclosed for enhancing signal quality that include: one or more memory modules; a memory bus; and a memory controller connected to the memory modules through the memory bus, the memory controller including a reception buffer connected to the memory bus, the reception buffer capable of receiving an input signal from one of the memory modules, the memory controller including a reception characteristics table capable of storing reception characteristics for each of the memory modules connected to the memory controller, the memory controller including an equalizer connected to the reception buffer and the reception characteristics table, the equalizer capable of equalizing the received input signal in dependence upon the reception characteristics for the memory module from which the input signal was received, and the memory controller including memory controller logic connected to the equalizer, the memory controller logic capable of processing the equalized input signal.

Abstract: A system and method for implementing a bus. In one embodiment, the system includes a bus switch operative to couple to a bus, and a plurality of trace segments coupled to the bus switch, where the trace segments have different lengths. The bus switch is operative to connect one of the trace segments to the bus based on at least one system requirement, and the selected trace segment cancels signal reflections on the bus.