Patents by Inventor Jong Kyu Kim

Jong Kyu Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11940725
    Abstract: A blankmask for EUV lithography includes a substrate, a reflective layer, a capping layer, and a phase shift layer. The phase shift layer is made of a material containing ruthenium (Ru) and chromium (Cr), and a total content of ruthenium (Ru) and chromium (Cr) is 50 to 100 at %. The phase shift layer may further contain boron (B) or nitrogen (N). The phase shift layer of the present invention has a high relative reflectance (relative reflectance with respect to a reflectance of the reflective layer under the phase shift layer) with respect to a tantalum (Ta)-based phase shift layer and has a phase shift amount of 170 to 230°. It is possible to obtain excellent resolution when finally manufacturing a pattern of 7 nm or less by using a photomask manufactured using such a blankmask.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: March 26, 2024
    Assignee: S&S Tech Co., Ltd.
    Inventors: Cheol Shin, Yong-Dae Kim, Jong-Hwa Lee, Chul-Kyu Yang, Min-Kwang Park, Mi-Kyung Woo
  • Publication number: 20240097218
    Abstract: Methods and systems for executing tracking and monitoring manufacturing data of a battery are disclosed. One method includes: receiving, by a server system, sensing data of the battery from a sensing system; generating, by the server system, mapping data based on the sensing data; generating, by the server system, identification data of the battery based on the sensing data; generating, by the server system, monitoring data of the battery based on the sensing data, the identification data, and the mapping data; and generating, by the server system, display data for displaying a simulated electrode of the battery on a graphical user interface based on the monitoring data of the battery.
    Type: Application
    Filed: August 31, 2023
    Publication date: March 21, 2024
    Inventors: Min Kyu Sim, Jong Seok Park, Min Su Kim, Jae Hwan Lee, Ki Deok Han, Eun Ji Jo, Su Wan Park, Gi Yeong Jeon, June Hee Kim, Wi Dae Park, Dong Min Seo, Seol Hee Kim, Dong Yeop Lee, Jun Hyo Su, Byoung Eun Han, Seung Huh
  • Publication number: 20240091759
    Abstract: Disclosed herein is a method of depositing a transition metal single-atom catalyst including preparing a carbon carrier, and depositing a transition metal single-atom catalyst on the carbon carrier, in which the carbon carrier is surface-treated by an oxidation process, and wherein the deposition is carried out by an arc plasma process.
    Type: Application
    Filed: September 15, 2023
    Publication date: March 21, 2024
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jong Min KIM, Sang Hoon KIM, Chang Kyu HWANG, Seung Yong LEE, So Hye CHO, Jae Won CHOI
  • Publication number: 20240097238
    Abstract: A battery pack is advantageous for effective control and maintenance of thermal events. A battery pack according to one aspect of the present disclosure may include a battery module having one or more battery cells; a fire extinguishing tank holding a fire extinguishing liquid, disposed on top of the battery module and having a through hole formed therein; and a cover member installed in the through hole of the fire extinguishing tank and configured to open or close the through hole according to a change in internal pressure of the fire extinguishing tank.
    Type: Application
    Filed: December 20, 2022
    Publication date: March 21, 2024
    Applicant: LG ENERGY SOLUTION, LTD.
    Inventors: Jong-Kyu AHN, Ki-Youn KIM, Hyeon-Kyu KIM, Jeong-O MUN, Gi-Dong PARK, Young-Won YUN, Seong-Ju LEE, Jae-Ki LEE
  • Publication number: 20240076799
    Abstract: A wafer manufacturing method, an epitaxial wafer manufacturing method, and a wafer and epitaxial wafer manufactured thereby, are provided. The wafer manufacturing method enables the manufacture of a wafer with a low density of micropipe defects and minimum numbers of particles and scratches. The epitaxial wafer manufacturing method enables the manufacture of an epitaxial wafer that has low densities of defects such as downfall, triangular, and carrot defects, exhibits excellent device characteristics, and improves the yield of devices.
    Type: Application
    Filed: November 1, 2023
    Publication date: March 7, 2024
    Applicant: SENIC INC.
    Inventors: Jong Hwi PARK, Jung-Gyu KIM, Eun Su YANG, Byung Kyu JANG, Jung Woo CHOI, Yeon Sik LEE, Sang Ki KO, Kap-Ryeol KU
  • Patent number: 11904480
    Abstract: An automated gas supply system includes a gas cylinder transfer unit configured to transfer a cradle in which one or more gas cylinders storing a gas therein are stored; a gas cylinder inspection unit configured to check properties of the gas stored in the gas cylinder transferred from the gas cylinder transfer unit and check whether the gas leaks from the gas cylinder; a storage queue configured to receive the gas cylinder from the gas cylinder inspection unit by a mobile robot and configured to classify and store the transferred gas cylinders according to the properties of the gas stored in the gas cylinder; and a gas cabinet configured to receive the gas cylinder from the storage queue by the mobile robot and fasten a gas pipe, which is connected to a semiconductor manufacturing process line, to a gas spray nozzle, which is disposed at one side of the received gas cylinder, to supply the gas stored in the gas cylinder to the semiconductor manufacturing process line, wherein the gas cabinet includes a resid
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: February 20, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Min Sung Ha, Kwang-Jun Kim, Jong Kyu Kim, Hyun-Joong Kim, Jin Ho So, Chi-Gun An, Ki Moon Lee, Hui Gwan Lee, Beom Soo Hwang
  • Publication number: 20240055563
    Abstract: A chip-scale package type light emitting diode includes a first conductivity type semiconductor layer, a mesa, a second conductivity type semiconductor layer, a transparent conductive oxide layer, a dielectric layer, a lower insulation layer, a first pad metal layer, and a second pad metal layer, an upper insulation layer. The upper insulation layer covers the first pad metal layer and the second pad metal layer, and includes a first opening exposing the first pad metal layer and a second opening exposing the second pad metal layer. The openings of the dielectric layer include openings that have different sizes from one another.
    Type: Application
    Filed: August 14, 2023
    Publication date: February 15, 2024
    Inventors: Jong Kyu KIM, Min Woo KANG, Se Hee OH, Hyoung Jin LIM
  • Patent number: 11862455
    Abstract: A chip-scale package type light emitting diode includes a first conductivity type semiconductor layer, a mesa, a second conductivity type semiconductor layer, a transparent conductive oxide layer, a dielectric layer, a lower insulation layer, a first pad metal layer, and a second pad metal layer, an upper insulation layer. The upper insulation layer covers the first pad metal layer and the second pad metal layer, and includes a first opening exposing the first pad metal layer and a second opening exposing the second pad metal layer. The openings of the dielectric layer include openings that have different sizes from one another.
    Type: Grant
    Filed: January 11, 2023
    Date of Patent: January 2, 2024
    Assignee: SEOUL VIOSYS CO., LTD.
    Inventors: Jong Kyu Kim, Min Woo Kang, Se Hee Oh, Hyoung Jin Lim
  • Publication number: 20230411436
    Abstract: A chip-scale package type light emitting diode is provided. In the light emitting diode according to one embodiment, an opening exposing a pad metal layer is separated from an opening of a lower insulation layer which exposes an ohmic reflection layer formed on a mesa. Therefore, it is possible to prevent solder, particularly Sn, from diffusing and contaminating the ohmic reflection layer.
    Type: Application
    Filed: August 1, 2023
    Publication date: December 21, 2023
    Inventors: Se Hee OH, Jong Kyu Kim, Joon Sub Lee
  • Publication number: 20230380254
    Abstract: A method for manufacturing a display device includes providing a donor substrate including a first base substrate and an organic material layer disposed on the first base substrate, etching the organic material layer to form an etched organic material layer using a laser device, providing a display substrate including a second base substrate and a plurality of first electrodes disposed on the second base substrate, aligning the donor substrate and the display substrate such that the etched organic material layer faces the plurality of first electrodes, and transferring the etched organic material layer to the display substrate using an energy generation device.
    Type: Application
    Filed: March 28, 2023
    Publication date: November 23, 2023
    Applicants: Samsung Display Co., Ltd., Postech Research and Business Development Foundation
    Inventors: Sungsoon IM, Jong Kyu KIM, Hyeon Woong HWANG, Jeong Hyeon PARK, Heemin PARK, Seungyong SONG, Duckjung LEE
  • Publication number: 20230299240
    Abstract: A chip-scale package type light emitting diode includes a first conductivity type semiconductor layer, a mesa, a second conductivity type semiconductor layer, a transparent conductive oxide layer, a dielectric layer, a lower insulation layer, a first pad metal layer, and a second pad metal layer, an upper insulation layer. The upper insulation layer covers the first pad metal layer and the second pad metal layer, and includes a first opening exposing the first pad metal layer and a second opening exposing the second pad metal layer. The openings of the dielectric layer include openings that have different sizes from one another.
    Type: Application
    Filed: January 11, 2023
    Publication date: September 21, 2023
    Inventors: Jong Kyu KIM, Min Woo Kang, Se Hee Oh, Hyoung Jin Lim
  • Patent number: 11749707
    Abstract: A chip-scale package type light emitting diode is provided. In the light emitting diode according to one embodiment, an opening exposing a pad metal layer is separated from an opening of a lower insulation layer which exposes an ohmic reflection layer formed on a mesa. Therefore, it is possible to prevent solder, particularly Sn, from diffusing and contaminating the ohmic reflection layer.
    Type: Grant
    Filed: February 1, 2021
    Date of Patent: September 5, 2023
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Se Hee Oh, Jong Kyu Kim, Joon Sub Lee
  • Publication number: 20230249350
    Abstract: An automated gas supply system includes a gas cylinder transfer unit configured to transfer a cradle in which one or more gas cylinders storing a gas therein are stored; a gas cylinder inspection unit configured to check properties of the gas stored in the gas cylinder transferred from the gas cylinder transfer unit and check whether the gas leaks from the gas cylinder; a storage queue configured to receive the gas cylinder from the gas cylinder inspection unit by a mobile robot and configured to classify and store the transferred gas cylinders according to the properties of the gas stored in the gas cylinder; and a gas cabinet configured to receive the gas cylinder from the storage queue by the mobile robot and fasten a gas pipe, which is connected to a semiconductor manufacturing process line, to a gas spray nozzle, which is disposed at one side of the received gas cylinder, to supply the gas stored in the gas cylinder to the semiconductor manufacturing process line, wherein the gas cabinet includes a resid
    Type: Application
    Filed: February 7, 2022
    Publication date: August 10, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Min Sung HA, Kwang-Jun KIM, Jong Kyu KIM, Hyun-Joong KIM, Jin Ho SO, Chi-Gun AN, Ki Moon LEE, Hui Gwan LEE, Beom Soo HWANG
  • Publication number: 20230213907
    Abstract: The present disclosure relates to an operating device and method of an ESS. The ESS operating method may include forecasting electricity information during a predetermined period using a deep learning model generated based on data about an electricity price and an electricity demand, deriving an ESS operating policy by a reinforcement learning model based on the forecasted electricity information and state information of an energy storage device included in the ESS, and controlling the ESS based on the derived ESS operating policy.
    Type: Application
    Filed: November 25, 2022
    Publication date: July 6, 2023
    Applicant: KOREA INSTITUTE OF ENERGY RESEARCH
    Inventors: Gwang Woo HAN, Jong Kyu KIM
  • Publication number: 20230079200
    Abstract: A light emitting diode chip having improved light extraction efficiency is provided. The light emitting diode chip includes a substrate, a first conductivity type semiconductor layer, a mesa, a side coating layer, and a reflection structure. The first conductivity type semiconductor layer is disposed on the substrate. The mesa includes an active layer and a second conductivity type semiconductor layer. The mesa is disposed on a partial region of the first conductivity type semiconductor layer to expose an upper surface of the first conductivity type semiconductor layer along an edge of the first conductivity type semiconductor layer. The side coating layer(s) covers a side surface of the mesa. The reflection structure is spaced apart from the side coating layer(s) and disposed on the exposed first conductivity type semiconductor layer.
    Type: Application
    Filed: November 15, 2022
    Publication date: March 16, 2023
    Inventors: Se Hee OH, Jae Kwon KIM, Jong Kyu KIM, Hyun A KIM, Joon Sup LEE
  • Patent number: 11557696
    Abstract: A chip-scale package type light emitting diode includes a first conductivity type semiconductor layer, a mesa, a second conductivity type semiconductor layer, a transparent conductive oxide layer, a dielectric layer, a lower insulation layer, a first pad metal layer, and a second pad metal layer, an upper insulation layer. The upper insulation layer covers the first pad metal layer and the second pad metal layer, and includes a first opening exposing the first pad metal layer and a second opening exposing the second pad metal layer. The openings of the dielectric layer include openings that have different sizes from one another.
    Type: Grant
    Filed: January 25, 2021
    Date of Patent: January 17, 2023
    Assignee: SEOUL VIOSYS CO., LTD.
    Inventors: Jong Kyu Kim, Min Woo Kang, Se Hee Oh, Hyoung Jin Lim
  • Patent number: 11515451
    Abstract: A light emitting diode chip having improved light extraction efficiency is provided. The light emitting diode chip includes a substrate, a first conductivity type semiconductor layer, a mesa, a side coating layer, and a reflection structure. The first conductivity type semiconductor layer is disposed on the substrate. The mesa includes an active layer and a second conductivity type semiconductor layer. The mesa is disposed on a partial region of the first conductivity type semiconductor layer to expose an upper surface of the first conductivity type semiconductor layer along an edge of the first conductivity type semiconductor layer. The side coating layer(s) covers a side surface of the mesa. The reflection structure is spaced apart from the side coating layer(s) and disposed on the exposed first conductivity type semiconductor layer.
    Type: Grant
    Filed: March 19, 2020
    Date of Patent: November 29, 2022
    Assignee: SEOUL VIOSYS CO., LTD.
    Inventors: Se Hee Oh, Jae Kwon Kim, Jong Kyu Kim, Hyun A Kim, Joon Sup Lee
  • Publication number: 20220208851
    Abstract: A light-emitting element includes a light-emitting structure including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer interposed between the first conductive semiconductor layer and the second conductive semiconductor layer; a first contact electrode and a second contact electrode located on the light-emitting structure, and respectively making ohmic contact with the first conductive semiconductor layer and the second conductive semiconductor layer; an insulation layer for covering a part of the first contact electrode and the second contact electrode so as to insulate the first contact electrode and the second contact electrode; a first electrode pad and a second electrode pad electrically connected to each of the first contact electrode and the second contact electrode; and a radiation pad formed on the insulation layer, and radiating heat generated from the light-emitting structure.
    Type: Application
    Filed: March 17, 2022
    Publication date: June 30, 2022
    Inventors: Jong Kyu KIM, So Ra LEE, Yeo Jin YOON, Jae Kwon KIM, Joon Sup LEE, Min Woo KANG, Se Hee OH, Hyun A. KIM, Hyoung Jin LIM
  • Publication number: 20220158056
    Abstract: A light emitting diode having a plurality of light emitting cells is provided. The light emitting diode according to an exemplary embodiment includes a lower insulation layer covering an ohmic reflection layer, connectors disposed on the lower insulation layer to connect the light emitting cells, and an upper insulation layer covering the connectors and the lower insulation layer. An edge of the lower insulation layer is spaced apart farther from an edge of the upper insulation layer than an edge of the light emitting cell. The lower insulation layer susceptible to moisture may be protected and reliability of the light emitting diode may improve.
    Type: Application
    Filed: November 15, 2021
    Publication date: May 19, 2022
    Inventors: Se Hee OH, Hyun A. KIM, Jong Kyu KIM, Jong Hyeon CHAE
  • Patent number: 11282892
    Abstract: A light-emitting element includes a light-emitting structure including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer interposed between the first conductive semiconductor layer and the second conductive semiconductor layer; a first contact electrode and a second contact electrode located on the light-emitting structure, and respectively making ohmic contact with the first conductive semiconductor layer and the second conductive semiconductor layer; an insulation layer for covering a part of the first contact electrode and the second contact electrode so as to insulate the first contact electrode and the second contact electrode; a first electrode pad and a second electrode pad electrically connected to each of the first contact electrode and the second contact electrode; and a radiation pad formed on the insulation layer, and radiating heat generated from the light-emitting structure.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: March 22, 2022
    Assignee: SEOUL VIOSYS CO., LTD.
    Inventors: Jong Kyu Kim, So Ra Lee, Yeo Jin Yoon, Jae Kwon Kim, Joon Sup Lee, Min Woo Kang, Se Hee Oh, Hyun A. Kim, Hyoung Jin Lim