Patents by Inventor Jose Moreira

Jose Moreira has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11948853
    Abstract: Disclosed are apparatuses and methods for fabricating the apparatuses. In one aspect, an apparatus includes a high-power die mounted on a backside of a package substrate. A heat transfer layer is disposed on the backside of the high-power die. A plurality of heat sink interconnects is coupled to the heat transfer layer. The plurality of heat sink interconnects is located adjacent the high-power die in a horizontal direction.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: April 2, 2024
    Assignees: QUALCOMM TECHNOLOGIES INCORPORATED, RF360 EUROPE GMBH
    Inventors: Jose Moreira, Markus Valtere, Juergen Portmann, Jeroen Bielen
  • Patent number: 11929299
    Abstract: Disclosed are apparatuses and methods for fabricating the apparatuses. In one aspect, an apparatus includes a high-power die mounted on a backside of a package substrate. A heat transfer layer is disposed on the backside of the high-power die. A plurality of heat sink interconnects is coupled to the heat transfer layer, where each of the plurality of heat sink interconnects is directly coupled to the heat transfer layer in a vertical orientation.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: March 12, 2024
    Assignee: QUALCOMM INCORPORATED
    Inventors: Jose Moreira, Markus Valtere, Bart Kassteen, Alberto Jose Teixeira De Queiros
  • Patent number: 11915949
    Abstract: A hybrid panel method of (and apparatus for) manufacturing electronic devices, and electronic devices manufactured thereby. As non-limiting examples, various aspects of this disclosure provide an apparatus for manufacturing an electronic device, where the apparatus is operable to, at least, receive a panel to which a subpanel is coupled, cut around a subpanel through a layer of material, and remove such subpanel from the panel. The apparatus may also, for example, be operable to couple to an upper side of the subpanel, and remove the subpanel from the panel by, at least in part, operating to rotate the subpanel relative to the panel.
    Type: Grant
    Filed: February 15, 2021
    Date of Patent: February 27, 2024
    Assignees: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD., AMKOR TECHNOLOGY PORTUGAL, S.A.
    Inventors: Bora Baloglu, Suresh Jayaraman, Ronald Huemoeller, Andre Cardoso, Eoin O'Toole, Marta Sa Santos, Luis Alves, Jose Moreira da Silva, Fernando Teixeira, Jose Luis Silva
  • Publication number: 20240061030
    Abstract: Embodiments according to the disclosure comprise an automated test equipment component, ATE component, e.g., a handler component, e.g., a handler arm, comprising a first antenna adapted to establish a wireless, e.g., near field, coupling with a device under test (DUT), e.g., comprising an antenna, e.g., comprising an antenna array, when the DUT is arranged on a loadboard, e.g., a DUT loadboard. Furthermore, the ATE component comprises a second antenna for establishing a wireless, e.g., near field, coupling with a characterizing device, e.g., a golden device, e.g., comprising an antenna, e.g., comprising an antenna array, when the characterizing device is arranged, e.g., placed, on the loadboard, wherein the DUT and the characterizing device are, for example, placed at different positions on the DUT loadboard. Moreover, the first antenna is electrically coupled, e.g., connected with a rigid electrical connection, with the second antenna, to allow for a forwarding of a signal, e.g.
    Type: Application
    Filed: November 2, 2023
    Publication date: February 22, 2024
    Inventor: José MOREIRA
  • Publication number: 20230353259
    Abstract: An embodiment provides a measurement arrangement for characterizing a radio frequency arrangement comprising a plurality of antennas. Measurement arrangement comprises a dielectric waveguide slab with a plurality of frequency converting structures, arranged in or on the dielectric waveguide slab. Measurement arrangement further comprises a plurality of waveguide transitions arranged at different positions of the dielectric waveguide slab and are coupled to respective radio frequency components. Radio frequency components are configured to transmit and/or receive radio signals. Frequency converting structures are associated with respective antennas of the plurality of antennas, and are configured to perform a frequency conversion on signals received, resulting in frequency-converted signals.
    Type: Application
    Filed: June 29, 2023
    Publication date: November 2, 2023
    Inventors: Jan HESSELBARTH, José MOREIRA, Serafin FISCHER
  • Patent number: 11782072
    Abstract: The invention relates to a probe card (PC) for use with an automatic test equipment (ATE), wherein the probe card (PC) comprises a probe head (PH) on a first side thereof, and wherein the probe card (PC) is adapted to be attached to an interface (IF) and wherein the probe card (PC) comprises a plurality of contact pads on a second side in a region opposing at least a region of the interface (IF), arranged to contact a plurality of contacts of the interface (IF), and wherein the probe card (PC) comprises one or more coaxial connectors (CCPT) arranged to mate with one or more corresponding coaxial connectors (CCPT) of the interface (IF). The invention relates further to pogo tower (PT) for connecting a wafer probe interface (WPI) of an automatic test equipment with the probe card (PC).
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: October 10, 2023
    Assignee: Advantest Corporation
    Inventors: José Moreira, Zhan Zhang, Hubert Werkmann, Fabio Pizza, Paolo Mazzucchelli
  • Patent number: 11747383
    Abstract: Embodiments of the present invention provide systems and methods for performing tests on a device under test (DUT) based on training data derived from a set of training DUTs using nearfield measurement data. Nearfield measurement data can be mapped to performance metrics that approximate performance metrics derived from the far-field measurement data. Nearfield measurements can then be performed on a DUT to generate second nearfield measurement data, and performance metrics of the DUT are generated using the second nearfield measurement data and the mapped performance metrics derived from the training DUTs.
    Type: Grant
    Filed: June 2, 2022
    Date of Patent: September 5, 2023
    Assignee: Advantest Corporation
    Inventor: José Moreira
  • Patent number: 11742960
    Abstract: Devices for testing a DUT having a circuit coupled to an antenna are disclose. The device can include a DUT location, a probe, and a ground area configured to serve as an antenna ground area for the antenna of the DUT. The ground area includes a slot that the antenna feed impedance is not affected or not affected significantly. The probe is adapted to weakly couple to the antenna of the DUT via the opening to probe a signal when the antenna of the DUT is fed by the circuit of the DUT and/or in order to couple a signal to the antenna which is fed to the circuit of the DUT by the antenna.
    Type: Grant
    Filed: February 25, 2022
    Date of Patent: August 29, 2023
    Assignee: Advantest Corporation
    Inventors: Jan Hesselbarth, José Moreira
  • Patent number: 11561242
    Abstract: The invention relates to a probe card (PC) for use with an automatic test equipment (ATE), wherein the probe card (PC) comprises a probe head (PH) on a first side thereof, and wherein the probe card (PC) is adapted to be attached to an interface (IF) and wherein the probe card (PC) comprises a plurality of contact pads on a second side in a region opposing at least a region of the interface (IF), arranged to contact a plurality of contacts of the interface (IF), and wherein the probe card (PC) comprises one or more coaxial connectors (CCPT) arranged to mate with one or more corresponding coaxial connectors (CCPT) of the interface (IF). The invention relates further to pogo tower (PT) for connecting a wafer probe interface (WPI) of an automatic test equipment with the probe card (PC).
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: January 24, 2023
    Assignee: Advantest Corporation
    Inventors: José Moreira, Zhan Zhang, Hubert Werkmann, Fabio Pizza, Paolo Mazzucchelli
  • Publication number: 20220359337
    Abstract: Disclosed are apparatuses and methods for fabricating the apparatuses. In one aspect, an apparatus includes a high-power die mounted on a backside of a package substrate. A heat transfer layer is disposed on the backside of the high-power die. A plurality of heat sink interconnects is coupled to the heat transfer layer. The plurality of heat sink interconnects is located adjacent the high-power die in a horizontal direction.
    Type: Application
    Filed: May 6, 2021
    Publication date: November 10, 2022
    Inventors: Jose MOREIRA, Markus VALTERE, Juergen PORTMANN, Jeroen BIELEN
  • Publication number: 20220359338
    Abstract: Disclosed are apparatuses and methods for fabricating the apparatuses. In one aspect, an apparatus includes a high-power die mounted on a backside of a package substrate. A heat transfer layer is disposed on the backside of the high-power die. A plurality of heat sink interconnects is coupled to the heat transfer layer, where each of the plurality of heat sink interconnects is directly coupled to the heat transfer layer in a vertical orientation.
    Type: Application
    Filed: May 6, 2021
    Publication date: November 10, 2022
    Inventors: Jose MOREIRA, Markus VALTERE, Bart KASSTEEN, Alberto Jose TEIXEIRA DE QUEIROS
  • Publication number: 20220308107
    Abstract: Devices for testing a DUT having a circuit coupled to an antenna are disclose. The device can include a DUT location for receiving a DUT, and an adapter or probe is used to wirelessly “over-the-air” (OTA) electronically test a DUT with an embedded antenna or antenna array with the measurement probe 140 located in close proximity to the DUT. The probe can be located very close to the DUT (e.g., in the near-field region). Although the probe is located in close proximity to the DUT antenna or antenna array elements it does not significantly disturb or interfere with probe during testing.
    Type: Application
    Filed: February 28, 2022
    Publication date: September 29, 2022
    Inventors: Jan Hesselbarth, José Moreira
  • Publication number: 20220291271
    Abstract: Embodiments of the present invention provide systems and methods for performing tests on a device under test (DUT) based on training data derived from a set of training DUTs using nearfield measurement data. Nearfield measurement data can be mapped to performance metrics that approximate performance metrics derived from the far-field measurement data. Nearfield measurements can then be performed on a DUT to generate second nearfield measurement data, and performance metrics of the DUT are generated using the second nearfield measurement data and the mapped performance metrics derived from the training DUTs.
    Type: Application
    Filed: June 2, 2022
    Publication date: September 15, 2022
    Inventor: José Moreira
  • Publication number: 20220276280
    Abstract: The invention relates to a probe card (PC) for use with an automatic test equipment (ATE), wherein the probe card (PC) comprises a probe head (PH) on a first side thereof, and wherein the probe card (PC) is adapted to be attached to an interface (IF) and wherein the probe card (PC) comprises a plurality of contact pads on a second side in a region opposing at least a region of the interface (IF), arranged to contact a plurality of contacts of the interface (IF), and wherein the probe card (PC) comprises one or more coaxial connectors (CCPT) arranged to mate with one or more corresponding coaxial connectors (CCPT) of the interface (IF). The invention relates further to pogo tower (PT) for connecting a wafer probe interface (WPI) of an automatic test equipment with the probe card (PC).
    Type: Application
    Filed: May 13, 2022
    Publication date: September 1, 2022
    Inventors: José MOREIRA, Zhan ZHANG, Hubert WERKMANN, Fabio Pizza, Paolo MAZZUCCHELLI
  • Publication number: 20220263212
    Abstract: A high frequency power divider circuit for distributing an input signal to two or more signal output ports, comprising: a rat race coupler, wherein the rat race coupler is configured to couple an input signal provided at an input port of the rat race coupler to a first output of the rat race coupler and to a second output of the rat race coupler; a first coupling structure coupled to the first output of the rat race coupler, to couple the first output of the rat race coupler with a first signal output port; and a second coupling structure coupled to the second output of the rat race coupler, to couple the second output of the rat race coupler with a second signal output port; wherein a characteristic impedance of a first transmission line portion between the input port and the first output of the rat race coupler deviates from a nominal ring impedance of the rat race coupler in a first direction, and wherein a characteristic impedance of a second transmission line portion between the input port and the second
    Type: Application
    Filed: May 3, 2022
    Publication date: August 18, 2022
    Inventors: Giovanni BIANCHI, José MOREIRA, Alexander QUINT
  • Publication number: 20220182155
    Abstract: Devices for testing a DUT having a circuit coupled to an antenna are disclose. The device can include a DUT location, a probe, and a ground area configured to serve as an antenna ground area for the antenna of the DUT. The ground area includes a slot that the antenna feed impedance is not affected or not affected significantly. The probe is adapted to weakly couple to the antenna of the DUT via the opening to probe a signal when the antenna of the DUT is fed by the circuit of the DUT and/or in order to couple a signal to the antenna which is fed to the circuit of the DUT by the antenna.
    Type: Application
    Filed: February 25, 2022
    Publication date: June 9, 2022
    Inventors: Jan Hesselbarth, José Moreira
  • Publication number: 20210302470
    Abstract: The invention relates to a probe card (PC) for use with an automatic test equipment (ATE), wherein the probe card (PC) comprises a probe head (PH) on a first side thereof, and wherein the probe card (PC) is adapted to be attached to an interface (IF) and wherein the probe card (PC) comprises a plurality of contact pads on a second side in a region opposing at least a region of the interface (IF), arranged to contact a plurality of contacts of the interface (IF), and wherein the probe card (PC) comprises one or more coaxial connectors (CCPT) arranged to mate with one or more corresponding coaxial connectors (CCPT) of the interface (IF). The invention relates further to pogo tower (PT) for connecting a wafer probe interface (WPI) of an automatic test equipment with the probe card (PC).
    Type: Application
    Filed: October 30, 2020
    Publication date: September 30, 2021
    Inventors: José MOREIRA, Zhan ZHANG, Hubert WERKMANN, Fabio Pizza, Paolo MAZZUCCHELLI
  • Publication number: 20210265182
    Abstract: A hybrid panel method of (and apparatus for) manufacturing electronic devices, and electronic devices manufactured thereby. As non-limiting examples, various aspects of this disclosure provide an apparatus for manufacturing an electronic device, where the apparatus is operable to, at least, receive a panel to which a subpanel is coupled, cut around a subpanel through a layer of material, and remove such subpanel from the panel. The apparatus may also, for example, be operable to couple to an upper side of the subpanel, and remove the subpanel from the panel by, at least in part, operating to rotate the subpanel relative to the panel.
    Type: Application
    Filed: February 15, 2021
    Publication date: August 26, 2021
    Inventors: Bora Baloglu, Suresh Jayaraman, Ronald Huemoeller, Andre Cardoso, Eoin O'Toole, Marta Sa Santos, Luis Alves, Jose Moreira da Silva, Fernando Teixeira, Jose Luis Silva
  • Patent number: 10936323
    Abstract: There are provided a system, a method and a computer program product for selecting an active data stream (a lane) while running Single Program Multiple Data code on a Single Instruction Multiple Data machine. The machine runs an instruction stream over input data streams and machine increments lane depth counters of all active lanes upon the thread-PC reaching a branch operation and updates the lane-PC of each active lane according to targets of the branch operation. An instruction of the instruction stream includes a barrier indicating a convergence point for all lanes to join. In response to a lane reaching a barrier: evaluating whether all lane-PCs are set to a same thread-PC; and if the lane-PCs are not set to the same thread-PC, selecting an active lane from the plurality of lanes; otherwise, incrementing the lane-PCs of all the lanes, and then selecting an active lane from the plurality of lanes.
    Type: Grant
    Filed: June 12, 2019
    Date of Patent: March 2, 2021
    Assignee: International Business Machines Corporation
    Inventors: Gheorghe Almasi, Jose Moreira, Jessica H. Tseng, Peng Wu
  • Publication number: 20190294444
    Abstract: There are provided a system, a method and a computer program product for selecting an active data stream (a lane) while running Single Program Multiple Data code on a Single Instruction Multiple Data machine. The machine runs an instruction stream over input data streams and machine increments lane depth counters of all active lanes upon the thread-PC reaching a branch operation and updates the lane-PC of each active lane according to targets of the branch operation. An instruction of the instruction stream includes a barrier indicating a convergence point for all lanes to join. In response to a lane reaching a barrier: evaluating whether all lane-PCs are set to a same thread-PC; and if the lane-PCs are not set to the same thread-PC, selecting an active lane from the plurality of lanes; otherwise, incrementing the lane-PCs of all the lanes, and then selecting an active lane from the plurality of lanes.
    Type: Application
    Filed: June 12, 2019
    Publication date: September 26, 2019
    Inventors: Gheorghe Almasi, Jose Moreira, Jessica H. Tseng, Peng Wu