Patents by Inventor Jose Pineda De Gyvez

Jose Pineda De Gyvez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060119991
    Abstract: A method for reducing the power consumption in a state retaining circuit during a standby mode is disclosed comprising, in an active state, providing a regular power supply (VDD) and a standby power supply (VDD STANDBY) to the state retaining circuit; for a transition from an active state to a standby state, decreasing the regular power supply to ground level and maintaining the standby power supply (VDD STANDBY) thus providing the circuit elements (36, 142, 78, 85) of the state retaining circuit with enough power for retaining the state during standby mode; and for a transition from the standby state to the active state, increasing the regular power supply (VDD) from its ground level to its active level.
    Type: Application
    Filed: August 4, 2003
    Publication date: June 8, 2006
    Inventors: Manish Garg, Kiran Batni Rao, Jose Pineda De Gyvez
  • Publication number: 20060123368
    Abstract: The present invention relates to real-time adaptive control for best Integrated Circuit (IC) performance. The adaptive behavior is carried out on a local basis. The system is partitioned into different islands (30). Each island (30) is controlled and its working conditions are modified depending on some parameters. The remainder of the chip is controlled as well, depending on other parameters. This requires that each island (30) has a local controller (36) communicating with a global controller (42). The main control parameters are e.g. supply voltage, threshold voltage and clock frequency.
    Type: Application
    Filed: May 28, 2004
    Publication date: June 8, 2006
    Inventors: Jose Pineda De Gyvez, Francesco Pessolano, Rinze Meijer, Josep Rius Vazquez, Kiran Rao
  • Publication number: 20060091941
    Abstract: Sub-circuits of an integrated circuit can act as noise sources on common conductors such as power supply lines and the substrate. Each of these conductors may act as a noise medium capable of transferring noise signals from the noise source to other sub-circuits. One or more feedback circuits are coupled between input and output points on opposite sides of where a circuit to be protected is connected to such a medium, so that a output of the feedback circuit is coupled to the noise medium closer to certain noise sources than the input of the feedback circuit. Preferably, multiple feedback circuits are cross-coupled and have transfer connections so that coupling between the input and outputs of different feedback circuit is at least partially suppressed.
    Type: Application
    Filed: October 31, 2003
    Publication date: May 4, 2006
    Inventors: Jose Pineda De Gyvez, Rosario Capor
  • Publication number: 20060038605
    Abstract: A control unit controlling a threshold voltage of a circuit unit (2) having a plurality of transistor devices, comprising a reference circuit; a measuring unit (12) measuring a threshold voltage of at least one sensing transistor of the circuit unit (2) and measuring a threshold voltage of at least one reference transistor of the reference circuit; a differential voltage generator (18) generating a differential voltage from outputs of the measuring unit (12) and a bulk connection of the transistor devices in the circuit unit (2) to which the differential voltage is fed as a biasing voltage (VB).
    Type: Application
    Filed: August 4, 2003
    Publication date: February 23, 2006
    Applicant: Koninklijke Philips Electronics N.V.
    Inventors: Jose Pineda De Gyvez, Massimo Leone