Patents by Inventor Joseph Huang

Joseph Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180267133
    Abstract: In an embodiment of the present invention, a GraphSLAM-like algorithm for signal strength SLAM is presented. This algorithm as an embodiment of the present invention shares many of the benefits of Gaussian processes yet is viable for a broader range of environments since it makes no signature uniqueness assumptions. It is also more tractable to larger map sizes, requiring O(N2) operations per iteration. In the present disclosure, an algorithm according to an embodiment of the present invention is compared to a laser-SLAM ground truth, showing that is produces excellent results in practice.
    Type: Application
    Filed: March 13, 2018
    Publication date: September 20, 2018
    Inventors: Joseph Huang, David Millman, David Stavens, Sebastian Thrun
  • Patent number: 9951424
    Abstract: A plating method includes: providing a work piece which is metal or non-metal; forming a printed layer on a predetermined region of a surface of the work piece through printing electrical conductive material on the predetermined region; forming a plated layer through plating the printed layer and the surface of the work piece.
    Type: Grant
    Filed: May 6, 2016
    Date of Patent: April 24, 2018
    Assignee: HOEY CO., LTD.
    Inventor: Joseph Huang
  • Patent number: 9927846
    Abstract: A flash drive structure includes an insulated base including an upper end, a first slot formed near the upper end, a lower end, two inclined guiding surfaces, a receiving space connected to the inclined guiding surfaces, a limiting tab disposed in the receiving space and two latches disposed on the two guiding inclined surfaces respectively; a circuit board including a surface, on which circuits and modules are mounted, and an extending portion, on which a plurality of interface elements are disposed, wherein the extending portion corresponds to the receiving space, the circuit board is mounted on a lateral surface of the insulated base through the extending portion positioned in the receiving space by the limiting tab; and a case having a hollow structure, housing the assembled insulated base and circuit board, wherein the case includes two notches configured to engage the latches.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: March 27, 2018
    Assignee: HOEY CO., LTD.
    Inventor: Joseph Huang
  • Patent number: 9915722
    Abstract: In an embodiment of the present invention, a GraphSLAM-like algorithm for signal strength SLAM is presented. This algorithm as an embodiment of the present invention shares many of the benefits of Gaussian processes yet is viable for a broader range of environments since it makes no signature uniqueness assumptions. It is also more tractable to larger map sizes, requiring O(N2) operations per iteration. In the present disclosure, an algorithm according to an embodiment of the present invention is compared to a laser-SLAM ground truth, showing that it produces excellent results in practice.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: March 13, 2018
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Joseph Huang, David Millman, David Stavens, Sebastian Thrun
  • Publication number: 20180059741
    Abstract: A flash drive structure includes an insulated base including an upper end, a first slot formed near the upper end, a lower end, two inclined guiding surfaces, a receiving space connected to the inclined guiding surfaces, a limiting tab disposed in the receiving space and two latches disposed on the two guiding inclined surfaces respectively; a circuit board including a surface, on which circuits and modules are mounted, and an extending portion, on which a plurality of interface elements are disposed, wherein the extending portion corresponds to the receiving space, the circuit board is mounted on a lateral surface of the insulated base through the extending portion positioned in the receiving space by the limiting tab; and a case having a hollow structure, housing the assembled insulated base and circuit board, wherein the case includes two notches configured to engage the latches.
    Type: Application
    Filed: August 29, 2016
    Publication date: March 1, 2018
    Inventor: Joseph HUANG
  • Publication number: 20180021460
    Abstract: Disclosed herein are novel photocontrollable probes and methods for detecting aggregated forms of amyloidogenic proteins in cells, tissues, or organs of a live subject. Results of such detection may be useful for making prognosis on the subject whether he/she suffers from a neurodegenerative disease and/or diabetes mellitus.
    Type: Application
    Filed: June 21, 2017
    Publication date: January 25, 2018
    Applicant: Academia Sinica
    Inventors: Jen-Tse Joseph HUANG, Ruei-Yu HE
  • Patent number: 9711189
    Abstract: A buffer circuit with an adjustable reference voltage is presented. The buffer circuit with adjustable reference voltage has an input buffer circuit that is connected to a data input and a reference voltage. The output of the input buffer circuit is connected an eye monitor circuit that generates a transition signal based on a number of transitions of an output of the input buffer circuit. The output from the eye monitor circuit is that processed by a calibration control circuit that transmits a selection signal to a multiplexer. The multiplexer selects a level of the reference voltage based on the selection signal from the calibration control circuit.
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: July 18, 2017
    Assignee: Altera Corporation
    Inventors: Bonnie I. Wang, Chiakang Sung, Xiaobao Wang, Yan Chong, Joseph Huang, Khai Nguyen, Pradeep Nagarajan
  • Publication number: 20170005662
    Abstract: Methods and apparatus for providing either high-speed, Or lower-speed, flexible inputs and outputs. An input and output structure having a high-speed input, a high-speed output, a low or moderate speed input, and an low or moderate speed output is provided. One of the input and output circuits are selected and the others are deselected. The high-speed input and output circuits are comparatively simple, in one example having only a clear signal for a control line input, and are able to interface to lower speed circuitry inside the core of an integrated circuit. The low or moderate speed input and output circuits are more flexible, for example, having preset, enable, and clear as control line inputs, and are able to support JTAG boundary testing. These parallel high and lower speed circuits are user selectable such that the input Output structure is optimized between speed and functionality depending on the requirements of the application.
    Type: Application
    Filed: September 16, 2016
    Publication date: January 5, 2017
    Inventors: Bonnie I. Wang, Chiakang Sung, Joseph Huang, Khai Q. Nguyen, Philip Y. Pan
  • Publication number: 20170005661
    Abstract: Methods and apparatus for providing either high-speed, Or lower-speed, flexible inputs and outputs. An input and output structure having a high-speed input, a high-speed output, a low or moderate speed input, and an low or moderate speed output is provided. One of the input and output circuits are selected and the others are deselected. The high-speed input and output circuits are comparatively simple, in one example having only a clear signal for a control line input, and are able to interface to lower speed circuitry inside the core of an integrated circuit. The low or moderate speed input and output circuits are more flexible, for example, having preset, enable, and clear as control line inputs, and are able to support JTAG boundary testing. These parallel high and lower speed circuits are user selectable such that the input Output structure is optimized between speed and functionality depending on the requirements of the application.
    Type: Application
    Filed: September 16, 2016
    Publication date: January 5, 2017
    Inventors: Bonnie I. Wang, Chiakang Sung, Joseph Huang, Khai Q. Nguyen, Philip Y. Pan
  • Patent number: 9525231
    Abstract: A flash drive includes a housing, a storage module, a plug head, a positioning element and a rotatable cover. The housing has an inner space formed by a front wall and a rear wall for accommodating other elements. The storage module has a metal sheet at one end for connecting a connecting plate including a plurality of metal terminals and a plurality of welding pads at the other end for connecting a plug head. The positioning element positions the storage module in the housing and the plug head protruding from a lateral wall of the housing (the top wall of the housing). The rotatable cover is eccentric-rotatably disposed on the housing to cover or uncover the plug head.
    Type: Grant
    Filed: July 9, 2015
    Date of Patent: December 20, 2016
    Assignee: HOEY CO., LTD.
    Inventor: Joseph Huang
  • Patent number: 9519316
    Abstract: A flash drive includes a housing comprising a front wall, a rear wall and an inner space formed by the front wall and the rear wall; a storage module disposed in the inner space; a plug head mounted at one end of the storage module; a positioning element positioning the storage module in the inner space of the housing in such a manner that the plug head protrudes from one end of the housing; and a cover pivoted to the front wall and the rear wall through an eccentric-rotation structure to cover or uncover the plug head.
    Type: Grant
    Filed: July 9, 2015
    Date of Patent: December 13, 2016
    Assignee: HOEY CO., LTD.
    Inventor: Joseph Huang
  • Publication number: 20160355929
    Abstract: A plating method includes: providing a work piece which is metal or non-metal; forming a printed layer on a predetermined region of a surface of the work piece through printing electrical conductive material on the predetermined region; forming a plated layer through plating the printed layer and the surface of the work piece.
    Type: Application
    Filed: May 6, 2016
    Publication date: December 8, 2016
    Inventor: Joseph HUANG
  • Patent number: 9473145
    Abstract: Methods and apparatus for providing either high-speed, or lower-speed, flexible inputs and outputs. An input and output structure having a high-speed input, a high-speed output, a low or moderate speed input, and an low or moderate speed output is provided. One of the input and output circuits are selected and the others are deselected. The high-speed input and output circuits are comparatively simple, in one example having only a clear signal for a control line input, and are able to interface to lower speed circuitry inside the core of an integrated circuit. The low or moderate speed input and output circuits are more flexible, for example, having preset, enable, and clear as control line inputs, and are able to support JTAG boundary testing. These parallel high and lower speed circuits are user selectable such that the input output structure is optimized between speed and functionality depending on the requirements of the application.
    Type: Grant
    Filed: August 1, 2014
    Date of Patent: October 18, 2016
    Assignee: Altera Corporation
    Inventors: Bonnie I. Wang, Chiakang Sung, Joseph Huang, Khai Q. Nguyen, Philip Y. Pan
  • Patent number: 9431747
    Abstract: A flash drive and protective cover mounting structure includes a flash drive consisting of a casing, a memory module, a electrical connector and a positioning member, and a protective cover including a substantially U-shaped and relatively larger outer cover component having a smooth outer surface and a substantially U-shaped and relatively smaller inner cover component mounted in the outer cover component pivotally connected to the casing and biasable relative to the casing between an open position to expose the electrical connector and a closed position to shield the electrical connector.
    Type: Grant
    Filed: September 18, 2015
    Date of Patent: August 30, 2016
    Assignee: HOEY CO., LTD.
    Inventor: Joseph Huang
  • Publication number: 20160216359
    Abstract: In an embodiment of the present invention, a GraphSLAM-like algorithm for signal strength SLAM is presented. This algorithm as an embodiment of the present invention shares many of the benefits of Gaussian processes yet is viable for a broader range of environments since it makes no signature uniqueness assumptions. It is also more tractable to larger map sizes, requiring O(N2) operations per iteration. In the present disclosure, an algorithm according to an embodiment of the present invention is compared to a laser-SLAM ground truth, showing that it produces excellent results in practice.
    Type: Application
    Filed: November 30, 2015
    Publication date: July 28, 2016
    Applicant: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Joseph Huang, David Millman, David Stavens, Sebastian Thrun
  • Patent number: D798875
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: October 3, 2017
    Assignee: HOEY CO., LTD.
    Inventor: Joseph Huang
  • Patent number: D798876
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: October 3, 2017
    Assignee: HOEY CO., LTD.
    Inventor: Joseph Huang
  • Patent number: D798877
    Type: Grant
    Filed: July 6, 2016
    Date of Patent: October 3, 2017
    Assignee: HOEY CO., LTD.
    Inventor: Joseph Huang
  • Patent number: D798878
    Type: Grant
    Filed: July 6, 2016
    Date of Patent: October 3, 2017
    Assignee: HOEY CO., LTD.
    Inventor: Joseph Huang
  • Patent number: D798879
    Type: Grant
    Filed: July 6, 2016
    Date of Patent: October 3, 2017
    Assignee: HOEY CO., LTD.
    Inventor: Joseph Huang