Abstract: The present disclosure provides an integrated circuit with an interconnect structure and a method for forming the integrated circuit. In one embodiment, a method of the present disclosure includes receiving a workpiece that includes a first recess in a dielectric layer over the workpiece, depositing a contact fill in the first recess and over the dielectric layer to form a contact feature, planarizing a top surface of the workpiece to remove the contact fill over the dielectric layer, depositing an interlayer dielectric layer over the planarized top surface of the workpiece, forming a second recess in the interlayer dielectric layer to expose the contact fill in the dielectric layer, recessing the contact fill by soaking the workpiece in a room temperature ionic liquid, and depositing a conductive layer over the recessed contact fill. The material forming the contact fill is soluble in the room temperature ionic liquid.

Abstract: A method includes depositing a plurality of first semiconductor layers and a plurality of second semiconductor layers over a substrate, wherein the first semiconductor layers and the second semiconductor layers are stacked alternately; patterning the first and second semiconductor layers to form a fin structure; supplying a first bias to the substrate after patterning the first and second semiconductor layers; and etching the second semiconductor layers when the semiconductor substrate is supplied with the first bias, wherein etching the second semiconductor layers is performed such that the first semiconductor layers are suspended above the substrate.

Abstract: An HVAC system is provided. Embodiments of the present disclosure generally relate to an HVAC system in which multiple indoor units are coupled to central outdoor unit, where at least one of the indoor units is configured to provide conditioned air through ductwork and at least one indoor unit is configured to provide conditioned air without ductwork. Moreover, a gas furnace can be provided in the system, for harsher environments that benefit from more robust heating. Additional systems, devices, and methods are also disclosed.

Abstract: The present disclosure provides systems and methods for entropy balanced population measurement. Entropy balancing is a statistical technique for preprocessing data to achieve covariate balance. Weighting coefficients may be dynamically adjusted to satisfy balance conditions or constraints to adjust for inequalities in representation, thereby improving covariate moments. Using entropy balancing and linear regression analysis with panel content exposure and results data provides a mechanism to estimate the effects of multiple exposure vectors simultaneously, including instances where panelists are exposed to a vector multiple times. Data may be obfuscated or anonymized for preprocessing via a double-encrypted intersection-based extraction mechanism, allowing both measurement systems and panel providers to retain confidential information.

Abstract: Methods for manufacturing semiconductor structures are provided. The method for manufacturing the semiconductor structure includes forming a fin structure protruding from a substrate and forming a source/drain structure over the fin structure. The method for manufacturing a semiconductor structure further includes forming a metallic layer over the source/drain structure and forming an oxide film on a sidewall of the source/drain structure. In addition, the oxide film and the metallic layer are both in direct contact with the source/drain structure.

Abstract: An HVAC system is provided. Embodiments of the present disclosure generally relate to an HVAC system in which multiple indoor units are coupled to central outdoor unit, where at least one of the indoor units is configured to provide conditioned air through ductwork and at least one indoor unit is configured to provide conditioned air without ductwork. Moreover, a gas furnace can be provided in the system, for harsher environments that benefit from more robust heating. Additional systems, devices, and methods are also disclosed.

Abstract: A split stabilizer bearing for a mast of a rotary distributor includes a split cylindrical housing, a split filament wound bushing, a plurality of polytetrafluoroethylene-coated carbon fiber ring seals, an annular split seal retainer, and multiple fasteners. The filament wound bushing is disposed inside the housing, along an inner surface thereof. The bushing has a backing layer of high-strength glass fiber and an inner sliding layer of polytetrafluoroethylene (PTFE) and polymer fiber, the two layers both embedded in a epoxy resin matrix. The carbon fiber ring seals are disposed on axially or longitudinally opposed sides of the bushing and along an inner side or surface of the cylindrical housing, preferably in respective annular recesses or offsets along the inner side or surface of the housing. The fasteners, nylon-patch locking screws or bolts, couple the bushing and the split seal retainer to the housing.

Abstract: A semiconductor device includes first and second semiconductor fins, a first gate structure, and a second gate structure. The first and second semiconductor fins respectively includes a first channel region and a second channel region, which the first and second gate structures are respectively on. The first gate structure includes a first silicon oxide layer on the first channel region, a first high-k dielectric layer on the first silicon oxide layer, and a first metal gate on the first high-k dielectric layer. The second gate structure includes a second silicon oxide layer on the second channel region, a second high-k dielectric layer on the second silicon oxide layer, and a second metal gate on the second high-k dielectric layer. The first silicon oxide layer has a Si4+ ion concentration greater than a Si4+ ion concentration of a bottom portion of the second silicon oxide layer.

Abstract: An HVAC system is provided.

Abstract: Methods for manufacturing semiconductor structures are provided. The method for manufacturing a semiconductor structure includes forming a source/drain structure over a substrate and forming a metal layer over the source/drain structure. The method for manufacturing a semiconductor structure further includes reacting a portion of the metal layer with the source/drain structure to form a metallic layer by using an etching solvent. In addition, the etching solvent includes (a) a first component and (b) a second component. The first component includes an acid, and the second component includes propylene carbonate (PC), ethylene carbonate (EC), diethyl carbonate (DEC), or a combination thereof.

Abstract: A delivery system includes a catheter, and a drug coated angioplasty balloon mounted on the catheter. The balloon has a wrapped or folded delivery configuration and an expanded deployed configuration. A protective sleeve surrounds the drug coated balloon in the delivery configuration to minimise wash-off of drug from the balloon during delivery. The protective sleeve is retractable, so that once the drug coated balloon is at or near the treatment site, the sleeve can be retracted to allow the drug coated balloon to operate effectively. The protective sleeve can have a spacer mounted to or integral with the protective sleeve. The spacer in one case can comprise of interior ribs or ridges on the sleeve which minimise the surface area of the sleeve in direct contact with the drug coating on the balloon.

Abstract: A method includes depositing a plurality of first semiconductor layers and a plurality of second semiconductor layers over a substrate, wherein the first semiconductor layers and the second semiconductor layers are stacked alternately; patterning the first and second semiconductor layers to form a fin structure; supplying a first bias to the substrate after patterning the first and second semiconductor layers; and etching the second semiconductor layers when the semiconductor substrate is supplied with the first bias, wherein etching the second semiconductor layers is performed such that the first semiconductor layers are suspended above the substrate.

Abstract: A method of fabricating a semiconductor device includes forming a semiconductor fin comprising a channel region for a fin field effect transistor (finFET). A gate oxide layer is then formed on the channel. The gate oxide layer is treated with a nitrogen containing agent so as to form a nitrogenous layer and an interfacial layer. The nitrogenous layer is then removed. A high-k dielectric layer is formed on the interfacial layer. A metal gate is formed on the high-k dielectric layer. The nitrogenous layer is removed by rinsing the semiconductor fin with deionized water. The gate oxide and interfacial layer contains the same material.

Abstract: The present invention is realized by apparatus and methods for harvesting, storing, and generating energy by permanently placing a large rigid buoyant platform high in the earth's atmosphere, above clouds, moisture, dust, and wind. Long, strong and light tethers can connect the buoyant structure to the ground which can hold it in position against wind forces. Weights suspended from the buoyant platform with cables are raised and lowered by electric winches to store and release gravitational potential energy. High voltage transmission lines electrically connect the platform to the earth's surface. Electrical energy from the high voltage transmission lines or from photovoltaic arrays on the platform can be stored as gravitational potential energy and subsequently released as electricity from generators driven from the stored gravitational potential energy and used on the platform or transmitted via the high voltage transmission lines.

Abstract: A method includes forming a semiconductor fin on a semiconductor substrate, the semiconductor fin comprising germanium, silicon, silicon germanium or any of III-V elements; forming a mask layer on a top portion of the semiconductor fin; and trimming the semiconductor fin, wherein trimming the semiconductor fin comprises: immersing the semiconductor substrate in a first electrolyte bath; and laterally removing a first portion of the semiconductor fin by supplying a first voltage to a counter electrode in the electrolyte bath and a second voltage to the semiconductor substrate, wherein the second voltage is negative.