Patents by Inventor Joseph T. Dibene, II

Joseph T. Dibene, II has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090167282
    Abstract: A voltage regulator is provided that includes a power cell to provide a calibrated output voltage based on a voltage identification (VID) offset, and a master controller to provide a VID code to the power cell. The power cell to calibrate the output voltage based on the VID code received from the master controller and based on the VID offset.
    Type: Application
    Filed: December 28, 2007
    Publication date: July 2, 2009
    Inventors: Henry W. Koertzen, Joseph T. Dibene, II, Dave Gordon
  • Publication number: 20090153109
    Abstract: In some embodiments, the number of active cells in a multi-cell voltage regulator is controlled so that the current-per-active-cell approaches a predefined target or to be within an acceptable range so that the active cells operate with suitable efficiency.
    Type: Application
    Filed: December 15, 2007
    Publication date: June 18, 2009
    Inventors: Henry W. Koertzen, Joseph T. Dibene, II
  • Publication number: 20090089607
    Abstract: Systems and method for providing a regulated voltage supply to an integrated circuit. In an embodiment of the invention, a voltage regulator in a system provides an integrated circuit in the system with information related to the voltage regulator providing a supply voltage to the integrated circuit. In another embodiment of the invention, the integrated circuit makes determinations about the operating characteristic of the system using information from the voltage regulator.
    Type: Application
    Filed: September 29, 2007
    Publication date: April 2, 2009
    Inventors: Jorge Rodriguez, Alon Naveh, Gil Schwarzband, Hung-Piao Ma, Stefan Rusu, James G. Hermerding, Ishmael F. Santos, Joseph T. Dibene, II, Edward Stanford
  • Patent number: 7245507
    Abstract: A microprocessor packaging architecture using a modular circuit board assembly that provides power to a microprocessor while also providing for integrated thermal and electromagnetic interference (EMI) is disclosed. The modular circuit board assembly comprises a substrate, having a component mounted thereon, a circuit board, including a circuit for supplying power to the component, and at least one conductive interconnect device disposed between the substrate and the circuit board, the conductive interconnect device configured to electrically couple the circuit to the component.
    Type: Grant
    Filed: July 23, 2002
    Date of Patent: July 17, 2007
    Inventors: Joseph T. DiBene, II, David H. Hartke, James J. Hjerpe Kaskade, Carl E. Hoge
  • Patent number: 7167379
    Abstract: An assembly includes an electronic assembly with a microprocessor coupled to a power conversion assembly via a compliant conductor assembly. The compliant conductor assembly includes a plurality of spring conductors mounted in a carrier. Selected ones of the spring conductors are electromagnetically coupled with others of the spring conductors. Additionally, each spring conductor provides multiple conductive paths.
    Type: Grant
    Filed: April 30, 2003
    Date of Patent: January 23, 2007
    Inventors: Joseph T. DiBene, II, Edward J. Derian
  • Patent number: 6801431
    Abstract: The present invention is described as an integrated electronic assembly. The electronic assembly comprises a heat dissipating device, a power conditioning circuit board, a power dissipating device mounted on a substrate, and a power interconnect assembly. The power conditioning circuit board includes a first side thermally coupled to the heat dissipating device, a power conditioning circuit for producing a conditioned power signal, and an aperture. The power dissipating device has a top surface thermally coupled to the heat dissipation device through an aperture. The substrate includes at least one power conductor disposed proximate at least one of the edges of the substrate. The power interconnection assembly, which electrically couples the conditioned power signal to the substrate and provides substantially all power to the substrate, includes an edge connector assembly removably coupled to the at least one edge of the substrate.
    Type: Grant
    Filed: November 8, 2002
    Date of Patent: October 5, 2004
    Assignee: Incep Technologies, Inc.
    Inventors: David J Hartke, Joseph T. Dibene, II, Edward J. Derian, James M. Broder
  • Patent number: 6754086
    Abstract: A synchronous voltage regulation circuit having an energy storage circuit for controlling the output signal is disclosed. The voltage regulation circuit includes a circuit which advantageously uses leakage inductance from loose coupling of input and output inductors to control regulator switching.
    Type: Grant
    Filed: September 17, 2002
    Date of Patent: June 22, 2004
    Assignee: Incep Technologies, Inc.
    Inventors: Philip M. Harris, Joseph T. DiBene, II
  • Patent number: 6618268
    Abstract: A method, apparatus, and article of manufacture for providing power from a first circuit board having a first circuit board first conductive surface and a first circuit board second conductive surface to a second circuit board having a second circuit board first conductive surface and a second circuit board second conductive surface is described. The apparatus comprises a first conductive member, including a first end having a first conductive member surface electrically coupleable to the first circuit board first conductive surface and a second end distal from the first end having a first conductive member second surface electrically coupleable to the second circuit board first surface.
    Type: Grant
    Filed: March 8, 2001
    Date of Patent: September 9, 2003
    Assignee: Incep Technologies, Inc.
    Inventors: Joseph T. Dibene, II, David H. Hartke, Edward J. Derian, Carl E. Hoge, James M. Broder, Jose B. San Andres, Joseph S. Riel
  • Patent number: 6609914
    Abstract: A system and method for interconnecting circuit boards is disclosed. In one embodiment, a first circuit board connects with a second circuit board via a connector. The first circuit board has an aperture with a plurality of conductive surfaces on an inner surface. At least one of the conductive surfaces is coupled to at least one of a plurality of first circuit board traces. The second circuit board has a plurality of second circuit board traces. Therebetween, the connector has a plurality of conductive signal conductors, each having a first portion disposed at the periphery of the connector and adjacent to the conductive surfaces and a second portion coupled with the second circuit board traces.
    Type: Grant
    Filed: August 2, 2001
    Date of Patent: August 26, 2003
    Assignee: Incep Technologies, Inc.
    Inventor: Joseph T. Dibene, II
  • Patent number: 6556455
    Abstract: A power interconnection system comprising a plurality of z-axis compliant connectors passing power and ground signals between a first circuit board to a second circuit board is disclosed. The interconnection system provides for an extremely low impedance through a broad range of frequencies and allows for large amounts of current to pass from one substrate to the next either statically or dynamically. The interconnection system may be located close to the die or may be further away depending upon the system requirements. The interconnection may also be used to take up mechanical tolerances between the two substrates while providing a low impedance interconnect.
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: April 29, 2003
    Assignee: Incep Technologies, Inc.
    Inventors: Joseph T. Dibene, II, David H. Hartke, Carl E. Hoge, Edward J. Derian
  • Patent number: 6490160
    Abstract: A heat transfer device wherein a vapor chamber is combined with a pin structure that allows the highly conductive cooling vapors to flow within the pins of a pin array maximizing the efficiency of both components of the heat sink into one unit is disclosed. In one embodiment the heat transfer device comprises a thermally conductive chamber having a first thermally conductive chamber portion having a base thermally coupleable to a heat dissipating device; a second thermally conductive chamber portion having a plurality of hollow protrusions extending away from and in fluid communication with the first thermally conductive chamber portion wherein the thermally conductive chamber comprises a fluid vaporizable when in thermal communication with the heat dissipating device and condensable when in thermal communication with the hollow protrusions.
    Type: Grant
    Filed: August 2, 2001
    Date of Patent: December 3, 2002
    Assignee: INCEP Technologies, Inc.
    Inventors: Joseph T. Dibene, II, Farhad Raiszadeh
  • Patent number: 6452804
    Abstract: A stack up assembly for supplying power and removing heat from a microprocessor while controlling electromagnetic emissions is disclosed. The stack up assembly comprises a VRM circuit board or power regulation module, having a first side and a second side; a thermally conductive plate such as a vapor plate having a first side and a second side, wherein the thermally conductive plate first side is thermally coupled to the second side of the VRM circuit board; and a microprocessor having a first side and a second side, the microprocessor first side thermally coupled to the vapor plate second side.
    Type: Grant
    Filed: March 8, 2001
    Date of Patent: September 17, 2002
    Assignee: INCEP Technologies, Inc.
    Inventors: Joseph T. Dibene, II, David H. Hartke
  • Patent number: 6429386
    Abstract: A printed circuit board with an imbedded electrical component, comprising three layers. The first and second layers are coupled together, and an area of the second layer of the printed circuit board is selectively removed to expose a portion of the first layer of the printed circuit board. The opening accepts an electrical component that is mounted to the first layer of the printed circuit board within the selectively removed area of the second layer of the printed circuit board. The third layer of the printed circuit board is coupled to the second layer of the printed circuit board, at least partially covers the selectively removed area of the second layer of the printed circuit board, and at least partially covers the mounted component within the selectively removed area of the second layer of the printed circuit board.
    Type: Grant
    Filed: June 27, 2001
    Date of Patent: August 6, 2002
    Assignee: NCR Corporation
    Inventors: Joseph T. DiBene, II, P. Keith Muller, Irving M. Robinson
  • Publication number: 20020008963
    Abstract: A modular circuit board assembly is disclosed. The modular circuit board assembly comprises a substrate, a circuit board, and a component, disposed between the circuit board and the substrate, the component physically and electrically coupled to the substrate. In one embodiment, the circuit board also comprises an aperture allowing for the transmission of thermal energy from the component to a heat sink. In still another embodiment of the invention, the heat sink includes a mesa having surface features cooperatively interacting with surface features on the component or members mounted on the component to provide for location and/or retention.
    Type: Application
    Filed: March 26, 2001
    Publication date: January 24, 2002
    Inventors: Joseph T. DiBene, II, David H. Hartke
  • Patent number: 6243269
    Abstract: An apparatus for centralizing heat dissipation on printed circuit boards is disclosed. The printed circuit board materials are used to thermally conduct heat from a circuit that generates heat to a heat sink. The heat sink can be the layer on the printed circuit board, conductive paths on a layer of a printed circuit board, or the layers of the printed circuit board can be used to thermally couple the heat generating circuit to an external, remote heat sink for heat dissipative purposes.
    Type: Grant
    Filed: December 29, 1998
    Date of Patent: June 5, 2001
    Assignee: NCR Corporation
    Inventors: Joseph T. Dibene, II, Gang Wang, P. Keith Muller
  • Patent number: 5972231
    Abstract: A method and apparatus for coupling high speed data components using imbedded PCB AC coupling capacitors is disclosed. The capacitor comprises a first and a second conductive plate of polygonal shape coupled to surrounding circuitry at the polygonal vertices of the polygonal plates. This configuration results in improved capacitor performance, particularly with respect to capacitive impedance and reflected waves for high bandwidth signals at the frequency ranges of interest.
    Type: Grant
    Filed: October 31, 1997
    Date of Patent: October 26, 1999
    Assignee: NCR Corporation
    Inventor: Joseph T. DiBene, II
  • Patent number: 5969579
    Abstract: A Pulse Amplitude Modulation (PAM) generator that generates multilevel PAM signals at frequencies over 1 GHz is disclosed. The PAM generator uses Emitter Coupled Logic (ECL) technology that implements differential pair current switches such that the outputs are summed to produce precisely balanced PAM signals.
    Type: Grant
    Filed: October 17, 1997
    Date of Patent: October 19, 1999
    Assignee: NCR Corporation
    Inventors: David Hartke, Joseph T. DiBene, II
  • Patent number: 5044975
    Abstract: An improved cable connector locking arrangement suitable for D-shell connectors eliminates the standoffs and threaded knobs in standard design and replaces them with tabbed, resilient flanges which snap in place for quick mating and locking of the D-shell connectors. Release bars in the preferred embodiment displace the flanges and hence tabs away from their mating surface for unlocking and disconnection of the connectors.
    Type: Grant
    Filed: November 5, 1990
    Date of Patent: September 3, 1991
    Assignee: NCR Corporation
    Inventors: Joseph T. DiBene, II, William F. Roosa, Warren W. Porter