Abstract: The present invention relates to a 6-(isooxazolidin-2-yl)-N-phenylpyrimidin-4-amine derivative, and a pharmaceutical composition for preventing or treating cancer comprising the compound as an effective component. The compound exhibits high inhibitory activity against an epidermal growth factor receptor (EGFR) variant, or wild-type or variants of one or more of ERBB2 and ERBB4, and thus may be usefully used in the treatment of cancers in which same are expressed. In particular, the compound exhibits excellent inhibitory activity on proliferation of lung cancer cell lines, and thus can be usefully used in the treatment of lung cancer.

Abstract: A display device includes a display portion including a first surface, from which light is emitted in a first direction, and a second surface opposite to the first surface, a first optical portion disposed on the first surface, and a second optical portion disposed on the first surface to be spaced apart from the first optical portion in a second direction crossing the first direction. Each of the first and second optical portions includes a multi-channel lens through which the light from the first surface passes, a first infrared light source, a first camera, and a first lens frame coupled to the multi-channel lens in the first direction to support at least a portion of the multi-channel lens. The first lens frame may include a first recess structure in which the first infrared light source is disposed and a second recess structure in which the first camera is disposed.

Abstract: The present invention relates to a 5th-generation (5G) or pre-5G communication system to be provided in order to support a higher data transmission rate than a beyond 4th-generation (4G) communication system such as long term evolution (LTE). The present invention relates to a signal transmission method of a radio frequency (RF) processing device, the method comprising the steps of: generating a pulse signal including a control signal and a clock signal for obtaining synchronization with another RF processing device, which is connected through an interface; and transmitting, to the another RF processing device, at least one from among the pulse signal, a RF signal for communication with a base station, and a power signal for supplying power to the another RF processing device, wherein the clock signal and the control signal are assigned to different time units, and the pulse signal, the RF signal and the power signal are signals of different frequency bands.

Abstract: An apparatus and a method for phase calibration in a radio frequency (RF) module that constitutes a wireless communication device are provided. The apparatus and method include a test signal is emitted by a forward transmission antenna array of a first antenna array, and the emitted test signal, which is transferred by a member that covers the first and second antenna arrays, is received through a forward reception antenna array of the second antenna array. On the basis of the received test signal, a phase value is calibrated with regard to each of chain combinations formed by the first and second antenna arrays. Forward chain combinations that constitute the chain combination may be determined by a combination of forward transmission chains, which correspond to respective transmission antennas that constitute the forward transmission antenna array, and forward reception chains, which correspond to respective reception antennas that constitute the forward reception antenna array.

Abstract: The present invention relates to a fifth generation (5G) or pre-5G communication system to be provided to support a data transmission rate higher than that of a fourth generation (4G) communication system, such as long term evolution (LTE), and subsequent communication systems. The radio frequency (RF) processing device of the present invention comprises: at least one antenna; an RF unit for performing communication with a base station by using the at least one antenna; a signal filter unit for dividing and outputting, when a signal is received from another RF processing device connected through one interface, a radio signal and a control signal for communicating with the base station from the received signal; a clock signal detection unit for detecting a clock signal from the control signal when the control signal is output from the signal filter unit; and a control unit for performing an operation according to the control signal according to the clock signal-based timing.

Abstract: Disclosed is a power divider circuit providing a mutual inductance and including a first primary inducing element having a first terminal connected with a first output port and a second terminal connected with a second primary inducing element having a first terminal connected with a second output port and a second terminal connected with the first primary inducing element and magnetically and mutually coupled with the first primary inducing element, a sub inducing element having a first terminal connected with an input port and a second terminal connected with the second terminal of the first primary inducing element and the second terminal of the second primary inducing element, and an isolation network connected between the first output port and the second output port. The sub inducing element is magnetically and mutually coupled with each of the first primary inducing element and the second primary inducing element.

Abstract: An apparatus and method for controlling power in a communication system are provided. The method includes amplifying an input signal by a second processor farther from an antenna than a first processor, and determining whether to enable or disable each of the first processor and the second processor based on results from the amplification by the second processor. Another method includes amplifying an input signal from an antenna by a second processor electrically farther from the antenna than a first processor, and determining whether to operate the first processor and the second processor based on a value related to a reception state for the amplified signal by the second processor.

Abstract: The present invention relates to a method and an apparatus for direct current offset calibration of a direct conversion receiver, a Direct Current (DC) offset calibration apparatus of a direct conversion receiver includes a plurality of variable gain amplifiers for amplifying an input signal based on a gain control value, a DC offset monitoring unit for monitoring a DC offset for an output signal of the plurality of variable gain amplifiers, a plurality of variable Digital to Analog Converters (DACs) for controlling a current applied to each of the plurality of variable gain amplifiers according to a current control code, and a DC offset cancellation unit for determining a current control code set which minimizes the DC offset value per preset gain control value, and thus the DC offset can be precisely cancelled without being affected by external factors such as a signal modulation method and heat and performance degradation of the receiver can be prevented.

Abstract: The present invention relates to a 5th-generation (5G) or pre-5G communication system to be provided in order to support a higher data transmission rate than a beyond 4th-generation (4G) communication system such as long term evolution (LTE). The present invention relates to a signal transmission method of a radio frequency (RF) processing device, the method comprising the steps of: generating a pulse signal including a control signal and a clock signal for obtaining synchronization with another RF processing device, which is connected through an interface; and transmitting, to the another RF processing device, at least one from among the pulse signal, a RF signal for communication with a base station, and a power signal for supplying power to the another RF processing device, wherein the clock signal and the control signal are assigned to different time units, and the pulse signal, the RF signal and the power signal are signals of different frequency bands.

Abstract: The present invention relates to a fifth generation (5G) or pre-5G communication system to be provided to support a data transmission rate higher than that of a fourth generation (4G) communication system, such as long term evolution (LTE), and subsequent communication systems. The radio frequency (RF) processing device of the present invention comprises: at least one antenna; an RF unit for performing communication with a base station by using the at least one antenna; a signal filter unit for dividing and outputting, when a signal is received from another RF processing device connected through one interface, a radio signal and a control signal for communicating with the base station from the received signal; a clock signal detection unit for detecting a clock signal from the control signal when the control signal is output from the signal filter unit; and a control unit for performing an operation according to the control signal according to the clock signal-based timing.

Abstract: Disclosed is a power divider circuit providing a mutual inductance and including a first primary inducing element having a first terminal connected with a first output port and a second terminal connected with a second primary inducing element having a first terminal connected with a second output port and a second terminal connected with the first primary inducing element and magnetically and mutually coupled with the first primary inducing element, a sub inducing element having a first terminal connected with an input port and a second terminal connected with the second terminal of the first primary inducing element and the second terminal of the second primary inducing element, and an isolation network connected between the first output port and the second output port. The sub inducing element is magnetically and mutually coupled with each of the first primary inducing element and the second primary inducing element.

Abstract: An apparatus and a method for phase calibration in an radio frequency (RF) module that constitutes a wireless communication device are provided. The apparatus and method include a test signal is emitted by a forward transmission antenna array of a first antenna array, and the emitted test signal, which is transferred by a member that covers the first and second antenna arrays, is received through a forward reception antenna array of the second antenna array. On the basis of the received test signal, a phase value is calibrated with regard to each of chain combinations formed by the first and second antenna arrays. Forward chain combinations that constitute the chain combination may be determined by a combination of forward transmission chains, which correspond to respective transmission antennas that constitute the forward transmission antenna array, and forward reception chains, which correspond to respective reception antennas that constitute the forward reception antenna array.

Abstract: The present invention relates to a method and an apparatus for direct current offset calibration of a direct conversion receiver, a Direct Current (DC) offset calibration apparatus of a direct conversion receiver includes a plurality of variable gain amplifiers for amplifying an input signal based on a gain control value, a DC offset monitoring unit for monitoring a DC offset for an output signal of the plurality of variable gain amplifiers, a plurality of variable Digital to Analog Converters (DACs) for controlling a current applied to each of the plurality of variable gain amplifiers according to a current control code, and a DC offset cancellation unit for determining a current control code set which minimizes the DC offset value per preset gain control value, and thus the DC offset can be precisely cancelled without being affected by external factors such as a signal modulation method and heat and performance degradation of the receiver can be prevented.

Abstract: An apparatus and method for controlling power in a communication system are provided. The method includes amplifying an input signal by a second processor farther from an antenna than a first processor, and determining whether to enable or disable each of the first processor and the second processor based on results from the amplification by the second processor. Another method includes amplifying an input signal from an antenna by a second processor electrically farther from the antenna than a first processor, and determining whether to operate the first processor and the second processor based on a value related to a reception state for the amplified signal by the second processor.

Abstract: An electronic circuit apparatus for compensating for a process variation of a resistor in an electronic circuit is provided. The electronic circuit includes a detecting part for generating a tune voltage corresponding to a process variation value of the at least one resistor, and a compensating part for compensating for a process variation of the at least one resistor using the tune voltage.

Abstract: An electronic circuit apparatus for compensating for a process variation of a resistor in an electronic circuit is provided. The electronic circuit includes a detecting part for generating a tune voltage corresponding to a process variation value of the at least one resistor, and a compensating part for compensating for a process variation of the at least one resistor using the tune voltage.

Abstract: A sigma-delta modulator is provided. The sigma-delta modulator includes a differential amplifier which outputs a difference signal indicating a difference between an input analog signal and a feedback input analog signal, an integrator which integrates the difference signal, a band pass filter unit connected to the integrator in parallel which performs band pass filtering with respect to the difference signal, an adder which adds the band-pass filtered signal to the integrated signal, a comparator which compares a signal output from the adder with a predetermined reference value, converts the comparison result into a digital signal, and outputs the digital signal; and a digital-to-analog (D/A) which converts the digital signal output from the comparator into an analog signal and feeds the analog signal back to the differential amplifier.

Abstract: A sigma-delta modulator is provided. The sigma-delta modulator includes a differential amplifier which outputs a difference signal indicating a difference between an input analog signal and a feedback input analog signal, an integrator which integrates the difference signal, a band pass filter unit connected to the integrator in parallel which performs band pass filtering with respect to the difference signal, an adder which adds the band-pass filtered signal to the integrated signal, a comparator which compares a signal output from the adder with a predetermined reference value, converts the comparison result into a digital signal, and outputs the digital signal; and a digital-to-analog (D/A) which converts the digital signal output from the comparator into an analog signal and feeds the analog signal back to the differential amplifier.

Abstract: A broadband low noise amplifier and amplification method is provided. The broadband low noise amplifier includes an input terminal into which a radio frequency (RF) signal received by an antenna is input, an output terminal from which an amplified RF signal is output, at least one gain control part connected in parallel with loads of the output terminal to adjust the gain of the amplified RF signal, and at least one load tuning part that resonates with loads of the output terminal to adjust the resonance frequency of the load impedance. The method includes amplifying the input RF signal and outputting the amplified RF signal to an output terminal, where a gain of the amplified RF signal is adjusted by switching operations of at least one switching device connected in parallel with a load of the output terminal.

Abstract: A silicon tuner using a sigma delta-analog digital converter (SD-ADC) includes a radio frequency (RF) signal processor to process an RF signal input from an antenna, a mixer to convert the RF signal into an intermediate frequency (IF) signal, an SD-ADC to convert an IF signal into a digital signal, and an IF signal processor to process the converted IF signal. Accordingly, a silicon tuner in which a signal processor and a size are improved is provided.