Patents by Inventor Jun Ishii

Jun Ishii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9827801
    Abstract: In accordance with one embodiment, a sheet binding apparatus comprises a pasting section and a control section. The pasting section is capable of selectively carrying out pasting processing on at least one of a plurality of different given pasting target areas on sheets to be pasted. The control section controls the execution of the pasting processing based on the pasting section so that pasting target areas of a first sheet and a second sheet other than the first sheet within a plurality of sheets to be subjected to binding processing are different.
    Type: Grant
    Filed: August 5, 2016
    Date of Patent: November 28, 2017
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA TEC KABUSHIKI KAISHA
    Inventors: Hiroyuki Taguchi, Shoichi Dobashi, Yasunobu Terao, Mikio Yamamoto, Jun Ishii
  • Publication number: 20170287800
    Abstract: Provided is a sealing sheet capable of preventing void and filler segregation from occurring when forming a sealing body in which semiconductor chips are buried in the sealing sheet. The sealing sheet has a viscosity within the range of 1 Pa·s to 50000 Pa·s at 90° C.
    Type: Application
    Filed: August 21, 2015
    Publication date: October 5, 2017
    Inventors: Jun Ishii, Goji Shiga, Chie Iino
  • Publication number: 20170278716
    Abstract: In order to provide a sealing sheet capable of preventing same from falling off a suction collet during conveyancing, etc., and whereby semiconductor chips can be suitably buried, the sum ? of a thickness t [mm] and a storage elastic modulus G? [Pa] at 50° C., for this sealing sheet, fulfils 300???1.5×105.
    Type: Application
    Filed: August 6, 2015
    Publication date: September 28, 2017
    Inventors: Chie Iino, Goji Shiga, Jun Ishii
  • Publication number: 20170257954
    Abstract: A dummy trace portion is provided in a region between at least a suspension board with circuit on one end side and a support frame of a suspension board assembly sheet with circuits. A base insulating layer is formed on a support substrate in the dummy trace portion. A plurality of conductor traces are formed on the base insulating layer, and a cover insulating layer is formed on the base insulating layer to cover each conductor trace. At least one of the base insulating layer and the cover insulating layer in the dummy trace portion has a groove.
    Type: Application
    Filed: March 23, 2017
    Publication date: September 7, 2017
    Inventors: Jun ISHII, Terukazu IHARA, Naohiro TERADA
  • Publication number: 20170247618
    Abstract: Provided is a thermal decomposition method that allows efficient thermal decomposition of an organic substance such as a plastic to produce gas and oil with high heating value and with which a large amount of the organic substance can be processed. The method includes mixing the organic substance with an organic substance decomposition catalyst, forming the mixture to produce a composite agglomerated material, and thermally decomposing the organic substance by placing the composite agglomerated material in a thermal decomposition furnace. The maximum catalytic effect can be obtained since the organic substance and the catalyst are close to each other in the composite agglomerated material. Since the catalyst has thermal conductivity higher than that of the organic substance, the temperature rising rate of the organic substance can be increased.
    Type: Application
    Filed: July 30, 2015
    Publication date: August 31, 2017
    Applicant: JFE STEEL CORPORATION
    Inventors: Jun Ishii, Katsuhiko Takagi, Koichi Momono, Minoru Asanuma
  • Publication number: 20170207696
    Abstract: A circuit includes: a signal processing unit which is configured to perform signal processing; an amplifying unit which is configured to amplify a signal output from the signal processing unit; a first power supplying path which is extended from a battery to the signal processing unit; a second power supplying path which is branched from the first power supplying path, and which is extended to the amplifying unit; a power limiting unit which is provided in the second power supplying path, and which is configured to limit power flowing in the second power supplying path; and a capacitor which is connected to the second power supplying path, and which is configured to supplement power to be supplied to the amplifying unit.
    Type: Application
    Filed: January 19, 2017
    Publication date: July 20, 2017
    Inventors: Jun ISHII, Satsuki KAWAHASHI, Takeshi KONO, Yoshiyuki HARADA
  • Publication number: 20170199867
    Abstract: A configuration includes: a morphological analyzer configured to analyze a text provided as an input in a form of natural language by a user; an intention-estimation processor configured to refer to an intention estimation model in which words and corresponding user's intentions to be estimated from the words are stored, to thereby estimate an intention of the user based on the text analysis results obtained by the morphological analyzer; an unknown-word extractor configured to extract, as an unknown word, a word that is not stored in the intention estimation model from among the text analysis results when the intention of the user fails to be uniquely determined by the intention estimation processor; and a response text message generator configured to generate a response text message that includes the unknown word extracted by the unknown-word extractor.
    Type: Application
    Filed: October 30, 2014
    Publication date: July 13, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yusuke KOJI, Yoichi FUJII, Jun ISHII
  • Patent number: 9669644
    Abstract: In accordance with one embodiment, a sheet binding apparatus comprises a pasting section and a control section. The pasting section is capable of selectively carrying out pasting processing on at least one of a plurality of different given pasting target areas on sheets to be pasted. The control section controls the execution of the pasting processing based on the pasting section so that pasting target areas of a first sheet and a second sheet other than the first sheet within a plurality of sheets to be subjected to binding processing are different.
    Type: Grant
    Filed: August 21, 2014
    Date of Patent: June 6, 2017
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA TEC KABUSHIKI KAISHA
    Inventors: Hiroyuki Taguchi, Shoichi Dobashi, Yasunobu Terao, Mikio Yamamoto, Jun Ishii
  • Patent number: 9659883
    Abstract: The present invention provides a thermally curable resin sheet for sealing a semiconductor chip having excellent reliability and storability while being reduced in warpage deformation due to the volume shrinkage of the thermally curable resin sheet, and a method for manufacturing a semiconductor package. The present invention relates to a thermally curable resin sheet for sealing a semiconductor chip, wherein an activation energy (Ea) satisfies the following formula (1), a glass transition temperature of a product thermally cured at 150° C. for 1 hour is 125° C. or higher, and a thermal expansion coefficient ? [ppm/K] of the thermally cured product at the glass transition temperature or lower and a storage modulus E? [GPa] at 25° C. of the thermally cured product satisfy the following formula (2): 30?Ea?120 [kJ/mol]??(1); and 10,000??×E??300,000 [Pa/K]??(2).
    Type: Grant
    Filed: September 9, 2014
    Date of Patent: May 23, 2017
    Assignee: NITTO DENKO CORPORATION
    Inventors: Kosuke Morita, Tsuyoshi Ishizaka, Eiji Toyoda, Goji Shiga, Chie Iino, Jun Ishii
  • Publication number: 20170125373
    Abstract: Provided is a method for producing a semiconductor package. By this method, a periphery of a light-exposure planning region can be prevented from being exposed to light. The method is a semiconductor package producing method in which a film-formation planning surface of a cured product has a surface roughness of a predetermined value or less.
    Type: Application
    Filed: December 22, 2014
    Publication date: May 4, 2017
    Inventors: Kosuke Morita, Tsuyoshi Ishizaka, Jun Ishii, Goji Shiga, Chie Iino
  • Patent number: 9642262
    Abstract: A dummy trace portion is provided in a region between at least a suspension board with circuit on one end side and a support frame of a suspension board assembly sheet with circuits. A base insulating layer is formed on a support substrate in the dummy trace portion. A plurality of conductor traces are formed on the base insulating layer, and a cover insulating layer is formed on the base insulating layer to cover each conductor trace. At least one of the base insulating layer and the cover insulating layer in the dummy trace portion has a groove.
    Type: Grant
    Filed: December 27, 2013
    Date of Patent: May 2, 2017
    Assignee: NITTO DENKO CORPORATION
    Inventors: Jun Ishii, Terukazu Ihara, Naohiro Terada
  • Patent number: 9609430
    Abstract: An audio signal output from a tone generator is fed into a coil provided in a transducer for vibrating a sound board, so that a sound signal is generated by the vibration of the sound board. A predetermined DC voltage supplied by a constant voltage source circuit is superimposed on the audio signal by an adding circuit, so that the superimposed signal is fed into the coil. A current passing through the coil is sensed by a current sensing resistor, so that only a DC voltage component of a voltage signal on the both ends of the resistor is extracted by a low-pass filter circuit to be supplied to a microcomputer via an A/D converting circuit. The microcomputer figures out a resistance value and a temperature of the coil by use of the DC voltage component and the certain DC voltage value.
    Type: Grant
    Filed: June 24, 2013
    Date of Patent: March 28, 2017
    Assignee: YAMAHA CORPORATION
    Inventor: Jun Ishii
  • Publication number: 20170033076
    Abstract: Provided is a production method for a semiconductor package making it possible to embed, in its irregularities, a thermosetting resin sheet satisfactorily. The method is a production method, for a semiconductor package, including the step of forming a sealed body by pressurizing a stacked body which includes: a chip-temporarily-fixed body comprising a supporting plate, a temporarily-fixing material stacked over the supporting plate, and a semiconductor chip fixed temporarily over the temporarily-fixing material; a thermosetting resin sheet arranged over the chip-temporarily-fixed body; and a separator having a tensile storage elastic modulus of 200 MPa or less at 90° C. and arranged over the thermosetting resin sheet; the sealed body including the semiconductor chip and the thermosetting resin sheet covering the semiconductor chip.
    Type: Application
    Filed: December 22, 2014
    Publication date: February 2, 2017
    Inventors: Kosuke Morita, Tsuyoshi Ishizaka, Jun Ishii, Goji Shiga, Chie Iino
  • Publication number: 20170032979
    Abstract: Provided is a production method for a semiconductor package which can yield a sealed resin body excellent in surface smoothness, and which makes it possible to omit any step of grinding a resin region of the sealed resin body. This method is a production method, for a semiconductor package, including the step of pressurizing a stacked body which includes: a chip-temporarily-fixed body comprising a supporting plate, a temporarily-fixing material stacked over the supporting plate, and a semiconductor chip fixed temporarily over the temporarily-fixing material; a thermosetting resin sheet arranged over the chip-temporarily-fixed body; and a separator having a tensile storage elastic modulus of 200 MPa or more at 90° C. and arranged over the thermosetting resin sheet. In this way, a sealed body is formed which includes the semiconductor chip and the thermosetting resin sheet covering the semiconductor chip.
    Type: Application
    Filed: December 22, 2014
    Publication date: February 2, 2017
    Inventors: Kosuke Morita, Tsuyoshi Ishizaka, Jun Ishii, Goji Shiga, Chie Iino
  • Publication number: 20170011742
    Abstract: A voice recognizer 3 generates plural voice recognition results from one input speech 2. For each of the voice recognition results, an intent understanding processor 7 estimates an intent to thereby output one or more candidates of intent understanding results and scores of them. A weight calculator 11 calculates standby weights using setting information 9 of a control target apparatus. An intent understanding corrector 12 corrects the scores of the candidates of intent understanding result, using the standby weights, to thereby calculate their final scores, and then selects one from among the candidates of intent understanding result, as an intent understanding result 13, on the basis of the final scores.
    Type: Application
    Filed: March 31, 2014
    Publication date: January 12, 2017
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yi JING, Yoichi FUJII, Jun ISHII
  • Patent number: 9532141
    Abstract: An audio signal output from a tone generator 14 is fed into a coil 16 provided in a transducer for vibrating a sound board, so that a sound signal is generated by the vibration of the sound board. A microcomputer 30 obtains temperature values of the coil 16 measured by two different methods, and suspends supply of audio signals to the coil 16 or reduces the amount of audio signals supplied to the coil 16 if the difference between the two coil temperature values is outside a predetermined range. In a case as well where one of the two coil temperature values has risen excessively, the microcomputer 30 suspends supply of audio signals to the coil 16 or reduces the amount of audio signals supplied to the coil 16.
    Type: Grant
    Filed: July 22, 2013
    Date of Patent: December 27, 2016
    Assignee: YAMAHA CORPORATION
    Inventor: Jun Ishii
  • Patent number: 9530405
    Abstract: An intention estimation unit extractor that extracts one or more intention estimation units each of which is a unit on which an estimation of the intention is to be performed from an inputted language, an intention estimator that estimates a partial intention of a part which constructs each of the extracted intention estimation units, an intention co-occurrence weight calculator that calculates an intention co-occurrence weight based on a relationship between partial intentions, and an intention sequence estimator that generates an intention sequence corresponding to the inputted language by using one or more partial intentions, and generates an intention estimation result corresponding to the inputted language by using both a score showing a likelihood of the generated intention sequence and an intention co-occurrence weight which the intention co-occurrence weight calculator calculates for the partial intentions which construct the generated intention sequence are disposed.
    Type: Grant
    Filed: October 9, 2013
    Date of Patent: December 27, 2016
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yoichi Fujii, Jun Ishii
  • Publication number: 20160339731
    Abstract: In accordance with one embodiment, a sheet binding apparatus comprises a pasting section and a control section. The pasting section is capable of selectively carrying out pasting processing on at least one of a plurality of different given pasting target areas on sheets to be pasted. The control section controls the execution of the pasting processing based on the pasting section so that pasting target areas of a first sheet and a second sheet other than the first sheet within a plurality of sheets to be subjected to binding processing are different.
    Type: Application
    Filed: August 5, 2016
    Publication date: November 24, 2016
    Inventors: Hiroyuki Taguchi, Shoichi Dobashi, Yasunobu Terao, Mikio Yamamoto, Jun Ishii
  • Patent number: 9451704
    Abstract: A plurality of suspension boards and an inspection substrate are integrally supported by a support frame. In each suspension board, a line is formed on a conductive first support substrate via a first insulating layer. The first support substrate and the line are electrically connected by a first via in the first insulating layer. In the inspection substrate, a conductor layer is formed on a conductive second support substrate with a second insulating layer sandwiched therebetween. The second support substrate and the conductor layer are electrically connected by a second via in the second insulating layer. The first via and the second via have the same configuration.
    Type: Grant
    Filed: October 24, 2013
    Date of Patent: September 20, 2016
    Assignee: NITTO DENKO CORPORATION
    Inventors: Terukazu Ihara, Jun Ishii, Naohiro Terada
  • Publication number: 20160219716
    Abstract: A read wiring trace and a write wiring trace are formed on an insulating layer. Connection terminals made of conductor are connected to the read wiring trace and the write wiring trace, respectively. Each connection terminal has at least one corner with a radius of curvature of not larger than 35 ?m.
    Type: Application
    Filed: March 31, 2016
    Publication date: July 28, 2016
    Inventors: Yoshito FUJIMURA, Jun ISHII