Patents by Inventor Jung Chi Tai

Jung Chi Tai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10749013
    Abstract: A semiconductor device includes a plurality of semiconductor fins, an epitaxy structure, a capping layer, and a contact. The epitaxy structure adjoins the semiconductor fins. The epitaxy structure has a plurality of protrusive portions. The capping layer is over a sidewall of the epitaxy structure. The contact is in contact with the epitaxy structure and the capping layer. The contact has a portion between the protrusive portions. The portion of the contact between the protrusive portions has a bottom in contact with the epitaxy structure.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: August 18, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yen-Ru Lee, Chii-Horng Li, Chien-I Kuo, Heng-Wen Ting, Jung-Chi Tai, Lilly Su, Yang-Tai Hsiao
  • Publication number: 20200035784
    Abstract: A method includes forming a crown structure over a substrate; forming fins in the crown structure; forming an intra-device isolation region between the fins and forming inter-device isolation regions on opposing sides of the crown structure; forming a gate structure over the fins; forming a dielectric layer that extends continuously over the inter-device isolation regions, the fins and the intra-device isolation region; performing an etching process to reduce a thickness of the dielectric layer, where after the etching process, upper surfaces of the inter-device isolation regions and upper surfaces of the fins are exposed while an upper surface of the intra-device isolation region is covered by a remaining portion of the dielectric layer; and forming an epitaxial structure over the exposed upper surfaces of the fins, where after the epitaxial structure is formed, there is a void between the epitaxial structure and the intra-device isolation region.
    Type: Application
    Filed: October 7, 2019
    Publication date: January 30, 2020
    Inventors: Yen-Ru Lee, Chii-Horng Li, Chien-I Kuo, Heng-Wen Ting, Jung-Chi Tai, Li-Li Su, Tzu-Ching Lin
  • Patent number: 10468482
    Abstract: A method includes forming a crown structure over a substrate; forming fins in the crown structure; forming an intra-device isolation region between the fins and forming inter-device isolation regions on opposing sides of the crown structure; forming a gate structure over the fins; forming a dielectric layer that extends continuously over the inter-device isolation regions, the fins and the intra-device isolation region; performing an etching process to reduce a thickness of the dielectric layer, where after the etching process, upper surfaces of the inter-device isolation regions and upper surfaces of the fins are exposed while an upper surface of the intra-device isolation region is covered by a remaining portion of the dielectric layer; and forming an epitaxial structure over the exposed upper surfaces of the fins, where after the epitaxial structure is formed, there is a void between the epitaxial structure and the intra-device isolation region.
    Type: Grant
    Filed: January 30, 2018
    Date of Patent: November 5, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Ru Lee, Chii-Horng Li, Chien-I Kuo, Heng-Wen Ting, Jung-Chi Tai, Li-Li Su, Tzu-Ching Lin
  • Publication number: 20190252240
    Abstract: An embodiment is a structure including a first fin over a substrate, a second fin over the substrate, the second fin being adjacent the first fin, an isolation region surrounding the first fin and the second fin, a gate structure along sidewalls and over upper surfaces of the first fin and the second fin, the gate structure defining channel regions in the first fin and the second fin, a source/drain region on the first fin and the second fin adjacent the gate structure, and an air gap separating the source/drain region from a top surface of the substrate.
    Type: Application
    Filed: April 22, 2019
    Publication date: August 15, 2019
    Inventors: Yen-Ru Lee, Chii-Horng Li, Chien-I Kuo, Li-Li Su, Chien-Chang Su, Heng-Wen Ting, Jung-Chi Tai, Che-Hui Lee, Ying-Wei Li
  • Patent number: 10269618
    Abstract: An embodiment is a structure including a first fin over a substrate, a second fin over the substrate, the second fin being adjacent the first fin, an isolation region surrounding the first fin and the second fin, a gate structure along sidewalls and over upper surfaces of the first fin and the second fin, the gate structure defining channel regions in the first fin and the second fin, a source/drain region on the first fin and the second fin adjacent the gate structure, and an air gap separating the source/drain region from a top surface of the substrate.
    Type: Grant
    Filed: November 27, 2017
    Date of Patent: April 23, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Ru Lee, Chii-Horng Li, Chien-I Kuo, Li-Li Su, Chien-Chang Su, Heng-Wen Ting, Jung-Chi Tai, Che-Hui Lee, Ying-Wei Li
  • Publication number: 20190051737
    Abstract: A semiconductor device includes a plurality of semiconductor fins, an epitaxy structure, a capping layer, and a contact. The epitaxy structure adjoins the semiconductor fins. The epitaxy structure has a plurality of protrusive portions. The capping layer is over a sidewall of the epitaxy structure. The contact is in contact with the epitaxy structure and the capping layer. The contact has a portion between the protrusive portions. The portion of the contact between the protrusive portions has a bottom in contact with the epitaxy structure.
    Type: Application
    Filed: October 15, 2018
    Publication date: February 14, 2019
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yen-Ru LEE, Chii-Horng LI, Chien-I KUO, Heng-Wen TING, Jung-Chi TAI, Lilly SU, Yang-Tai HSIAO
  • Patent number: 10183092
    Abstract: A sanitary article includes an absorbent pad including an upper sheet layer, a lower sheet layer, and a pulp-and-SAP powder layer combination. The powder layer combination is constituted by alternate layers of pulverized pulp and superabsorbent polymer (SAP) powder. A method for making the sanitary article is also disclosed.
    Type: Grant
    Filed: February 16, 2016
    Date of Patent: January 22, 2019
    Assignee: KANG NA HSIUNG ENTERPRISE CO., LTD.
    Inventors: Jung-Chi Tai, Ho-Hsi Yang, Chun-Meng Huang, Chien-Chung Su
  • Patent number: 10172505
    Abstract: A cleaning pad for a robot cleaner includes a back piece, an absorbent sheet, and a water permeable web. The water permeable web has a web body which is of such a dimension as to form a downward draping unit to shield the absorbent sheet. The downward draping unit is embossed toward the back piece and along at least one line oriented in a lengthwise direction to form successive downward draping members each defining a height between a lowermost area thereof and a lower major surface of the back piece. The heights of the successive downward draping members are incrementally decreased from a rearmost one of the successive downward draping members to a frontmost one of the successive downward draping members.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: January 8, 2019
    Assignee: KANG NA HSIUNG ENTERPRISE CO., LTD.
    Inventors: Jung-Chi Tai, Ho-Hsi Yang, Chien-Chung Su, Lung-Chieh Lin
  • Patent number: 10103249
    Abstract: A semiconductor device includes a semiconductor substrate, a plurality of semiconductor fins and a source/drain structure. The semiconductor fins and the source/drain structure are located on the semiconductor substrate, and the source/drain structure is connected to the semiconductor fins. The source/drain structure has a top portion with a W-shape cross section for forming a contact landing region. The semiconductor device may further include a plurality of capping layers located on a plurality of recessed portions of the top portion.
    Type: Grant
    Filed: September 10, 2015
    Date of Patent: October 16, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yen-Ru Lee, Chii-Horng Li, Chien-I Kuo, Heng-Wen Ting, Jung-Chi Tai, Lilly Su, Yang-Tai Hsiao
  • Publication number: 20180175144
    Abstract: A method includes forming a crown structure over a substrate; forming fins in the crown structure; forming an intra-device isolation region between the fins and forming inter-device isolation regions on opposing sides of the crown structure; forming a gate structure over the fins; forming a dielectric layer that extends continuously over the inter-device isolation regions, the fins and the intra-device isolation region; performing an etching process to reduce a thickness of the dielectric layer, where after the etching process, upper surfaces of the inter-device isolation regions and upper surfaces of the fins are exposed while an upper surface of the intra-device isolation region is covered by a remaining portion of the dielectric layer; and forming an epitaxial structure over the exposed upper surfaces of the fins, where after the epitaxial structure is formed, there is a void between the epitaxial structure and the intra-device isolation region.
    Type: Application
    Filed: January 30, 2018
    Publication date: June 21, 2018
    Inventors: Yen-Ru Lee, Chii-Horng Li, Chien-I Kuo, Heng-Wen Ting, Jung-Chi Tai, Li-Li Su, Tzu-Ching Lin
  • Publication number: 20180140154
    Abstract: A cleaning pad for a robot cleaner includes a back piece, an absorbent sheet, and a water permeable web. The water permeable web has a web body which is of such a dimension as to form a downward draping unit to shield the absorbent sheet. The downward draping unit is embossed toward the back piece and along at least one line oriented in a lengthwise direction to form successive downward draping members each defining a height between a lowermost area thereof and a lower major surface of the back piece. The heights of the successive downward draping members are incrementally decreased from a rearmost one of the successive downward draping members to a frontmost one of the successive downward draping members.
    Type: Application
    Filed: February 17, 2017
    Publication date: May 24, 2018
    Applicant: KANG NA HSIUNG ENTERPRISE CO., LTD.
    Inventors: Jung-Chi TAI, Ho-Hsi YANG, Chien-Chung SU, Lung-Chieh LIN
  • Publication number: 20180082883
    Abstract: An embodiment is a structure including a first fin over a substrate, a second fin over the substrate, the second fin being adjacent the first fin, an isolation region surrounding the first fin and the second fin, a gate structure along sidewalls and over upper surfaces of the first fin and the second fin, the gate structure defining channel regions in the first fin and the second fin, a source/drain region on the first fin and the second fin adjacent the gate structure, and an air gap separating the source/drain region from a top surface of the substrate.
    Type: Application
    Filed: November 27, 2017
    Publication date: March 22, 2018
    Inventors: Yen-Ru Lee, Chii-Horng Li, Chien-I Kuo, Li-Li Su, Chien-Chang Su, Heng-Wen Ting, Jung-Chi Tai, Che-Hui Lee, Ying-Wei Li
  • Patent number: 9905641
    Abstract: A semiconductor device includes a substrate, at least one first isolation structure, at least two second isolation structure, and an epitaxy structure. The substrate has a plurality of semiconductor fins therein. The first isolation structure is disposed between the semiconductor fins. The semiconductor fins are disposed between the second isolation structures, and the second isolation structures extend into the substrate further than the first isolation structure. The epitaxy structure is disposed on the semiconductor fins. At least one void is present between the first isolation structure and the epitaxy structure.
    Type: Grant
    Filed: September 15, 2015
    Date of Patent: February 27, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Ru Lee, Chii-Horng Li, Chien-I Kuo, Heng-Wen Ting, Jung-Chi Tai, Lilly Su, Tzu-Ching Lin
  • Patent number: 9831116
    Abstract: An embodiment is a structure including a first fin over a substrate, a second fin over the substrate, the second fin being adjacent the first fin, an isolation region surrounding the first fin and the second fin, a gate structure along sidewalls and over upper surfaces of the first fin and the second fin, the gate structure defining channel regions in the first fin and the second fin, a source/drain region on the first fin and the second fin adjacent the gate structure, and an air gap separating the source/drain region from a top surface of the substrate.
    Type: Grant
    Filed: January 20, 2016
    Date of Patent: November 28, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Ru Lee, Chii-Horng Li, Chien-I Kuo, Li-Li Su, Chien-Chang Su, Heng-Wen Ting, Jung-Chi Tai, Che-Hui Lee, Ying-Wei Li
  • Patent number: 9706800
    Abstract: A method for making face masks includes: advancing continuously a longitudinal sheet material that can be divided into a plurality of mask sheets each of which has two opposite longitudinal ends and two opposite transverse ends; cutting the sheet material at intervals to form the mask sheets; providing a plurality of strips each of which has two longitudinally opposite strip ends and each of which is folded to form a pleat between the two strip ends thereof; and bonding the two strip ends of each of the strips to one of the opposite transverse ends of a respective one of the mask sheets to form an ear loop. A structure of the face mask is also disclosed.
    Type: Grant
    Filed: December 9, 2009
    Date of Patent: July 18, 2017
    Assignee: Kang Na Hsiung Enterprise Co., Ltd.
    Inventors: Jung-Chi Tai, Ho-Hsi Yang, Chien-Hsiang Lin, Chien-Chung Su
  • Publication number: 20170077222
    Abstract: A semiconductor device includes a substrate, at least one first isolation structure, at least two second isolation structure, and an epitaxy structure. The substrate has a plurality of semiconductor fins therein. The first isolation structure is disposed between the semiconductor fins. The semiconductor fins are disposed between the second isolation structures, and the second isolation structures extend into the substrate further than the first isolation structure. The epitaxy structure is disposed on the semiconductor fins. At least one void is present between the first isolation structure and the epitaxy structure.
    Type: Application
    Filed: September 15, 2015
    Publication date: March 16, 2017
    Inventors: Yen-Ru LEE, Chii-Horng LI, Chien-I KUO, Heng-Wen TING, Jung-Chi TAI, Lilly SU, Tzu-Ching LIN
  • Publication number: 20170077228
    Abstract: A semiconductor device includes a semiconductor substrate, a plurality of semiconductor fins and a source/drain structure. The semiconductor fins and the source/drain structure are located on the semiconductor substrate, and the source/drain structure is connected to the semiconductor fins. The source/drain structure has a top portion with a W-shape cross section for forming a contact landing region. The semiconductor device may further include a plurality of capping layers located on a plurality of recessed portions of the top portion.
    Type: Application
    Filed: September 10, 2015
    Publication date: March 16, 2017
    Inventors: Yen-Ru LEE, Chii-Horng LI, Chien-I KUO, Heng-Wen TING, Jung-Chi TAI, Lilly SU, Yang-Tai HSIAO
  • Publication number: 20170076973
    Abstract: An embodiment is a structure including a first fin over a substrate, a second fin over the substrate, the second fin being adjacent the first fin, an isolation region surrounding the first fin and the second fin, a gate structure along sidewalls and over upper surfaces of the first fin and the second fin, the gate structure defining channel regions in the first fin and the second fin, a source/drain region on the first fin and the second fin adjacent the gate structure, and an air gap separating the source/drain region from a top surface of the substrate.
    Type: Application
    Filed: January 20, 2016
    Publication date: March 16, 2017
    Inventors: Yen-Ru Lee, Chii-Horng Li, Chien-I Kuo, Lilly Su, Chien-Chang Su, Heng-Wen Ting, Jung-Chi Tai, Che-Hui Lee, Ying-Wei Li
  • Patent number: 9486990
    Abstract: There are provided a shaped sheet laminate that is adapted for an absorbent article and that has a specific structure to enhance the absorbing effect of the absorbent article, a method for manufacturing the shaped sheet laminate, and a shaping apparatus adapted to manufacture the shaped sheet laminate. The shaping apparatus includes a first roller having a rolling surface, a plurality of indentations that are indented from the rolling surface, a plurality of annular inner wall surfaces respectively defining the indentations, and a plurality of suction holes that are in air communication the respective indentations. Each of the annular inner wall surfaces has an annular outer edge that meets the rolling surface.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: November 8, 2016
    Assignee: KANG NA HSIUNG ENTERPRISE CO., LTD.
    Inventors: Jung-Chi Tai, Ho-Hsi Yang, Chien-Chung Su
  • Publication number: 20160158401
    Abstract: A sanitary article includes an absorbent pad including an upper sheet layer, a lower sheet layer, and a pulp-and-SAP powder layer combination. The powder layer combination is constituted by alternate layers of pulverized pulp and superabsorbent polymer (SAP) powder. A method for making the sanitary article is also disclosed.
    Type: Application
    Filed: February 16, 2016
    Publication date: June 9, 2016
    Inventors: Jung-Chi Tai, Ho-Hsi Yang, Chun-Meng Huang, Chien-Chung Su