Patents by Inventor Jung-Huei Peng

Jung-Huei Peng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10273144
    Abstract: The present disclosure relates to a microelectromechanical systems (MEMS) package having two MEMS devices with different pressures, and an associated method of formation. In some embodiments, the (MEMS) package includes a device substrate and a cap substrate bonded together. The device substrate includes a first trench and a second trench. A first MEMS device is disposed over the first trench and a second MEMS device is disposed over the second trench. A first stopper is raised from a first trench bottom surface of the first trench but below a top surface of the device substrate and a second stopper is raised from a second trench bottom surface of the second trench but below the top surface of the device substrate. A first depth of the first trench is greater than a second depth of the second trench.
    Type: Grant
    Filed: June 19, 2017
    Date of Patent: April 30, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng, Kuei-Sung Chang, Jung-Huei Peng
  • Patent number: 10273148
    Abstract: Some embodiments of the present disclosure provide a microelectromechanical systems (MEMS). The MEMS includes a semiconductive block. The semiconductive block includes a protruding structure. The protruding structure includes a bottom surface. The semiconductive block includes a sensing structure. A semiconductive substrate includes a conductive region. The conductive region includes a first surface under the sensing structure. The first surface is substantially coplanar with the bottom surface. A dielectric region includes a second surface not disposed over the first surface.
    Type: Grant
    Filed: August 14, 2015
    Date of Patent: April 30, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chun-Wen Cheng, Jung-Huei Peng, Chia-Hua Chu, Nien-Tsung Tsai, Yao-Te Huang, Li-Min Hung, Yu-Chia Liu
  • Patent number: 10273142
    Abstract: The present disclosure provides a structure. The structure comprises a cavity enclosed by a first substrate and a second substrate opposite to the first substrate. The structure also includes a movable membrane in the cavity. Further, the structure includes a mesa in the cavity and the mesa is protruded from a surface of the first substrate. In addition, the structure includes a dielectric layer over the mesa, wherein the dielectric layer includes a first surface in contact with the mesa and a second surface opposite to the first surface is positioned toward the cavity.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: April 30, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yuan-Chih Hsieh, Hsing-Lien Lin, Jung-Huei Peng, Yi-Chien Wu
  • Patent number: 10266390
    Abstract: A device includes a substrate, a routing conductive line over the substrate, a dielectric layer over the routing conductive line, and an etch stop layer over the dielectric layer. A Micro-Electro-Mechanical System (MEMS) device has a portion over the etch stop layer. A contact plug penetrates through the etch stop layer and the dielectric layer. The contact plug connects the portion of the MEMS device to the routing conductive line. An escort ring is disposed over the etch stop layer and under the MEMS device, wherein the escort ring encircles the contact plug.
    Type: Grant
    Filed: October 28, 2015
    Date of Patent: April 23, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shang-Ying Tsai, Hsin-Ting Huang, Lung Yuan Pan, Jung-Huei Peng, Hung-Hua Lin, Yao-Te Huang
  • Patent number: 10266396
    Abstract: The present disclosure provides a semiconductor device, which includes a first substrate comprising an upper surface and a second substrate disposed over the first substrate. The semiconductor device also includes a first electrode disposed in the second substrate and configured to move in a direction substantially parallel to the upper surface in response to a pressure difference, and a second electrode disposed in the second substrate. The second electrode is configured to provide a capacitance in conjunction with the first electrode.
    Type: Grant
    Filed: May 25, 2017
    Date of Patent: April 23, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ching-Kai Shen, Wen-Chuan Tai, Chia-Ming Hung, Hsiang-Fu Chen, Jung-Huei Peng, Chun-Wen Cheng
  • Publication number: 20190112183
    Abstract: The present disclosure, in some embodiments, relates to an integrated chip structure. The integrated chip structure has a plurality of interconnect layers disposed within a dielectric structure over a substrate. A passivation layer is over the dielectric structure. A sensing electrode and a bonding electrode have bottom surfaces directly contacting the passivation layer. A microelectromechanical systems (MEMS) substrate is vertically separated from the sensing electrode. The bonding electrode is electrically connected to the MEMs substrate and to one or more of the plurality of interconnect layers. An electrode extension via is configured to electrically connect the sensing electrode to one or more of the plurality of interconnect layers.
    Type: Application
    Filed: December 6, 2018
    Publication date: April 18, 2019
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng, Jung-Huei Peng
  • Publication number: 20190092627
    Abstract: A microelectromechanical system (MEMS) structure and method of forming the MEMS device, including forming a first metallization structure over a complementary metal-oxide-semiconductor (CMOS) wafer, where the first metallization structure includes a first sacrificial oxide layer and a first metal contact pad. A second metallization structure is formed over a MEMS wafer, where the second metallization structure includes a second sacrificial oxide layer and a second metal contact pad. The first metallization structure and second metallization structure are then bonded together. After the first metallization structure and second metallization structure are bonded together, patterning and etching the MEMS wafer to form a MEMS element over the second sacrificial oxide layer. After the MEMS element is formed, removing the first sacrificial oxide layer and second sacrificial oxide layer to allow the MEMS element to move freely about an axis.
    Type: Application
    Filed: December 27, 2017
    Publication date: March 28, 2019
    Inventors: Hung-Hua Lin, Chang-Ming Wu, Chung-Yi Yu, Ping-Yin Liu, Jung-Huei Peng
  • Publication number: 20190062151
    Abstract: A semiconductor device includes a first substrate, a second substrate bonded to the first substrate from a first surface of the second substrate, a third substrate bonded to the second substrate from a second surface of the second substrate, a cavity defined by the first substrate, the second substrate and the third substrate; and a viewer window provided in the third substrate and aligned with the cavity; wherein the inside of the cavity is observed through the viewer window.
    Type: Application
    Filed: August 28, 2017
    Publication date: February 28, 2019
    Inventors: CHUN-WEN CHENG, CHI-HANG CHIN, JUNG-HUEI PENG, CHIA-HUA CHU, SHANG-YING TSAI
  • Patent number: 10202278
    Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes a cavity disposed in a substrate and enclosed by a first surface and a second surface opposite to the first surface. The semiconductor structure also includes a first electrode pair having a first electrode on the first surface and a second electrode on the second surface. The first electrode pair is configured to measure a first spacing between the first surface and the second surface. The semiconductor structure further includes a second electrode pair having a third electrode on the first surface and a fourth electrode on the second surface. The second electrode pair is configured to measure a second spacing between the first surface and the second surface.
    Type: Grant
    Filed: September 2, 2016
    Date of Patent: February 12, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Jung-Huei Peng, Yi-Chien Wu, Yu-Chia Liu, Chun-Wen Cheng
  • Patent number: 10160639
    Abstract: The present disclosure relates to a semiconductor structure for a MEMS device. In some embodiments, the structure includes an interlayer dielectric (ILD) region positioned over a substrate. Further the structure includes an inter-metal dielectric region. The IMD region includes a passivation layer overlying a stacked structure. The stacked structure includes dielectric layers and etch stop layers that are stacked in an alternating fashion. Metal wire layers are disposed within the stacked structure of the IMD region. The structure also includes a sensing electrode electrically connected to the IMD region with an electrode extension via. The structure includes a MEMS substrate comprising a MEMS device having a soft mechanical structure positioned adjacent to the sensing electrode.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: December 25, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng, Jung-Huei Peng
  • Publication number: 20180362335
    Abstract: The present disclosure provides a CMOS structure, including a substrate, a metallization layer over the substrate, a sensing structure over the metallization layer, and a signal transmitting structure adjacent to the sensing structure. The sensing structure includes an outgassing layer over the metallization layer, a patterned outgassing barrier over the outgassing layer; and an electrode over the patterned outgassing barrier. The signal transmitting structure electrically couples the electrode and the metallization layer.
    Type: Application
    Filed: August 8, 2018
    Publication date: December 20, 2018
    Inventors: JUNG-HUEI PENG, CHIA-HUA CHU, FEI-LUNG LAI, SHIANG-CHI LIN
  • Patent number: 10155244
    Abstract: The present disclosure relates to a micro-fluidic probe card that deposits a fluidic chemical onto a substrate with a minimal amount of fluidic chemical waste, and an associated method of operation. In some embodiments, the micro-fluidic probe card has a probe card body with a first side and a second side. A sealant element, which contacts a substrate, is connected to the second side of the probe card body in a manner that forms a cavity within an interior of the sealant element. A fluid inlet, which provides a fluid from a processing tool to the cavity, is a first conduit extending between the first side and the second side of the probe card body. A fluid outlet, which removes the fluid from the cavity, is a second conduit extending between the first side and the second side of the probe card body.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: December 18, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Wen Cheng, Jung-Huei Peng, Yi-Shao Liu, Fei-Lung Lai, Shang-Ying Tsai
  • Publication number: 20180339899
    Abstract: The present disclosure provides a semiconductor device, which includes a first substrate comprising an upper surface and a second substrate disposed over the first substrate. The semiconductor device also includes a first electrode disposed in the second substrate and configured to move in a direction substantially parallel to the upper surface in response to a pressure difference, and a second electrode disposed in the second substrate. The second electrode is configured to provide a capacitance in conjunction with the first electrode.
    Type: Application
    Filed: May 25, 2017
    Publication date: November 29, 2018
    Inventors: CHING-KAI SHEN, WEN-CHUAN TAI, CHIA-MING HUNG, HSIANG-FU CHEN, JUNG-HUEI PENG, CHUN-WEN CHENG
  • Publication number: 20180311955
    Abstract: MEMS devices and methods of fabrication thereof are described. In one embodiment, the MEMS device includes a bottom alloy layer disposed over a substrate. An inner material layer is disposed on the bottom alloy layer, and a top alloy layer is disposed on the inner material layer, the top and bottom alloy layers including an alloy of at least two metals, wherein the inner material layer includes the alloy and nitrogen. The top alloy layer, the inner material layer, and the bottom alloy layer form a MEMS feature.
    Type: Application
    Filed: April 23, 2018
    Publication date: November 1, 2018
    Inventors: Jung-Huei Peng, Chun-Ren Cheng, Jiou-Kang Lee, Shang-Ying Tsai, Ting-Hau Wu
  • Publication number: 20180288549
    Abstract: The present disclosure provides one embodiment of an integrated microphone structure. The integrated microphone structure includes a first silicon substrate patterned as a first plate. A silicon oxide layer formed on one side of the first silicon substrate. A second silicon substrate bonded to the first substrate through the silicon oxide layer such that the silicon oxide layer is sandwiched between the first and second silicon substrates. A diaphragm secured on the silicon oxide layer and disposed between the first and second silicon substrates such that the first plate and the diaphragm are configured to form a capacitive microphone.
    Type: Application
    Filed: June 6, 2018
    Publication date: October 4, 2018
    Inventors: Jung-Huei Peng, Chia-Hua Chu, Chun-wen Cheng, Chin-Yi Cho, Li-Min Hung, Yao-Te Huang
  • Patent number: 10046965
    Abstract: The present disclosure provides a CMOS structure, including a substrate, a metallization layer over the substrate, a sensing structure over the metallization layer, and a signal transmitting structure adjacent to the sensing structure. The sensing structure includes an outgassing layer over the metallization layer, a patterned outgassing barrier over the outgassing layer; and an electrode over the patterned outgassing barrier. The signal transmitting structure electrically couples the electrode and the metallization layer.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: August 14, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Jung-Huei Peng, Chia-Hua Chu, Fei-Lung Lai, Shiang-Chi Lin
  • Publication number: 20180194613
    Abstract: An embodiment is MEMS device including a first MEMS die having a first cavity at a first pressure, a second MEMS die having a second cavity at a second pressure, the second pressure being different from the first pressure, and a molding material surrounding the first MEMS die and the second MEMS die, the molding material having a first surface over the first and the second MEMS dies. The device further includes a first set of electrical connectors in the molding material, each of the first set of electrical connectors coupling at least one of the first and the second MEMS dies to the first surface of the molding material, and a second set of electrical connectors over the first surface of the molding material, each of the second set of electrical connectors being coupled to at least one of the first set of electrical connectors.
    Type: Application
    Filed: March 2, 2018
    Publication date: July 12, 2018
    Inventors: Chun-Wen Cheng, Jung-Huei Peng, Shang-Ying Tsai, Hung-Chia Tsai, Yi-Chuan Teng
  • Patent number: 9998843
    Abstract: The present disclosure provides one embodiment of an integrated microphone structure. The integrated microphone structure includes a first silicon substrate patterned as a first plate. A silicon oxide layer formed on one side of the first silicon substrate. A second silicon substrate bonded to the first substrate through the silicon oxide layer such that the silicon oxide layer is sandwiched between the first and second silicon substrates. A diaphragm secured on the silicon oxide layer and disposed between the first and second silicon substrates such that the first plate and the diaphragm are configured to form a capacitive microphone.
    Type: Grant
    Filed: February 8, 2016
    Date of Patent: June 12, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jung-Huei Peng, Chia-Hua Chu, Chun-wen Cheng, Chin-Yi Cho, Li-Min Hung, Yao-Te Huang
  • Patent number: 9950522
    Abstract: MEMS devices and methods of fabrication thereof are described. In one embodiment, the MEMS device includes a bottom alloy layer disposed over a substrate. An inner material layer is disposed on the bottom alloy layer, and a top alloy layer is disposed on the inner material layer, the top and bottom alloy layers including an alloy of at least two metals, wherein the inner material layer includes the alloy and nitrogen. The top alloy layer, the inner material layer, and the bottom alloy layer form a MEMS feature.
    Type: Grant
    Filed: September 21, 2015
    Date of Patent: April 24, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jung-Huei Peng, Chun-Ren Cheng, Jiou-Kang Lee, Shang-Ying Tsai, Ting-Hau Wu
  • Publication number: 20180099865
    Abstract: The present disclosure provides a structure. The structure comprises a cavity enclosed by a first substrate and a second substrate opposite to the first substrate. The structure also includes a movable membrane in the cavity. Further, the structure includes a mesa in the cavity and the mesa is protruded from a surface of the first substrate. In addition, the structure includes a dielectric layer over the mesa, wherein the dielectric layer includes a first surface in contact with the mesa and a second surface opposite to the first surface is positioned toward the cavity.
    Type: Application
    Filed: November 21, 2017
    Publication date: April 12, 2018
    Inventors: Yuan-Chih HSIEH, Hsing-Lien LIN, Jung-Huei PENG, Yi-Chien WU